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libdrm  2.4.37
via_drm.h
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00001 /*
00002  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
00003  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
00004  *
00005  * Permission is hereby granted, free of charge, to any person obtaining a
00006  * copy of this software and associated documentation files (the "Software"),
00007  * to deal in the Software without restriction, including without limitation
00008  * the rights to use, copy, modify, merge, publish, distribute, sub license,
00009  * and/or sell copies of the Software, and to permit persons to whom the
00010  * Software is furnished to do so, subject to the following conditions:
00011  *
00012  * The above copyright notice and this permission notice (including the
00013  * next paragraph) shall be included in all copies or substantial portions
00014  * of the Software.
00015  *
00016  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00017  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00018  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
00019  * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
00020  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00021  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
00022  * DEALINGS IN THE SOFTWARE.
00023  */
00024 #ifndef _VIA_DRM_H_
00025 #define _VIA_DRM_H_
00026 
00027 #include "drm.h"
00028 
00029 /* WARNING: These defines must be the same as what the Xserver uses.
00030  * if you change them, you must change the defines in the Xserver.
00031  */
00032 
00033 #ifndef _VIA_DEFINES_
00034 #define _VIA_DEFINES_
00035 
00036 #include "via_drmclient.h"
00037 
00038 #define VIA_NR_SAREA_CLIPRECTS            8
00039 #define VIA_NR_XVMC_PORTS               10
00040 #define VIA_NR_XVMC_LOCKS               5
00041 #define VIA_MAX_CACHELINE_SIZE          64
00042 #define XVMCLOCKPTR(saPriv,lockNo)                             \
00043        ((__volatile__ struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
00044                                   (VIA_MAX_CACHELINE_SIZE - 1)) &     \
00045                                  ~(VIA_MAX_CACHELINE_SIZE - 1)) +     \
00046                                 VIA_MAX_CACHELINE_SIZE*(lockNo)))
00047 
00048 /* Each region is a minimum of 64k, and there are at most 64 of them.
00049  */
00050 #define VIA_NR_TEX_REGIONS 64
00051 #define VIA_LOG_MIN_TEX_REGION_SIZE 16
00052 #endif
00053 
00054 #define VIA_UPLOAD_TEX0IMAGE  0x1  /* handled clientside */
00055 #define VIA_UPLOAD_TEX1IMAGE  0x2  /* handled clientside */
00056 #define VIA_UPLOAD_CTX        0x4
00057 #define VIA_UPLOAD_BUFFERS    0x8
00058 #define VIA_UPLOAD_TEX0       0x10
00059 #define VIA_UPLOAD_TEX1       0x20
00060 #define VIA_UPLOAD_CLIPRECTS  0x40
00061 #define VIA_UPLOAD_ALL        0xff
00062 
00063 /* VIA specific ioctls */
00064 #define DRM_VIA_ALLOCMEM    0x00
00065 #define DRM_VIA_FREEMEM             0x01
00066 #define DRM_VIA_AGP_INIT    0x02
00067 #define DRM_VIA_FB_INIT             0x03
00068 #define DRM_VIA_MAP_INIT    0x04
00069 #define DRM_VIA_DEC_FUTEX       0x05
00070 #define NOT_USED
00071 #define DRM_VIA_DMA_INIT    0x07
00072 #define DRM_VIA_CMDBUFFER   0x08
00073 #define DRM_VIA_FLUSH               0x09
00074 #define DRM_VIA_PCICMD              0x0a
00075 #define DRM_VIA_CMDBUF_SIZE 0x0b
00076 #define NOT_USED
00077 #define DRM_VIA_WAIT_IRQ        0x0d
00078 #define DRM_VIA_DMA_BLIT        0x0e
00079 #define DRM_VIA_BLIT_SYNC       0x0f
00080 
00081 #define DRM_IOCTL_VIA_ALLOCMEM       DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
00082 #define DRM_IOCTL_VIA_FREEMEM        DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
00083 #define DRM_IOCTL_VIA_AGP_INIT       DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
00084 #define DRM_IOCTL_VIA_FB_INIT        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
00085 #define DRM_IOCTL_VIA_MAP_INIT       DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
00086 #define DRM_IOCTL_VIA_DEC_FUTEX   DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
00087 #define DRM_IOCTL_VIA_DMA_INIT       DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
00088 #define DRM_IOCTL_VIA_CMDBUFFER      DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
00089 #define DRM_IOCTL_VIA_FLUSH   DRM_IO(  DRM_COMMAND_BASE + DRM_VIA_FLUSH)
00090 #define DRM_IOCTL_VIA_PCICMD         DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
00091 #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
00092                                        drm_via_cmdbuf_size_t)
00093 #define DRM_IOCTL_VIA_WAIT_IRQ    DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
00094 #define DRM_IOCTL_VIA_DMA_BLIT    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
00095 #define DRM_IOCTL_VIA_BLIT_SYNC   DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
00096 
00097 /* Indices into buf.Setup where various bits of state are mirrored per
00098  * context and per buffer.  These can be fired at the card as a unit,
00099  * or in a piecewise fashion as required.
00100  */
00101 
00102 #define VIA_TEX_SETUP_SIZE 8
00103 
00104 /* Flags for clear ioctl
00105  */
00106 #define VIA_FRONT   0x1
00107 #define VIA_BACK    0x2
00108 #define VIA_DEPTH   0x4
00109 #define VIA_STENCIL 0x8
00110 #define VIA_MEM_VIDEO   0   /* matches drm constant */
00111 #define VIA_MEM_AGP     1   /* matches drm constant */
00112 #define VIA_MEM_SYSTEM  2
00113 #define VIA_MEM_MIXED   3
00114 #define VIA_MEM_UNKNOWN 4
00115 
00116 typedef struct {
00117        __u32 offset;
00118        __u32 size;
00119 } drm_via_agp_t;
00120 
00121 typedef struct {
00122        __u32 offset;
00123        __u32 size;
00124 } drm_via_fb_t;
00125 
00126 typedef struct {
00127        __u32 context;
00128        __u32 type;
00129        __u32 size;
00130        unsigned long index;
00131        unsigned long offset;
00132 } drm_via_mem_t;
00133 
00134 typedef struct _drm_via_init {
00135        enum {
00136               VIA_INIT_MAP = 0x01,
00137               VIA_CLEANUP_MAP = 0x02
00138        } func;
00139 
00140        unsigned long sarea_priv_offset;
00141        unsigned long fb_offset;
00142        unsigned long mmio_offset;
00143        unsigned long agpAddr;
00144 } drm_via_init_t;
00145 
00146 typedef struct _drm_via_futex {
00147        enum {
00148               VIA_FUTEX_WAIT = 0x00,
00149               VIA_FUTEX_WAKE = 0X01
00150        } func;
00151        __u32 ms;
00152        __u32 lock;
00153        __u32 val;
00154 } drm_via_futex_t;
00155 
00156 typedef struct _drm_via_dma_init {
00157        enum {
00158               VIA_INIT_DMA = 0x01,
00159               VIA_CLEANUP_DMA = 0x02,
00160               VIA_DMA_INITIALIZED = 0x03
00161        } func;
00162 
00163        unsigned long offset;
00164        unsigned long size;
00165        unsigned long reg_pause_addr;
00166 } drm_via_dma_init_t;
00167 
00168 typedef struct _drm_via_cmdbuffer {
00169        char *buf;
00170        unsigned long size;
00171 } drm_via_cmdbuffer_t;
00172 
00173 /* Warning: If you change the SAREA structure you must change the Xserver
00174  * structure as well */
00175 
00176 typedef struct _drm_via_tex_region {
00177        unsigned char next, prev;   /* indices to form a circular LRU  */
00178        unsigned char inUse; /* owned by a client, or free? */
00179        int age;             /* tracked by clients to update local LRU's */
00180 } drm_via_tex_region_t;
00181 
00182 typedef struct _drm_via_sarea {
00183        unsigned int dirty;
00184        unsigned int nbox;
00185        struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
00186        drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
00187        int texAge;          /* last time texture was uploaded */
00188        int ctxOwner;        /* last context to upload state */
00189        int vertexPrim;
00190 
00191        /*
00192         * Below is for XvMC.
00193         * We want the lock integers alone on, and aligned to, a cache line.
00194         * Therefore this somewhat strange construct.
00195         */
00196 
00197        char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
00198 
00199        unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
00200        unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
00201        unsigned int XvMCCtxNoGrabbed;     /* Last context to hold decoder */
00202 
00203        /* Used by the 3d driver only at this point, for pageflipping:
00204         */
00205        unsigned int pfCurrentOffset;
00206 } drm_via_sarea_t;
00207 
00208 typedef struct _drm_via_cmdbuf_size {
00209        enum {
00210               VIA_CMDBUF_SPACE = 0x01,
00211               VIA_CMDBUF_LAG = 0x02
00212        } func;
00213        int wait;
00214        __u32 size;
00215 } drm_via_cmdbuf_size_t;
00216 
00217 typedef enum {
00218        VIA_IRQ_ABSOLUTE = 0x0,
00219        VIA_IRQ_RELATIVE = 0x1,
00220        VIA_IRQ_SIGNAL = 0x10000000,
00221        VIA_IRQ_FORCE_SEQUENCE = 0x20000000
00222 } via_irq_seq_type_t;
00223 
00224 #define VIA_IRQ_FLAGS_MASK 0xF0000000
00225 
00226 enum drm_via_irqs {
00227        drm_via_irq_hqv0 = 0,
00228        drm_via_irq_hqv1,
00229        drm_via_irq_dma0_dd,
00230        drm_via_irq_dma0_td,
00231        drm_via_irq_dma1_dd,
00232        drm_via_irq_dma1_td,
00233        drm_via_irq_num
00234 };
00235 
00236 struct drm_via_wait_irq_request {
00237        unsigned irq;
00238        via_irq_seq_type_t type;
00239        __u32 sequence;
00240        __u32 signal;
00241 };
00242 
00243 typedef union drm_via_irqwait {
00244        struct drm_via_wait_irq_request request;
00245        struct drm_wait_vblank_reply reply;
00246 } drm_via_irqwait_t;
00247 
00248 typedef struct drm_via_blitsync {
00249        __u32 sync_handle;
00250        unsigned engine;
00251 } drm_via_blitsync_t;
00252 
00253 /* - * Below,"flags" is currently unused but will be used for possible future
00254  * extensions like kernel space bounce buffers for bad alignments and
00255  * blit engine busy-wait polling for better latency in the absence of
00256  * interrupts.
00257  */
00258 
00259 typedef struct drm_via_dmablit {
00260        __u32 num_lines;
00261        __u32 line_length;
00262 
00263        __u32 fb_addr;
00264        __u32 fb_stride;
00265 
00266        unsigned char *mem_addr;
00267        __u32 mem_stride;
00268 
00269        __u32 flags;
00270        int to_fb;
00271 
00272        drm_via_blitsync_t sync;
00273 } drm_via_dmablit_t;
00274 
00275 #endif                      /* _VIA_DRM_H_ */