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libdrm  2.4.37
savage_drm.h
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00001 /* savage_drm.h -- Public header for the savage driver
00002  *
00003  * Copyright 2004  Felix Kuehling
00004  * All Rights Reserved.
00005  *
00006  * Permission is hereby granted, free of charge, to any person obtaining a
00007  * copy of this software and associated documentation files (the "Software"),
00008  * to deal in the Software without restriction, including without limitation
00009  * the rights to use, copy, modify, merge, publish, distribute, sub license,
00010  * and/or sell copies of the Software, and to permit persons to whom the
00011  * Software is furnished to do so, subject to the following conditions:
00012  *
00013  * The above copyright notice and this permission notice (including the
00014  * next paragraph) shall be included in all copies or substantial portions
00015  * of the Software.
00016  *
00017  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
00018  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00019  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
00020  * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
00021  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
00022  * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
00023  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
00024  */
00025 
00026 #ifndef __SAVAGE_DRM_H__
00027 #define __SAVAGE_DRM_H__
00028 
00029 #ifndef __SAVAGE_SAREA_DEFINES__
00030 #define __SAVAGE_SAREA_DEFINES__
00031 
00032 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128
00033  * regions, subject to a minimum region size of (1<<16) == 64k.
00034  *
00035  * Clients may subdivide regions internally, but when sharing between
00036  * clients, the region size is the minimum granularity.
00037  */
00038 
00039 #define SAVAGE_CARD_HEAP           0
00040 #define SAVAGE_AGP_HEAP                   1
00041 #define SAVAGE_NR_TEX_HEAPS        2
00042 #define SAVAGE_NR_TEX_REGIONS             16
00043 #define SAVAGE_LOG_MIN_TEX_REGION_SIZE    16
00044 
00045 #endif                      /* __SAVAGE_SAREA_DEFINES__ */
00046 
00047 typedef struct _drm_savage_sarea {
00048        /* LRU lists for texture memory in agp space and on the card.
00049         */
00050        struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS +
00051                                                 1];
00052        unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
00053 
00054        /* Mechanism to validate card state.
00055         */
00056        int ctxOwner;
00057 } drm_savage_sarea_t, *drm_savage_sarea_ptr;
00058 
00059 /* Savage-specific ioctls
00060  */
00061 #define DRM_SAVAGE_BCI_INIT        0x00
00062 #define DRM_SAVAGE_BCI_CMDBUF           0x01
00063 #define DRM_SAVAGE_BCI_EVENT_EMIT  0x02
00064 #define DRM_SAVAGE_BCI_EVENT_WAIT  0x03
00065 
00066 #define DRM_IOCTL_SAVAGE_INIT             DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
00067 #define DRM_IOCTL_SAVAGE_CMDBUF           DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
00068 #define DRM_IOCTL_SAVAGE_EVENT_EMIT       DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
00069 #define DRM_IOCTL_SAVAGE_EVENT_WAIT       DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
00070 
00071 #define SAVAGE_DMA_PCI      1
00072 #define SAVAGE_DMA_AGP      3
00073 typedef struct drm_savage_init {
00074        enum {
00075               SAVAGE_INIT_BCI = 1,
00076               SAVAGE_CLEANUP_BCI = 2
00077        } func;
00078        unsigned int sarea_priv_offset;
00079 
00080        /* some parameters */
00081        unsigned int cob_size;
00082        unsigned int bci_threshold_lo, bci_threshold_hi;
00083        unsigned int dma_type;
00084 
00085        /* frame buffer layout */
00086        unsigned int fb_bpp;
00087        unsigned int front_offset, front_pitch;
00088        unsigned int back_offset, back_pitch;
00089        unsigned int depth_bpp;
00090        unsigned int depth_offset, depth_pitch;
00091 
00092        /* local textures */
00093        unsigned int texture_offset;
00094        unsigned int texture_size;
00095 
00096        /* physical locations of non-permanent maps */
00097        unsigned long status_offset;
00098        unsigned long buffers_offset;
00099        unsigned long agp_textures_offset;
00100        unsigned long cmd_dma_offset;
00101 } drm_savage_init_t;
00102 
00103 typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
00104 typedef struct drm_savage_cmdbuf {
00105        /* command buffer in client's address space */
00106        drm_savage_cmd_header_t *cmd_addr;
00107        unsigned int size;   /* size of the command buffer in 64bit units */
00108 
00109        unsigned int dma_idx;       /* DMA buffer index to use */
00110        int discard;         /* discard DMA buffer when done */
00111        /* vertex buffer in client's address space */
00112        unsigned int *vb_addr;
00113        unsigned int vb_size;       /* size of client vertex buffer in bytes */
00114        unsigned int vb_stride;     /* stride of vertices in 32bit words */
00115        /* boxes in client's address space */
00116        struct drm_clip_rect *box_addr;
00117        unsigned int nbox;   /* number of clipping boxes */
00118 } drm_savage_cmdbuf_t;
00119 
00120 #define SAVAGE_WAIT_2D  0x1 /* wait for 2D idle before updating event tag */
00121 #define SAVAGE_WAIT_3D  0x2 /* wait for 3D idle before updating event tag */
00122 #define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */
00123 typedef struct drm_savage_event {
00124        unsigned int count;
00125        unsigned int flags;
00126 } drm_savage_event_emit_t, drm_savage_event_wait_t;
00127 
00128 /* Commands for the cmdbuf ioctl
00129  */
00130 #define SAVAGE_CMD_STATE    0      /* a range of state registers */
00131 #define SAVAGE_CMD_DMA_PRIM 1      /* vertices from DMA buffer */
00132 #define SAVAGE_CMD_VB_PRIM  2      /* vertices from client vertex buffer */
00133 #define SAVAGE_CMD_DMA_IDX  3      /* indexed vertices from DMA buffer */
00134 #define SAVAGE_CMD_VB_IDX   4      /* indexed vertices client vertex buffer */
00135 #define SAVAGE_CMD_CLEAR    5      /* clear buffers */
00136 #define SAVAGE_CMD_SWAP            6      /* swap buffers */
00137 
00138 /* Primitive types
00139 */
00140 #define SAVAGE_PRIM_TRILIST 0      /* triangle list */
00141 #define SAVAGE_PRIM_TRISTRIP       1      /* triangle strip */
00142 #define SAVAGE_PRIM_TRIFAN  2      /* triangle fan */
00143 #define SAVAGE_PRIM_TRILIST_201    3      /* reorder verts for correct flat
00144                                     * shading on s3d */
00145 
00146 /* Skip flags (vertex format)
00147  */
00148 #define SAVAGE_SKIP_Z              0x01
00149 #define SAVAGE_SKIP_W              0x02
00150 #define SAVAGE_SKIP_C0             0x04
00151 #define SAVAGE_SKIP_C1             0x08
00152 #define SAVAGE_SKIP_S0             0x10
00153 #define SAVAGE_SKIP_T0             0x20
00154 #define SAVAGE_SKIP_ST0            0x30
00155 #define SAVAGE_SKIP_S1             0x40
00156 #define SAVAGE_SKIP_T1             0x80
00157 #define SAVAGE_SKIP_ST1            0xc0
00158 #define SAVAGE_SKIP_ALL_S3D 0x3f
00159 #define SAVAGE_SKIP_ALL_S4  0xff
00160 
00161 /* Buffer names for clear command
00162  */
00163 #define SAVAGE_FRONT        0x1
00164 #define SAVAGE_BACK         0x2
00165 #define SAVAGE_DEPTH        0x4
00166 
00167 /* 64-bit command header
00168  */
00169 union drm_savage_cmd_header {
00170        struct {
00171               unsigned char cmd;   /* command */
00172               unsigned char pad0;
00173               unsigned short pad1;
00174               unsigned short pad2;
00175               unsigned short pad3;
00176        } cmd;               /* generic */
00177        struct {
00178               unsigned char cmd;
00179               unsigned char global;       /* need idle engine? */
00180               unsigned short count;       /* number of consecutive registers */
00181               unsigned short start;       /* first register */
00182               unsigned short pad3;
00183        } state;             /* SAVAGE_CMD_STATE */
00184        struct {
00185               unsigned char cmd;
00186               unsigned char prim;  /* primitive type */
00187               unsigned short skip; /* vertex format (skip flags) */
00188               unsigned short count;       /* number of vertices */
00189               unsigned short start;       /* first vertex in DMA/vertex buffer */
00190        } prim;                     /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */
00191        struct {
00192               unsigned char cmd;
00193               unsigned char prim;
00194               unsigned short skip;
00195               unsigned short count;       /* number of indices that follow */
00196               unsigned short pad3;
00197        } idx;               /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */
00198        struct {
00199               unsigned char cmd;
00200               unsigned char pad0;
00201               unsigned short pad1;
00202               unsigned int flags;
00203        } clear0;            /* SAVAGE_CMD_CLEAR */
00204        struct {
00205               unsigned int mask;
00206               unsigned int value;
00207        } clear1;            /* SAVAGE_CMD_CLEAR data */
00208 };
00209 
00210 #endif