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libdrm  2.4.37
Classes | Defines | Typedefs
radeon_drm.h File Reference
#include "drm.h"
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Classes

union  drm_radeon_cmd_header_t
union  drm_r300_cmd_header_t
struct  radeon_color_regs_t
struct  drm_radeon_context_regs_t
struct  drm_radeon_context2_regs_t
struct  drm_radeon_texture_regs_t
struct  drm_radeon_prim_t
struct  drm_radeon_state_t
struct  drm_radeon_sarea_t
struct  drm_radeon_init
struct  drm_radeon_cp_stop
struct  drm_radeon_fullscreen
union  drm_radeon_clear_rect
struct  drm_radeon_clear
struct  drm_radeon_vertex
struct  drm_radeon_indices
struct  drm_radeon_vertex2
struct  drm_radeon_cmd_buffer
struct  drm_radeon_tex_image
struct  drm_radeon_texture
struct  drm_radeon_stipple
struct  drm_radeon_indirect
struct  drm_radeon_getparam
struct  drm_radeon_mem_alloc
struct  drm_radeon_mem_free
struct  drm_radeon_mem_init_heap
struct  drm_radeon_irq_emit
struct  drm_radeon_irq_wait
struct  drm_radeon_setparam
struct  drm_radeon_surface_alloc
struct  drm_radeon_surface_free
struct  drm_radeon_gem_info
struct  drm_radeon_gem_create
struct  drm_radeon_gem_set_tiling
struct  drm_radeon_gem_get_tiling
struct  drm_radeon_gem_mmap
struct  drm_radeon_gem_set_domain
struct  drm_radeon_gem_wait_idle
struct  drm_radeon_gem_busy
struct  drm_radeon_gem_pread
struct  drm_radeon_gem_pwrite
struct  drm_radeon_cs_chunk
struct  drm_radeon_cs_reloc
struct  drm_radeon_cs
struct  drm_radeon_info
struct  drm_radeon_cmd_header_t.header
struct  drm_radeon_cmd_header_t.packet
struct  drm_radeon_cmd_header_t.scalars
struct  drm_radeon_cmd_header_t.vectors
struct  drm_radeon_cmd_header_t.veclinear
struct  drm_radeon_cmd_header_t.dma
struct  drm_radeon_cmd_header_t.wait
struct  drm_r300_cmd_header_t.header
struct  drm_r300_cmd_header_t.packet0
struct  drm_r300_cmd_header_t.vpu
struct  drm_r300_cmd_header_t.packet3
struct  drm_r300_cmd_header_t.delay
struct  drm_r300_cmd_header_t.dma
struct  drm_r300_cmd_header_t.wait
struct  drm_r300_cmd_header_t.scratch
struct  drm_r300_cmd_header_t.r500fp

Defines

#define __RADEON_SAREA_DEFINES__
#define RADEON_UPLOAD_CONTEXT   0x00000001
#define RADEON_UPLOAD_VERTFMT   0x00000002
#define RADEON_UPLOAD_LINE   0x00000004
#define RADEON_UPLOAD_BUMPMAP   0x00000008
#define RADEON_UPLOAD_MASKS   0x00000010
#define RADEON_UPLOAD_VIEWPORT   0x00000020
#define RADEON_UPLOAD_SETUP   0x00000040
#define RADEON_UPLOAD_TCL   0x00000080
#define RADEON_UPLOAD_MISC   0x00000100
#define RADEON_UPLOAD_TEX0   0x00000200
#define RADEON_UPLOAD_TEX1   0x00000400
#define RADEON_UPLOAD_TEX2   0x00000800
#define RADEON_UPLOAD_TEX0IMAGES   0x00001000
#define RADEON_UPLOAD_TEX1IMAGES   0x00002000
#define RADEON_UPLOAD_TEX2IMAGES   0x00004000
#define RADEON_UPLOAD_CLIPRECTS   0x00008000 /* handled client-side */
#define RADEON_REQUIRE_QUIESCENCE   0x00010000
#define RADEON_UPLOAD_ZBIAS   0x00020000 /* version 1.2 and newer */
#define RADEON_UPLOAD_ALL   0x003effff
#define RADEON_UPLOAD_CONTEXT_ALL   0x003e01ff
#define RADEON_EMIT_PP_MISC   0 /* context/7 */
#define RADEON_EMIT_PP_CNTL   1 /* context/3 */
#define RADEON_EMIT_RB3D_COLORPITCH   2 /* context/1 */
#define RADEON_EMIT_RE_LINE_PATTERN   3 /* line/2 */
#define RADEON_EMIT_SE_LINE_WIDTH   4 /* line/1 */
#define RADEON_EMIT_PP_LUM_MATRIX   5 /* bumpmap/1 */
#define RADEON_EMIT_PP_ROT_MATRIX_0   6 /* bumpmap/2 */
#define RADEON_EMIT_RB3D_STENCILREFMASK   7 /* masks/3 */
#define RADEON_EMIT_SE_VPORT_XSCALE   8 /* viewport/6 */
#define RADEON_EMIT_SE_CNTL   9 /* setup/2 */
#define RADEON_EMIT_SE_CNTL_STATUS   10 /* setup/1 */
#define RADEON_EMIT_RE_MISC   11 /* misc/1 */
#define RADEON_EMIT_PP_TXFILTER_0   12 /* tex0/6 */
#define RADEON_EMIT_PP_BORDER_COLOR_0   13 /* tex0/1 */
#define RADEON_EMIT_PP_TXFILTER_1   14 /* tex1/6 */
#define RADEON_EMIT_PP_BORDER_COLOR_1   15 /* tex1/1 */
#define RADEON_EMIT_PP_TXFILTER_2   16 /* tex2/6 */
#define RADEON_EMIT_PP_BORDER_COLOR_2   17 /* tex2/1 */
#define RADEON_EMIT_SE_ZBIAS_FACTOR   18 /* zbias/2 */
#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT   19 /* tcl/11 */
#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED   20 /* material/17 */
#define R200_EMIT_PP_TXCBLEND_0   21 /* tex0/4 */
#define R200_EMIT_PP_TXCBLEND_1   22 /* tex1/4 */
#define R200_EMIT_PP_TXCBLEND_2   23 /* tex2/4 */
#define R200_EMIT_PP_TXCBLEND_3   24 /* tex3/4 */
#define R200_EMIT_PP_TXCBLEND_4   25 /* tex4/4 */
#define R200_EMIT_PP_TXCBLEND_5   26 /* tex5/4 */
#define R200_EMIT_PP_TXCBLEND_6   27 /* /4 */
#define R200_EMIT_PP_TXCBLEND_7   28 /* /4 */
#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0   29 /* tcl/7 */
#define R200_EMIT_TFACTOR_0   30 /* tf/7 */
#define R200_EMIT_VTX_FMT_0   31 /* vtx/5 */
#define R200_EMIT_VAP_CTL   32 /* vap/1 */
#define R200_EMIT_MATRIX_SELECT_0   33 /* msl/5 */
#define R200_EMIT_TEX_PROC_CTL_2   34 /* tcg/5 */
#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL   35 /* tcl/1 */
#define R200_EMIT_PP_TXFILTER_0   36 /* tex0/6 */
#define R200_EMIT_PP_TXFILTER_1   37 /* tex1/6 */
#define R200_EMIT_PP_TXFILTER_2   38 /* tex2/6 */
#define R200_EMIT_PP_TXFILTER_3   39 /* tex3/6 */
#define R200_EMIT_PP_TXFILTER_4   40 /* tex4/6 */
#define R200_EMIT_PP_TXFILTER_5   41 /* tex5/6 */
#define R200_EMIT_PP_TXOFFSET_0   42 /* tex0/1 */
#define R200_EMIT_PP_TXOFFSET_1   43 /* tex1/1 */
#define R200_EMIT_PP_TXOFFSET_2   44 /* tex2/1 */
#define R200_EMIT_PP_TXOFFSET_3   45 /* tex3/1 */
#define R200_EMIT_PP_TXOFFSET_4   46 /* tex4/1 */
#define R200_EMIT_PP_TXOFFSET_5   47 /* tex5/1 */
#define R200_EMIT_VTE_CNTL   48 /* vte/1 */
#define R200_EMIT_OUTPUT_VTX_COMP_SEL   49 /* vtx/1 */
#define R200_EMIT_PP_TAM_DEBUG3   50 /* tam/1 */
#define R200_EMIT_PP_CNTL_X   51 /* cst/1 */
#define R200_EMIT_RB3D_DEPTHXY_OFFSET   52 /* cst/1 */
#define R200_EMIT_RE_AUX_SCISSOR_CNTL   53 /* cst/1 */
#define R200_EMIT_RE_SCISSOR_TL_0   54 /* cst/2 */
#define R200_EMIT_RE_SCISSOR_TL_1   55 /* cst/2 */
#define R200_EMIT_RE_SCISSOR_TL_2   56 /* cst/2 */
#define R200_EMIT_SE_VAP_CNTL_STATUS   57 /* cst/1 */
#define R200_EMIT_SE_VTX_STATE_CNTL   58 /* cst/1 */
#define R200_EMIT_RE_POINTSIZE   59 /* cst/1 */
#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0   60 /* cst/4 */
#define R200_EMIT_PP_CUBIC_FACES_0   61
#define R200_EMIT_PP_CUBIC_OFFSETS_0   62
#define R200_EMIT_PP_CUBIC_FACES_1   63
#define R200_EMIT_PP_CUBIC_OFFSETS_1   64
#define R200_EMIT_PP_CUBIC_FACES_2   65
#define R200_EMIT_PP_CUBIC_OFFSETS_2   66
#define R200_EMIT_PP_CUBIC_FACES_3   67
#define R200_EMIT_PP_CUBIC_OFFSETS_3   68
#define R200_EMIT_PP_CUBIC_FACES_4   69
#define R200_EMIT_PP_CUBIC_OFFSETS_4   70
#define R200_EMIT_PP_CUBIC_FACES_5   71
#define R200_EMIT_PP_CUBIC_OFFSETS_5   72
#define RADEON_EMIT_PP_TEX_SIZE_0   73
#define RADEON_EMIT_PP_TEX_SIZE_1   74
#define RADEON_EMIT_PP_TEX_SIZE_2   75
#define R200_EMIT_RB3D_BLENDCOLOR   76
#define R200_EMIT_TCL_POINT_SPRITE_CNTL   77
#define RADEON_EMIT_PP_CUBIC_FACES_0   78
#define RADEON_EMIT_PP_CUBIC_OFFSETS_T0   79
#define RADEON_EMIT_PP_CUBIC_FACES_1   80
#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1   81
#define RADEON_EMIT_PP_CUBIC_FACES_2   82
#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2   83
#define R200_EMIT_PP_TRI_PERF_CNTL   84
#define R200_EMIT_PP_AFS_0   85
#define R200_EMIT_PP_AFS_1   86
#define R200_EMIT_ATF_TFACTOR   87
#define R200_EMIT_PP_TXCTLALL_0   88
#define R200_EMIT_PP_TXCTLALL_1   89
#define R200_EMIT_PP_TXCTLALL_2   90
#define R200_EMIT_PP_TXCTLALL_3   91
#define R200_EMIT_PP_TXCTLALL_4   92
#define R200_EMIT_PP_TXCTLALL_5   93
#define R200_EMIT_VAP_PVS_CNTL   94
#define RADEON_MAX_STATE_PACKETS   95
#define RADEON_CMD_PACKET   1 /* emit one of the register packets above */
#define RADEON_CMD_SCALARS   2 /* emit scalar data */
#define RADEON_CMD_VECTORS   3 /* emit vector data */
#define RADEON_CMD_DMA_DISCARD   4 /* discard current dma buf */
#define RADEON_CMD_PACKET3   5 /* emit hw packet */
#define RADEON_CMD_PACKET3_CLIP   6 /* emit hw packet wrapped in cliprects */
#define RADEON_CMD_SCALARS2   7 /* r200 stopgap */
#define RADEON_CMD_WAIT
#define RADEON_CMD_VECLINEAR   9 /* another r200 stopgap */
#define RADEON_WAIT_2D   0x1
#define RADEON_WAIT_3D   0x2
#define R300_CMD_PACKET3_CLEAR   0
#define R300_CMD_PACKET3_RAW   1
#define R300_CMD_PACKET0   1
#define R300_CMD_VPU   2 /* emit vertex program upload */
#define R300_CMD_PACKET3   3 /* emit a packet3 */
#define R300_CMD_END3D   4 /* emit sequence ending 3d rendering */
#define R300_CMD_CP_DELAY   5
#define R300_CMD_DMA_DISCARD   6
#define R300_CMD_WAIT   7
#define R300_WAIT_2D   0x1
#define R300_WAIT_3D   0x2
#define R300_WAIT_2D_CLEAN   0x3
#define R300_WAIT_3D_CLEAN   0x4
#define R300_NEW_WAIT_2D_3D   0x3
#define R300_NEW_WAIT_2D_2D_CLEAN   0x4
#define R300_NEW_WAIT_3D_3D_CLEAN   0x6
#define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN   0x8
#define R300_CMD_SCRATCH   8
#define R300_CMD_R500FP   9
#define RADEON_FRONT   0x1
#define RADEON_BACK   0x2
#define RADEON_DEPTH   0x4
#define RADEON_STENCIL   0x8
#define RADEON_CLEAR_FASTZ   0x80000000
#define RADEON_USE_HIERZ   0x40000000
#define RADEON_USE_COMP_ZBUF   0x20000000
#define R500FP_CONSTANT_TYPE   (1 << 1)
#define R500FP_CONSTANT_CLAMP   (1 << 2)
#define RADEON_POINTS   0x1
#define RADEON_LINES   0x2
#define RADEON_LINE_STRIP   0x3
#define RADEON_TRIANGLES   0x4
#define RADEON_TRIANGLE_FAN   0x5
#define RADEON_TRIANGLE_STRIP   0x6
#define RADEON_BUFFER_SIZE   65536
#define RADEON_INDEX_PRIM_OFFSET   20
#define RADEON_SCRATCH_REG_OFFSET   32
#define R600_SCRATCH_REG_OFFSET   256
#define RADEON_NR_SAREA_CLIPRECTS   12
#define RADEON_LOCAL_TEX_HEAP   0
#define RADEON_GART_TEX_HEAP   1
#define RADEON_NR_TEX_HEAPS   2
#define RADEON_NR_TEX_REGIONS   64
#define RADEON_LOG_TEX_GRANULARITY   16
#define RADEON_MAX_TEXTURE_LEVELS   12
#define RADEON_MAX_TEXTURE_UNITS   3
#define RADEON_MAX_SURFACES   8
#define RADEON_OFFSET_SHIFT   10
#define RADEON_OFFSET_ALIGN   (1 << RADEON_OFFSET_SHIFT)
#define RADEON_OFFSET_MASK   (RADEON_OFFSET_ALIGN - 1)
#define DRM_RADEON_CP_INIT   0x00
#define DRM_RADEON_CP_START   0x01
#define DRM_RADEON_CP_STOP   0x02
#define DRM_RADEON_CP_RESET   0x03
#define DRM_RADEON_CP_IDLE   0x04
#define DRM_RADEON_RESET   0x05
#define DRM_RADEON_FULLSCREEN   0x06
#define DRM_RADEON_SWAP   0x07
#define DRM_RADEON_CLEAR   0x08
#define DRM_RADEON_VERTEX   0x09
#define DRM_RADEON_INDICES   0x0A
#define DRM_RADEON_NOT_USED
#define DRM_RADEON_STIPPLE   0x0C
#define DRM_RADEON_INDIRECT   0x0D
#define DRM_RADEON_TEXTURE   0x0E
#define DRM_RADEON_VERTEX2   0x0F
#define DRM_RADEON_CMDBUF   0x10
#define DRM_RADEON_GETPARAM   0x11
#define DRM_RADEON_FLIP   0x12
#define DRM_RADEON_ALLOC   0x13
#define DRM_RADEON_FREE   0x14
#define DRM_RADEON_INIT_HEAP   0x15
#define DRM_RADEON_IRQ_EMIT   0x16
#define DRM_RADEON_IRQ_WAIT   0x17
#define DRM_RADEON_CP_RESUME   0x18
#define DRM_RADEON_SETPARAM   0x19
#define DRM_RADEON_SURF_ALLOC   0x1a
#define DRM_RADEON_SURF_FREE   0x1b
#define DRM_RADEON_GEM_INFO   0x1c
#define DRM_RADEON_GEM_CREATE   0x1d
#define DRM_RADEON_GEM_MMAP   0x1e
#define DRM_RADEON_GEM_PREAD   0x21
#define DRM_RADEON_GEM_PWRITE   0x22
#define DRM_RADEON_GEM_SET_DOMAIN   0x23
#define DRM_RADEON_GEM_WAIT_IDLE   0x24
#define DRM_RADEON_CS   0x26
#define DRM_RADEON_INFO   0x27
#define DRM_RADEON_GEM_SET_TILING   0x28
#define DRM_RADEON_GEM_GET_TILING   0x29
#define DRM_RADEON_GEM_BUSY   0x2a
#define DRM_IOCTL_RADEON_CP_INIT   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
#define DRM_IOCTL_RADEON_CP_START   DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
#define DRM_IOCTL_RADEON_CP_STOP   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_STOP, drm_radeon_cp_stop_t)
#define DRM_IOCTL_RADEON_CP_RESET   DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET)
#define DRM_IOCTL_RADEON_CP_IDLE   DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE)
#define DRM_IOCTL_RADEON_RESET   DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_RESET)
#define DRM_IOCTL_RADEON_FULLSCREEN   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FULLSCREEN, drm_radeon_fullscreen_t)
#define DRM_IOCTL_RADEON_SWAP   DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_SWAP)
#define DRM_IOCTL_RADEON_CLEAR   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CLEAR, drm_radeon_clear_t)
#define DRM_IOCTL_RADEON_VERTEX   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX, drm_radeon_vertex_t)
#define DRM_IOCTL_RADEON_INDICES   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INDICES, drm_radeon_indices_t)
#define DRM_IOCTL_RADEON_STIPPLE   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_STIPPLE, drm_radeon_stipple_t)
#define DRM_IOCTL_RADEON_INDIRECT   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INDIRECT, drm_radeon_indirect_t)
#define DRM_IOCTL_RADEON_TEXTURE   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_TEXTURE, drm_radeon_texture_t)
#define DRM_IOCTL_RADEON_VERTEX2   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX2, drm_radeon_vertex2_t)
#define DRM_IOCTL_RADEON_CMDBUF   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CMDBUF, drm_radeon_cmd_buffer_t)
#define DRM_IOCTL_RADEON_GETPARAM   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GETPARAM, drm_radeon_getparam_t)
#define DRM_IOCTL_RADEON_FLIP   DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_FLIP)
#define DRM_IOCTL_RADEON_ALLOC   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_ALLOC, drm_radeon_mem_alloc_t)
#define DRM_IOCTL_RADEON_FREE   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FREE, drm_radeon_mem_free_t)
#define DRM_IOCTL_RADEON_INIT_HEAP   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INIT_HEAP, drm_radeon_mem_init_heap_t)
#define DRM_IOCTL_RADEON_IRQ_EMIT   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_IRQ_EMIT, drm_radeon_irq_emit_t)
#define DRM_IOCTL_RADEON_IRQ_WAIT   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t)
#define DRM_IOCTL_RADEON_CP_RESUME   DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME)
#define DRM_IOCTL_RADEON_SETPARAM   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t)
#define DRM_IOCTL_RADEON_SURF_ALLOC   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t)
#define DRM_IOCTL_RADEON_SURF_FREE   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t)
#define DRM_IOCTL_RADEON_GEM_INFO   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_INFO, struct drm_radeon_gem_info)
#define DRM_IOCTL_RADEON_GEM_CREATE   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_CREATE, struct drm_radeon_gem_create)
#define DRM_IOCTL_RADEON_GEM_MMAP   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_MMAP, struct drm_radeon_gem_mmap)
#define DRM_IOCTL_RADEON_GEM_PREAD   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PREAD, struct drm_radeon_gem_pread)
#define DRM_IOCTL_RADEON_GEM_PWRITE   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite)
#define DRM_IOCTL_RADEON_GEM_SET_DOMAIN   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain)
#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE   DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle)
#define DRM_IOCTL_RADEON_CS   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
#define DRM_IOCTL_RADEON_INFO   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)
#define DRM_IOCTL_RADEON_SET_TILING   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
#define DRM_IOCTL_RADEON_GET_TILING   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
#define DRM_IOCTL_RADEON_GEM_BUSY   DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)
#define CLEAR_X1   0
#define CLEAR_Y1   1
#define CLEAR_X2   2
#define CLEAR_Y2   3
#define CLEAR_DEPTH   4
#define RADEON_CARD_PCI   0
#define RADEON_CARD_AGP   1
#define RADEON_CARD_PCIE   2
#define RADEON_PARAM_GART_BUFFER_OFFSET   1 /* card offset of 1st GART buffer */
#define RADEON_PARAM_LAST_FRAME   2
#define RADEON_PARAM_LAST_DISPATCH   3
#define RADEON_PARAM_LAST_CLEAR   4
#define RADEON_PARAM_IRQ_NR   5
#define RADEON_PARAM_GART_BASE   6 /* card offset of GART base */
#define RADEON_PARAM_REGISTER_HANDLE   7 /* for drmMap() */
#define RADEON_PARAM_STATUS_HANDLE   8
#define RADEON_PARAM_SAREA_HANDLE   9
#define RADEON_PARAM_GART_TEX_HANDLE   10
#define RADEON_PARAM_SCRATCH_OFFSET   11
#define RADEON_PARAM_CARD_TYPE   12
#define RADEON_PARAM_VBLANK_CRTC   13 /* VBLANK CRTC */
#define RADEON_PARAM_FB_LOCATION   14 /* FB location */
#define RADEON_PARAM_NUM_GB_PIPES   15 /* num GB pipes */
#define RADEON_PARAM_DEVICE_ID   16
#define RADEON_PARAM_NUM_Z_PIPES   17 /* num Z pipes */
#define RADEON_MEM_REGION_GART   1
#define RADEON_MEM_REGION_FB   2
#define RADEON_SETPARAM_FB_LOCATION   1 /* determined framebuffer location */
#define RADEON_SETPARAM_SWITCH_TILING   2 /* enable/disable color tiling */
#define RADEON_SETPARAM_PCIGART_LOCATION   3 /* PCI Gart Location */
#define RADEON_SETPARAM_NEW_MEMMAP   4 /* Use new memory map */
#define RADEON_SETPARAM_PCIGART_TABLE_SIZE   5 /* PCI GART Table Size */
#define RADEON_SETPARAM_VBLANK_CRTC   6 /* VBLANK CRTC */
#define DRM_RADEON_VBLANK_CRTC1   1
#define DRM_RADEON_VBLANK_CRTC2   2
#define RADEON_GEM_DOMAIN_CPU   0x1
#define RADEON_GEM_DOMAIN_GTT   0x2
#define RADEON_GEM_DOMAIN_VRAM   0x4
#define RADEON_GEM_NO_BACKING_STORE   1
#define RADEON_TILING_MACRO   0x1
#define RADEON_TILING_MICRO   0x2
#define RADEON_TILING_SWAP_16BIT   0x4
#define RADEON_TILING_SWAP_32BIT   0x8
#define RADEON_TILING_SURFACE   0x10
#define RADEON_TILING_MICRO_SQUARE   0x20
#define RADEON_TILING_EG_BANKW_SHIFT   8
#define RADEON_TILING_EG_BANKW_MASK   0xf
#define RADEON_TILING_EG_BANKH_SHIFT   12
#define RADEON_TILING_EG_BANKH_MASK   0xf
#define RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT   16
#define RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK   0xf
#define RADEON_TILING_EG_TILE_SPLIT_SHIFT   24
#define RADEON_TILING_EG_TILE_SPLIT_MASK   0xf
#define RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT   28
#define RADEON_TILING_EG_STENCIL_TILE_SPLIT_MASK   0xf
#define RADEON_CHUNK_ID_RELOCS   0x01
#define RADEON_CHUNK_ID_IB   0x02
#define RADEON_INFO_DEVICE_ID   0x00
#define RADEON_INFO_NUM_GB_PIPES   0x01
#define RADEON_INFO_NUM_Z_PIPES   0x02
#define RADEON_INFO_ACCEL_WORKING   0x03
#define RADEON_INFO_CRTC_FROM_ID   0x04
#define RADEON_INFO_ACCEL_WORKING2   0x05
#define RADEON_INFO_TILING_CONFIG   0x06
#define RADEON_INFO_WANT_HYPERZ   0x07

Typedefs

typedef struct drm_radeon_init drm_radeon_init_t
typedef struct drm_radeon_cp_stop drm_radeon_cp_stop_t
typedef struct
drm_radeon_fullscreen 
drm_radeon_fullscreen_t
typedef union drm_radeon_clear_rect drm_radeon_clear_rect_t
typedef struct drm_radeon_clear drm_radeon_clear_t
typedef struct drm_radeon_vertex drm_radeon_vertex_t
typedef struct drm_radeon_indices drm_radeon_indices_t
typedef struct drm_radeon_vertex2 drm_radeon_vertex2_t
typedef struct
drm_radeon_cmd_buffer 
drm_radeon_cmd_buffer_t
typedef struct drm_radeon_tex_image drm_radeon_tex_image_t
typedef struct drm_radeon_texture drm_radeon_texture_t
typedef struct drm_radeon_stipple drm_radeon_stipple_t
typedef struct drm_radeon_indirect drm_radeon_indirect_t
typedef struct drm_radeon_getparam drm_radeon_getparam_t
typedef struct drm_radeon_mem_alloc drm_radeon_mem_alloc_t
typedef struct drm_radeon_mem_free drm_radeon_mem_free_t
typedef struct
drm_radeon_mem_init_heap 
drm_radeon_mem_init_heap_t
typedef struct drm_radeon_irq_emit drm_radeon_irq_emit_t
typedef struct drm_radeon_irq_wait drm_radeon_irq_wait_t
typedef struct drm_radeon_setparam drm_radeon_setparam_t
typedef struct
drm_radeon_surface_alloc 
drm_radeon_surface_alloc_t
typedef struct
drm_radeon_surface_free 
drm_radeon_surface_free_t

Class Documentation

union drm_radeon_cmd_header_t

Definition at line 182 of file radeon_drm.h.

Class Members
struct drm_radeon_cmd_header_t dma
struct drm_radeon_cmd_header_t header
int i
struct drm_radeon_cmd_header_t packet
struct drm_radeon_cmd_header_t scalars
struct drm_radeon_cmd_header_t veclinear
struct drm_radeon_cmd_header_t vectors
struct drm_radeon_cmd_header_t wait
union drm_r300_cmd_header_t

Definition at line 245 of file radeon_drm.h.

Class Members
struct drm_r300_cmd_header_t delay
struct drm_r300_cmd_header_t dma
struct drm_r300_cmd_header_t header
struct drm_r300_cmd_header_t packet0
struct drm_r300_cmd_header_t packet3
struct drm_r300_cmd_header_t r500fp
struct drm_r300_cmd_header_t scratch
unsigned int u
struct drm_r300_cmd_header_t vpu
struct drm_r300_cmd_header_t wait
struct radeon_color_regs_t

Definition at line 334 of file radeon_drm.h.

Class Members
unsigned int alpha
unsigned int blue
unsigned int green
unsigned int red
struct drm_radeon_context_regs_t

Definition at line 341 of file radeon_drm.h.

Class Members
unsigned int pp_cntl
unsigned int pp_fog_color
unsigned int pp_lum_matrix
unsigned int pp_misc
unsigned int pp_rot_matrix_0
unsigned int pp_rot_matrix_1
unsigned int rb3d_blendcntl
unsigned int rb3d_cntl
unsigned int rb3d_coloroffset
unsigned int rb3d_colorpitch
unsigned int rb3d_depthoffset
unsigned int rb3d_depthpitch
unsigned int rb3d_planemask
unsigned int rb3d_ropcntl
unsigned int rb3d_stencilrefmask
unsigned int rb3d_zstencilcntl
unsigned int re_line_pattern
unsigned int re_line_state
unsigned int re_misc
unsigned int re_solid_color
unsigned int re_top_left
unsigned int re_width_height
unsigned int se_cntl
unsigned int se_cntl_status
unsigned int se_coord_fmt
unsigned int se_line_width
unsigned int se_vport_xoffset
unsigned int se_vport_xscale
unsigned int se_vport_yoffset
unsigned int se_vport_yscale
unsigned int se_vport_zoffset
unsigned int se_vport_zscale
struct drm_radeon_context2_regs_t

Definition at line 394 of file radeon_drm.h.

Class Members
unsigned int se_zbias_constant
unsigned int se_zbias_factor
struct drm_radeon_texture_regs_t

Definition at line 402 of file radeon_drm.h.

Class Members
unsigned int pp_border_color
unsigned int pp_tfactor
unsigned int pp_txablend
unsigned int pp_txcblend
unsigned int pp_txfilter
unsigned int pp_txformat
unsigned int pp_txoffset
struct drm_radeon_prim_t

Definition at line 412 of file radeon_drm.h.

Class Members
unsigned int finish
unsigned int numverts:16
unsigned int prim:8
unsigned int start
unsigned int stateidx:8
unsigned int vc_format
struct drm_radeon_state_t

Definition at line 421 of file radeon_drm.h.

Collaboration diagram for drm_radeon_state_t:
Class Members
drm_radeon_context_regs_t context
drm_radeon_context2_regs_t context2
unsigned int dirty
drm_radeon_texture_regs_t tex
struct drm_radeon_sarea_t

Definition at line 428 of file radeon_drm.h.

Collaboration diagram for drm_radeon_sarea_t:
Class Members
drm_radeon_context_regs_t context_state
int crtc2_base
int ctx_owner
unsigned int dirty
unsigned int last_clear
unsigned int last_dispatch
unsigned int last_frame
unsigned int nbox
int pfCurrentPage
int pfState
unsigned int tex_age
drm_radeon_texture_regs_t tex_state
int tiling_enabled
unsigned int vc_format
unsigned int vertsize
struct drm_radeon_cp_stop

Definition at line 581 of file radeon_drm.h.

Class Members
int flush
int idle
union drm_radeon_clear_rect

Definition at line 599 of file radeon_drm.h.

Class Members
float f
unsigned int ui
struct drm_radeon_clear

Definition at line 604 of file radeon_drm.h.

Collaboration diagram for drm_radeon_clear:
Class Members
unsigned int clear_color
unsigned int clear_depth
unsigned int color_mask
drm_radeon_clear_rect_t * depth_boxes
unsigned int depth_mask
unsigned int flags
struct drm_radeon_vertex

Definition at line 613 of file radeon_drm.h.

Class Members
int count
int discard
int idx
int prim
struct drm_radeon_indices

Definition at line 620 of file radeon_drm.h.

Class Members
int discard
int end
int idx
int prim
int start
struct drm_radeon_vertex2

Definition at line 632 of file radeon_drm.h.

Collaboration diagram for drm_radeon_vertex2:
Class Members
int discard
int idx
int nr_prims
int nr_states
drm_radeon_prim_t * prim
drm_radeon_state_t * state
struct drm_radeon_cmd_buffer

Definition at line 651 of file radeon_drm.h.

Collaboration diagram for drm_radeon_cmd_buffer:
Class Members
struct drm_clip_rect * boxes
char * buf
int bufsz
int nbox
struct drm_radeon_tex_image

Definition at line 658 of file radeon_drm.h.

Class Members
const void * data
unsigned int height
unsigned int width
unsigned int x
unsigned int y
struct drm_radeon_texture

Definition at line 664 of file radeon_drm.h.

Collaboration diagram for drm_radeon_texture:
Class Members
int format
int height
drm_radeon_tex_image_t * image
unsigned int offset
int pitch
int width
struct drm_radeon_stipple

Definition at line 673 of file radeon_drm.h.

Class Members
unsigned int * mask
struct drm_radeon_indirect

Definition at line 677 of file radeon_drm.h.

Class Members
int discard
int end
int idx
int start
struct drm_radeon_getparam

Definition at line 712 of file radeon_drm.h.

Class Members
int param
void * value
struct drm_radeon_mem_alloc

Definition at line 722 of file radeon_drm.h.

Class Members
int alignment
int region
int * region_offset
int size
struct drm_radeon_mem_free

Definition at line 729 of file radeon_drm.h.

Class Members
int region
int region_offset
struct drm_radeon_mem_init_heap

Definition at line 734 of file radeon_drm.h.

Class Members
int region
int size
int start
struct drm_radeon_irq_emit

Definition at line 742 of file radeon_drm.h.

Class Members
int * irq_seq
struct drm_radeon_irq_wait

Definition at line 746 of file radeon_drm.h.

Class Members
int irq_seq
struct drm_radeon_setparam

Definition at line 754 of file radeon_drm.h.

Class Members
unsigned int param
__s64 value
struct drm_radeon_surface_alloc

Definition at line 767 of file radeon_drm.h.

Class Members
unsigned int address
unsigned int flags
unsigned int size
struct drm_radeon_surface_free

Definition at line 773 of file radeon_drm.h.

Class Members
unsigned int address
struct drm_radeon_gem_info

Definition at line 787 of file radeon_drm.h.

Class Members
uint64_t gart_size
uint64_t vram_size
uint64_t vram_visible
struct drm_radeon_gem_create

Definition at line 795 of file radeon_drm.h.

Class Members
uint64_t alignment
uint32_t flags
uint32_t handle
uint32_t initial_domain
uint64_t size
struct drm_radeon_gem_set_tiling

Definition at line 821 of file radeon_drm.h.

Class Members
uint32_t handle
uint32_t pitch
uint32_t tiling_flags
struct drm_radeon_gem_get_tiling

Definition at line 827 of file radeon_drm.h.

Class Members
uint32_t handle
uint32_t pitch
uint32_t tiling_flags
struct drm_radeon_gem_mmap

Definition at line 833 of file radeon_drm.h.

Class Members
uint64_t addr_ptr
uint32_t handle
uint64_t offset
uint32_t pad
uint64_t size
struct drm_radeon_gem_set_domain

Definition at line 841 of file radeon_drm.h.

Class Members
uint32_t handle
uint32_t read_domains
uint32_t write_domain
struct drm_radeon_gem_wait_idle

Definition at line 847 of file radeon_drm.h.

Class Members
uint32_t handle
uint32_t pad
struct drm_radeon_gem_busy

Definition at line 852 of file radeon_drm.h.

Class Members
uint32_t domain
uint32_t handle
struct drm_radeon_gem_pread

Definition at line 857 of file radeon_drm.h.

Class Members
uint64_t data_ptr Pointer to write the data into.
uint32_t handle Handle for the object being read.
uint64_t offset Offset into the object to read from.
uint32_t pad
uint64_t size Length of data to read.
struct drm_radeon_gem_pwrite

Definition at line 870 of file radeon_drm.h.

Class Members
uint64_t data_ptr Pointer to read the data from.
uint32_t handle Handle for the object being written to.
uint64_t offset Offset into the object to write to.
uint32_t pad
uint64_t size Length of data to write.
struct drm_radeon_cs_chunk

Definition at line 886 of file radeon_drm.h.

Class Members
uint64_t chunk_data
uint32_t chunk_id
uint32_t length_dw
struct drm_radeon_cs_reloc

Definition at line 892 of file radeon_drm.h.

Class Members
uint32_t flags
uint32_t handle
uint32_t read_domains
uint32_t write_domain
struct drm_radeon_cs

Definition at line 899 of file radeon_drm.h.

Class Members
uint64_t chunks
uint32_t cs_id
uint64_t gart_limit
uint32_t num_chunks
uint64_t vram_limit
struct drm_radeon_info

Definition at line 918 of file radeon_drm.h.

Class Members
uint32_t pad
uint32_t request
uint64_t value
struct drm_radeon_cmd_header_t.header

Definition at line 184 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char pad0
unsigned char pad1
unsigned char pad2
struct drm_radeon_cmd_header_t.packet

Definition at line 187 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char packet_id
unsigned char pad0
unsigned char pad1
struct drm_radeon_cmd_header_t.scalars

Definition at line 190 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char count
unsigned char offset
unsigned char stride
struct drm_radeon_cmd_header_t.vectors

Definition at line 193 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char count
unsigned char offset
unsigned char stride
struct drm_radeon_cmd_header_t.veclinear

Definition at line 196 of file radeon_drm.h.

Class Members
unsigned char addr_hi
unsigned char addr_lo
unsigned char cmd_type
unsigned char count
struct drm_radeon_cmd_header_t.dma

Definition at line 199 of file radeon_drm.h.

Class Members
unsigned char buf_idx
unsigned char cmd_type
unsigned char pad0
unsigned char pad1
struct drm_radeon_cmd_header_t.wait

Definition at line 202 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char flags
unsigned char pad0
unsigned char pad1
struct drm_r300_cmd_header_t.header

Definition at line 247 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char pad0
unsigned char pad1
unsigned char pad2
struct drm_r300_cmd_header_t.packet0

Definition at line 250 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char count
unsigned char reghi
unsigned char reglo
struct drm_r300_cmd_header_t.vpu

Definition at line 253 of file radeon_drm.h.

Class Members
unsigned char adrhi
unsigned char adrlo
unsigned char cmd_type
unsigned char count
struct drm_r300_cmd_header_t.packet3

Definition at line 256 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char packet
unsigned char pad0
unsigned char pad1
struct drm_r300_cmd_header_t.delay

Definition at line 259 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned short count
unsigned char packet
struct drm_r300_cmd_header_t.dma

Definition at line 263 of file radeon_drm.h.

Class Members
unsigned char buf_idx
unsigned char cmd_type
unsigned char pad0
unsigned char pad1
struct drm_r300_cmd_header_t.wait

Definition at line 266 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char flags
unsigned char pad0
unsigned char pad1
struct drm_r300_cmd_header_t.scratch

Definition at line 269 of file radeon_drm.h.

Class Members
unsigned char cmd_type
unsigned char flags
unsigned char n_bufs
unsigned char reg
struct drm_r300_cmd_header_t.r500fp

Definition at line 272 of file radeon_drm.h.

Class Members
unsigned char adrhi_flags
unsigned char adrlo
unsigned char cmd_type
unsigned char count

Define Documentation

Definition at line 42 of file radeon_drm.h.

#define CLEAR_DEPTH   4

Definition at line 597 of file radeon_drm.h.

#define CLEAR_X1   0

Definition at line 593 of file radeon_drm.h.

#define CLEAR_X2   2

Definition at line 595 of file radeon_drm.h.

#define CLEAR_Y1   1

Definition at line 594 of file radeon_drm.h.

#define CLEAR_Y2   3

Definition at line 596 of file radeon_drm.h.

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Definition at line 525 of file radeon_drm.h.

#define DRM_RADEON_ALLOC   0x13

Definition at line 488 of file radeon_drm.h.

#define DRM_RADEON_CLEAR   0x08

Definition at line 477 of file radeon_drm.h.

#define DRM_RADEON_CMDBUF   0x10

Definition at line 485 of file radeon_drm.h.

#define DRM_RADEON_CP_IDLE   0x04

Definition at line 473 of file radeon_drm.h.

#define DRM_RADEON_CP_INIT   0x00

Definition at line 469 of file radeon_drm.h.

#define DRM_RADEON_CP_RESET   0x03

Definition at line 472 of file radeon_drm.h.

#define DRM_RADEON_CP_RESUME   0x18

Definition at line 493 of file radeon_drm.h.

#define DRM_RADEON_CP_START   0x01

Definition at line 470 of file radeon_drm.h.

#define DRM_RADEON_CP_STOP   0x02

Definition at line 471 of file radeon_drm.h.

#define DRM_RADEON_CS   0x26

Definition at line 505 of file radeon_drm.h.

#define DRM_RADEON_FLIP   0x12

Definition at line 487 of file radeon_drm.h.

#define DRM_RADEON_FREE   0x14

Definition at line 489 of file radeon_drm.h.

#define DRM_RADEON_FULLSCREEN   0x06

Definition at line 475 of file radeon_drm.h.

#define DRM_RADEON_GEM_BUSY   0x2a

Definition at line 509 of file radeon_drm.h.

#define DRM_RADEON_GEM_CREATE   0x1d

Definition at line 499 of file radeon_drm.h.

#define DRM_RADEON_GEM_GET_TILING   0x29

Definition at line 508 of file radeon_drm.h.

#define DRM_RADEON_GEM_INFO   0x1c

Definition at line 498 of file radeon_drm.h.

#define DRM_RADEON_GEM_MMAP   0x1e

Definition at line 500 of file radeon_drm.h.

#define DRM_RADEON_GEM_PREAD   0x21

Definition at line 501 of file radeon_drm.h.

#define DRM_RADEON_GEM_PWRITE   0x22

Definition at line 502 of file radeon_drm.h.

#define DRM_RADEON_GEM_SET_DOMAIN   0x23

Definition at line 503 of file radeon_drm.h.

#define DRM_RADEON_GEM_SET_TILING   0x28

Definition at line 507 of file radeon_drm.h.

#define DRM_RADEON_GEM_WAIT_IDLE   0x24

Definition at line 504 of file radeon_drm.h.

#define DRM_RADEON_GETPARAM   0x11

Definition at line 486 of file radeon_drm.h.

#define DRM_RADEON_INDICES   0x0A

Definition at line 479 of file radeon_drm.h.

#define DRM_RADEON_INDIRECT   0x0D

Definition at line 482 of file radeon_drm.h.

#define DRM_RADEON_INFO   0x27

Definition at line 506 of file radeon_drm.h.

#define DRM_RADEON_INIT_HEAP   0x15

Definition at line 490 of file radeon_drm.h.

#define DRM_RADEON_IRQ_EMIT   0x16

Definition at line 491 of file radeon_drm.h.

#define DRM_RADEON_IRQ_WAIT   0x17

Definition at line 492 of file radeon_drm.h.

Definition at line 480 of file radeon_drm.h.

#define DRM_RADEON_RESET   0x05

Definition at line 474 of file radeon_drm.h.

#define DRM_RADEON_SETPARAM   0x19

Definition at line 494 of file radeon_drm.h.

#define DRM_RADEON_STIPPLE   0x0C

Definition at line 481 of file radeon_drm.h.

#define DRM_RADEON_SURF_ALLOC   0x1a

Definition at line 495 of file radeon_drm.h.

#define DRM_RADEON_SURF_FREE   0x1b

Definition at line 496 of file radeon_drm.h.

#define DRM_RADEON_SWAP   0x07

Definition at line 476 of file radeon_drm.h.

#define DRM_RADEON_TEXTURE   0x0E

Definition at line 483 of file radeon_drm.h.

#define DRM_RADEON_VBLANK_CRTC1   1

Definition at line 777 of file radeon_drm.h.

#define DRM_RADEON_VBLANK_CRTC2   2

Definition at line 778 of file radeon_drm.h.

#define DRM_RADEON_VERTEX   0x09

Definition at line 478 of file radeon_drm.h.

#define DRM_RADEON_VERTEX2   0x0F

Definition at line 484 of file radeon_drm.h.

#define R200_EMIT_ATF_TFACTOR   87

Definition at line 159 of file radeon_drm.h.

#define R200_EMIT_MATRIX_SELECT_0   33 /* msl/5 */

Definition at line 105 of file radeon_drm.h.

#define R200_EMIT_OUTPUT_VTX_COMP_SEL   49 /* vtx/1 */

Definition at line 121 of file radeon_drm.h.

#define R200_EMIT_PP_AFS_0   85

Definition at line 157 of file radeon_drm.h.

#define R200_EMIT_PP_AFS_1   86

Definition at line 158 of file radeon_drm.h.

#define R200_EMIT_PP_CNTL_X   51 /* cst/1 */

Definition at line 123 of file radeon_drm.h.

#define R200_EMIT_PP_CUBIC_FACES_0   61

Definition at line 133 of file radeon_drm.h.

#define R200_EMIT_PP_CUBIC_FACES_1   63

Definition at line 135 of file radeon_drm.h.

#define R200_EMIT_PP_CUBIC_FACES_2   65

Definition at line 137 of file radeon_drm.h.

#define R200_EMIT_PP_CUBIC_FACES_3   67

Definition at line 139 of file radeon_drm.h.

#define R200_EMIT_PP_CUBIC_FACES_4   69

Definition at line 141 of file radeon_drm.h.

#define R200_EMIT_PP_CUBIC_FACES_5   71

Definition at line 143 of file radeon_drm.h.

Definition at line 134 of file radeon_drm.h.

Definition at line 136 of file radeon_drm.h.

Definition at line 138 of file radeon_drm.h.

Definition at line 140 of file radeon_drm.h.

Definition at line 142 of file radeon_drm.h.

Definition at line 144 of file radeon_drm.h.

#define R200_EMIT_PP_TAM_DEBUG3   50 /* tam/1 */

Definition at line 122 of file radeon_drm.h.

#define R200_EMIT_PP_TRI_PERF_CNTL   84

Definition at line 156 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_0   21 /* tex0/4 */

Definition at line 93 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_1   22 /* tex1/4 */

Definition at line 94 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_2   23 /* tex2/4 */

Definition at line 95 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_3   24 /* tex3/4 */

Definition at line 96 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_4   25 /* tex4/4 */

Definition at line 97 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_5   26 /* tex5/4 */

Definition at line 98 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_6   27 /* /4 */

Definition at line 99 of file radeon_drm.h.

#define R200_EMIT_PP_TXCBLEND_7   28 /* /4 */

Definition at line 100 of file radeon_drm.h.

#define R200_EMIT_PP_TXCTLALL_0   88

Definition at line 160 of file radeon_drm.h.

#define R200_EMIT_PP_TXCTLALL_1   89

Definition at line 161 of file radeon_drm.h.

#define R200_EMIT_PP_TXCTLALL_2   90

Definition at line 162 of file radeon_drm.h.

#define R200_EMIT_PP_TXCTLALL_3   91

Definition at line 163 of file radeon_drm.h.

#define R200_EMIT_PP_TXCTLALL_4   92

Definition at line 164 of file radeon_drm.h.

#define R200_EMIT_PP_TXCTLALL_5   93

Definition at line 165 of file radeon_drm.h.

#define R200_EMIT_PP_TXFILTER_0   36 /* tex0/6 */

Definition at line 108 of file radeon_drm.h.

#define R200_EMIT_PP_TXFILTER_1   37 /* tex1/6 */

Definition at line 109 of file radeon_drm.h.

#define R200_EMIT_PP_TXFILTER_2   38 /* tex2/6 */

Definition at line 110 of file radeon_drm.h.

#define R200_EMIT_PP_TXFILTER_3   39 /* tex3/6 */

Definition at line 111 of file radeon_drm.h.

#define R200_EMIT_PP_TXFILTER_4   40 /* tex4/6 */

Definition at line 112 of file radeon_drm.h.

#define R200_EMIT_PP_TXFILTER_5   41 /* tex5/6 */

Definition at line 113 of file radeon_drm.h.

#define R200_EMIT_PP_TXOFFSET_0   42 /* tex0/1 */

Definition at line 114 of file radeon_drm.h.

#define R200_EMIT_PP_TXOFFSET_1   43 /* tex1/1 */

Definition at line 115 of file radeon_drm.h.

#define R200_EMIT_PP_TXOFFSET_2   44 /* tex2/1 */

Definition at line 116 of file radeon_drm.h.

#define R200_EMIT_PP_TXOFFSET_3   45 /* tex3/1 */

Definition at line 117 of file radeon_drm.h.

#define R200_EMIT_PP_TXOFFSET_4   46 /* tex4/1 */

Definition at line 118 of file radeon_drm.h.

#define R200_EMIT_PP_TXOFFSET_5   47 /* tex5/1 */

Definition at line 119 of file radeon_drm.h.

#define R200_EMIT_RB3D_BLENDCOLOR   76

Definition at line 148 of file radeon_drm.h.

#define R200_EMIT_RB3D_DEPTHXY_OFFSET   52 /* cst/1 */

Definition at line 124 of file radeon_drm.h.

#define R200_EMIT_RE_AUX_SCISSOR_CNTL   53 /* cst/1 */

Definition at line 125 of file radeon_drm.h.

#define R200_EMIT_RE_POINTSIZE   59 /* cst/1 */

Definition at line 131 of file radeon_drm.h.

#define R200_EMIT_RE_SCISSOR_TL_0   54 /* cst/2 */

Definition at line 126 of file radeon_drm.h.

#define R200_EMIT_RE_SCISSOR_TL_1   55 /* cst/2 */

Definition at line 127 of file radeon_drm.h.

#define R200_EMIT_RE_SCISSOR_TL_2   56 /* cst/2 */

Definition at line 128 of file radeon_drm.h.

#define R200_EMIT_SE_VAP_CNTL_STATUS   57 /* cst/1 */

Definition at line 129 of file radeon_drm.h.

#define R200_EMIT_SE_VTX_STATE_CNTL   58 /* cst/1 */

Definition at line 130 of file radeon_drm.h.

#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0   60 /* cst/4 */

Definition at line 132 of file radeon_drm.h.

#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0   29 /* tcl/7 */

Definition at line 101 of file radeon_drm.h.

Definition at line 149 of file radeon_drm.h.

#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL   35 /* tcl/1 */

Definition at line 107 of file radeon_drm.h.

#define R200_EMIT_TEX_PROC_CTL_2   34 /* tcg/5 */

Definition at line 106 of file radeon_drm.h.

#define R200_EMIT_TFACTOR_0   30 /* tf/7 */

Definition at line 102 of file radeon_drm.h.

#define R200_EMIT_VAP_CTL   32 /* vap/1 */

Definition at line 104 of file radeon_drm.h.

#define R200_EMIT_VAP_PVS_CNTL   94

Definition at line 166 of file radeon_drm.h.

#define R200_EMIT_VTE_CNTL   48 /* vte/1 */

Definition at line 120 of file radeon_drm.h.

#define R200_EMIT_VTX_FMT_0   31 /* vtx/5 */

Definition at line 103 of file radeon_drm.h.

#define R300_CMD_CP_DELAY   5

Definition at line 223 of file radeon_drm.h.

#define R300_CMD_DMA_DISCARD   6

Definition at line 224 of file radeon_drm.h.

#define R300_CMD_END3D   4 /* emit sequence ending 3d rendering */

Definition at line 222 of file radeon_drm.h.

#define R300_CMD_PACKET0   1

Definition at line 219 of file radeon_drm.h.

#define R300_CMD_PACKET3   3 /* emit a packet3 */

Definition at line 221 of file radeon_drm.h.

#define R300_CMD_PACKET3_CLEAR   0

Definition at line 212 of file radeon_drm.h.

#define R300_CMD_PACKET3_RAW   1

Definition at line 213 of file radeon_drm.h.

#define R300_CMD_R500FP   9

Definition at line 243 of file radeon_drm.h.

#define R300_CMD_SCRATCH   8

Definition at line 242 of file radeon_drm.h.

#define R300_CMD_VPU   2 /* emit vertex program upload */

Definition at line 220 of file radeon_drm.h.

#define R300_CMD_WAIT   7

Definition at line 225 of file radeon_drm.h.

#define R300_NEW_WAIT_2D_2D_CLEAN   0x4

Definition at line 238 of file radeon_drm.h.

Definition at line 240 of file radeon_drm.h.

#define R300_NEW_WAIT_2D_3D   0x3

Definition at line 237 of file radeon_drm.h.

#define R300_NEW_WAIT_3D_3D_CLEAN   0x6

Definition at line 239 of file radeon_drm.h.

#define R300_WAIT_2D   0x1

Definition at line 226 of file radeon_drm.h.

#define R300_WAIT_2D_CLEAN   0x3

Definition at line 234 of file radeon_drm.h.

#define R300_WAIT_3D   0x2

Definition at line 227 of file radeon_drm.h.

#define R300_WAIT_3D_CLEAN   0x4

Definition at line 235 of file radeon_drm.h.

#define R500FP_CONSTANT_CLAMP   (1 << 2)

Definition at line 286 of file radeon_drm.h.

#define R500FP_CONSTANT_TYPE   (1 << 1)

Definition at line 285 of file radeon_drm.h.

#define R600_SCRATCH_REG_OFFSET   256

Definition at line 307 of file radeon_drm.h.

#define RADEON_BACK   0x2

Definition at line 278 of file radeon_drm.h.

#define RADEON_BUFFER_SIZE   65536

Definition at line 299 of file radeon_drm.h.

#define RADEON_CARD_AGP   1

Definition at line 686 of file radeon_drm.h.

#define RADEON_CARD_PCI   0

Definition at line 685 of file radeon_drm.h.

#define RADEON_CARD_PCIE   2

Definition at line 687 of file radeon_drm.h.

#define RADEON_CHUNK_ID_IB   0x02

Definition at line 884 of file radeon_drm.h.

#define RADEON_CHUNK_ID_RELOCS   0x01

Definition at line 883 of file radeon_drm.h.

#define RADEON_CLEAR_FASTZ   0x80000000

Definition at line 281 of file radeon_drm.h.

#define RADEON_CMD_DMA_DISCARD   4 /* discard current dma buf */

Definition at line 175 of file radeon_drm.h.

#define RADEON_CMD_PACKET   1 /* emit one of the register packets above */

Definition at line 172 of file radeon_drm.h.

#define RADEON_CMD_PACKET3   5 /* emit hw packet */

Definition at line 176 of file radeon_drm.h.

#define RADEON_CMD_PACKET3_CLIP   6 /* emit hw packet wrapped in cliprects */

Definition at line 177 of file radeon_drm.h.

#define RADEON_CMD_SCALARS   2 /* emit scalar data */

Definition at line 173 of file radeon_drm.h.

#define RADEON_CMD_SCALARS2   7 /* r200 stopgap */

Definition at line 178 of file radeon_drm.h.

#define RADEON_CMD_VECLINEAR   9 /* another r200 stopgap */

Definition at line 180 of file radeon_drm.h.

#define RADEON_CMD_VECTORS   3 /* emit vector data */

Definition at line 174 of file radeon_drm.h.

#define RADEON_CMD_WAIT
Value:
8      /* emit hw wait commands -- note:
                                    *  doesn't make the cpu wait, just
                                    *  the graphics hardware */

Definition at line 179 of file radeon_drm.h.

#define RADEON_DEPTH   0x4

Definition at line 279 of file radeon_drm.h.

#define RADEON_EMIT_PP_BORDER_COLOR_0   13 /* tex0/1 */

Definition at line 85 of file radeon_drm.h.

#define RADEON_EMIT_PP_BORDER_COLOR_1   15 /* tex1/1 */

Definition at line 87 of file radeon_drm.h.

#define RADEON_EMIT_PP_BORDER_COLOR_2   17 /* tex2/1 */

Definition at line 89 of file radeon_drm.h.

#define RADEON_EMIT_PP_CNTL   1 /* context/3 */

Definition at line 73 of file radeon_drm.h.

Definition at line 150 of file radeon_drm.h.

Definition at line 152 of file radeon_drm.h.

Definition at line 154 of file radeon_drm.h.

Definition at line 151 of file radeon_drm.h.

Definition at line 153 of file radeon_drm.h.

Definition at line 155 of file radeon_drm.h.

#define RADEON_EMIT_PP_LUM_MATRIX   5 /* bumpmap/1 */

Definition at line 77 of file radeon_drm.h.

#define RADEON_EMIT_PP_MISC   0 /* context/7 */

Definition at line 72 of file radeon_drm.h.

#define RADEON_EMIT_PP_ROT_MATRIX_0   6 /* bumpmap/2 */

Definition at line 78 of file radeon_drm.h.

#define RADEON_EMIT_PP_TEX_SIZE_0   73

Definition at line 145 of file radeon_drm.h.

#define RADEON_EMIT_PP_TEX_SIZE_1   74

Definition at line 146 of file radeon_drm.h.

#define RADEON_EMIT_PP_TEX_SIZE_2   75

Definition at line 147 of file radeon_drm.h.

#define RADEON_EMIT_PP_TXFILTER_0   12 /* tex0/6 */

Definition at line 84 of file radeon_drm.h.

#define RADEON_EMIT_PP_TXFILTER_1   14 /* tex1/6 */

Definition at line 86 of file radeon_drm.h.

#define RADEON_EMIT_PP_TXFILTER_2   16 /* tex2/6 */

Definition at line 88 of file radeon_drm.h.

#define RADEON_EMIT_RB3D_COLORPITCH   2 /* context/1 */

Definition at line 74 of file radeon_drm.h.

#define RADEON_EMIT_RB3D_STENCILREFMASK   7 /* masks/3 */

Definition at line 79 of file radeon_drm.h.

#define RADEON_EMIT_RE_LINE_PATTERN   3 /* line/2 */

Definition at line 75 of file radeon_drm.h.

#define RADEON_EMIT_RE_MISC   11 /* misc/1 */

Definition at line 83 of file radeon_drm.h.

#define RADEON_EMIT_SE_CNTL   9 /* setup/2 */

Definition at line 81 of file radeon_drm.h.

#define RADEON_EMIT_SE_CNTL_STATUS   10 /* setup/1 */

Definition at line 82 of file radeon_drm.h.

#define RADEON_EMIT_SE_LINE_WIDTH   4 /* line/1 */

Definition at line 76 of file radeon_drm.h.

#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED   20 /* material/17 */

Definition at line 92 of file radeon_drm.h.

#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT   19 /* tcl/11 */

Definition at line 91 of file radeon_drm.h.

#define RADEON_EMIT_SE_VPORT_XSCALE   8 /* viewport/6 */

Definition at line 80 of file radeon_drm.h.

#define RADEON_EMIT_SE_ZBIAS_FACTOR   18 /* zbias/2 */

Definition at line 90 of file radeon_drm.h.

#define RADEON_FRONT   0x1

Definition at line 277 of file radeon_drm.h.

#define RADEON_GART_TEX_HEAP   1

Definition at line 315 of file radeon_drm.h.

#define RADEON_GEM_DOMAIN_CPU   0x1

Definition at line 783 of file radeon_drm.h.

#define RADEON_GEM_DOMAIN_GTT   0x2

Definition at line 784 of file radeon_drm.h.

#define RADEON_GEM_DOMAIN_VRAM   0x4

Definition at line 785 of file radeon_drm.h.

Definition at line 793 of file radeon_drm.h.

#define RADEON_INDEX_PRIM_OFFSET   20

Definition at line 303 of file radeon_drm.h.

#define RADEON_INFO_ACCEL_WORKING   0x03

Definition at line 912 of file radeon_drm.h.

#define RADEON_INFO_ACCEL_WORKING2   0x05

Definition at line 914 of file radeon_drm.h.

#define RADEON_INFO_CRTC_FROM_ID   0x04

Definition at line 913 of file radeon_drm.h.

#define RADEON_INFO_DEVICE_ID   0x00

Definition at line 909 of file radeon_drm.h.

#define RADEON_INFO_NUM_GB_PIPES   0x01

Definition at line 910 of file radeon_drm.h.

#define RADEON_INFO_NUM_Z_PIPES   0x02

Definition at line 911 of file radeon_drm.h.

#define RADEON_INFO_TILING_CONFIG   0x06

Definition at line 915 of file radeon_drm.h.

#define RADEON_INFO_WANT_HYPERZ   0x07

Definition at line 916 of file radeon_drm.h.

#define RADEON_LINE_STRIP   0x3

Definition at line 292 of file radeon_drm.h.

#define RADEON_LINES   0x2

Definition at line 291 of file radeon_drm.h.

#define RADEON_LOCAL_TEX_HEAP   0

Definition at line 314 of file radeon_drm.h.

#define RADEON_LOG_TEX_GRANULARITY   16

Definition at line 318 of file radeon_drm.h.

#define RADEON_MAX_STATE_PACKETS   95

Definition at line 167 of file radeon_drm.h.

#define RADEON_MAX_SURFACES   8

Definition at line 323 of file radeon_drm.h.

#define RADEON_MAX_TEXTURE_LEVELS   12

Definition at line 320 of file radeon_drm.h.

#define RADEON_MAX_TEXTURE_UNITS   3

Definition at line 321 of file radeon_drm.h.

#define RADEON_MEM_REGION_FB   2

Definition at line 720 of file radeon_drm.h.

#define RADEON_MEM_REGION_GART   1

Definition at line 719 of file radeon_drm.h.

#define RADEON_NR_SAREA_CLIPRECTS   12

Definition at line 309 of file radeon_drm.h.

#define RADEON_NR_TEX_HEAPS   2

Definition at line 316 of file radeon_drm.h.

#define RADEON_NR_TEX_REGIONS   64

Definition at line 317 of file radeon_drm.h.

Definition at line 329 of file radeon_drm.h.

Definition at line 330 of file radeon_drm.h.

#define RADEON_OFFSET_SHIFT   10

Definition at line 328 of file radeon_drm.h.

#define RADEON_PARAM_CARD_TYPE   12

Definition at line 705 of file radeon_drm.h.

#define RADEON_PARAM_DEVICE_ID   16

Definition at line 709 of file radeon_drm.h.

#define RADEON_PARAM_FB_LOCATION   14 /* FB location */

Definition at line 707 of file radeon_drm.h.

#define RADEON_PARAM_GART_BASE   6 /* card offset of GART base */

Definition at line 698 of file radeon_drm.h.

#define RADEON_PARAM_GART_BUFFER_OFFSET   1 /* card offset of 1st GART buffer */

Definition at line 692 of file radeon_drm.h.

Definition at line 703 of file radeon_drm.h.

#define RADEON_PARAM_IRQ_NR   5

Definition at line 697 of file radeon_drm.h.

#define RADEON_PARAM_LAST_CLEAR   4

Definition at line 695 of file radeon_drm.h.

Definition at line 694 of file radeon_drm.h.

#define RADEON_PARAM_LAST_FRAME   2

Definition at line 693 of file radeon_drm.h.

#define RADEON_PARAM_NUM_GB_PIPES   15 /* num GB pipes */

Definition at line 708 of file radeon_drm.h.

#define RADEON_PARAM_NUM_Z_PIPES   17 /* num Z pipes */

Definition at line 710 of file radeon_drm.h.

#define RADEON_PARAM_REGISTER_HANDLE   7 /* for drmMap() */

Definition at line 700 of file radeon_drm.h.

#define RADEON_PARAM_SAREA_HANDLE   9

Definition at line 702 of file radeon_drm.h.

#define RADEON_PARAM_SCRATCH_OFFSET   11

Definition at line 704 of file radeon_drm.h.

Definition at line 701 of file radeon_drm.h.

#define RADEON_PARAM_VBLANK_CRTC   13 /* VBLANK CRTC */

Definition at line 706 of file radeon_drm.h.

#define RADEON_POINTS   0x1

Definition at line 290 of file radeon_drm.h.

#define RADEON_REQUIRE_QUIESCENCE   0x00010000

Definition at line 63 of file radeon_drm.h.

#define RADEON_SCRATCH_REG_OFFSET   32

Definition at line 305 of file radeon_drm.h.

#define RADEON_SETPARAM_FB_LOCATION   1 /* determined framebuffer location */

Definition at line 759 of file radeon_drm.h.

#define RADEON_SETPARAM_NEW_MEMMAP   4 /* Use new memory map */

Definition at line 762 of file radeon_drm.h.

#define RADEON_SETPARAM_PCIGART_LOCATION   3 /* PCI Gart Location */

Definition at line 761 of file radeon_drm.h.

#define RADEON_SETPARAM_PCIGART_TABLE_SIZE   5 /* PCI GART Table Size */

Definition at line 763 of file radeon_drm.h.

#define RADEON_SETPARAM_SWITCH_TILING   2 /* enable/disable color tiling */

Definition at line 760 of file radeon_drm.h.

#define RADEON_SETPARAM_VBLANK_CRTC   6 /* VBLANK CRTC */

Definition at line 764 of file radeon_drm.h.

#define RADEON_STENCIL   0x8

Definition at line 280 of file radeon_drm.h.

#define RADEON_TILING_EG_BANKH_MASK   0xf

Definition at line 813 of file radeon_drm.h.

Definition at line 812 of file radeon_drm.h.

#define RADEON_TILING_EG_BANKW_MASK   0xf

Definition at line 811 of file radeon_drm.h.

Definition at line 810 of file radeon_drm.h.

Definition at line 815 of file radeon_drm.h.

Definition at line 814 of file radeon_drm.h.

Definition at line 819 of file radeon_drm.h.

Definition at line 818 of file radeon_drm.h.

Definition at line 817 of file radeon_drm.h.

Definition at line 816 of file radeon_drm.h.

#define RADEON_TILING_MACRO   0x1

Definition at line 803 of file radeon_drm.h.

#define RADEON_TILING_MICRO   0x2

Definition at line 804 of file radeon_drm.h.

#define RADEON_TILING_MICRO_SQUARE   0x20

Definition at line 809 of file radeon_drm.h.

#define RADEON_TILING_SURFACE   0x10

Definition at line 808 of file radeon_drm.h.

#define RADEON_TILING_SWAP_16BIT   0x4

Definition at line 805 of file radeon_drm.h.

#define RADEON_TILING_SWAP_32BIT   0x8

Definition at line 806 of file radeon_drm.h.

#define RADEON_TRIANGLE_FAN   0x5

Definition at line 294 of file radeon_drm.h.

#define RADEON_TRIANGLE_STRIP   0x6

Definition at line 295 of file radeon_drm.h.

#define RADEON_TRIANGLES   0x4

Definition at line 293 of file radeon_drm.h.

#define RADEON_UPLOAD_ALL   0x003effff

Definition at line 65 of file radeon_drm.h.

#define RADEON_UPLOAD_BUMPMAP   0x00000008

Definition at line 50 of file radeon_drm.h.

#define RADEON_UPLOAD_CLIPRECTS   0x00008000 /* handled client-side */

Definition at line 62 of file radeon_drm.h.

#define RADEON_UPLOAD_CONTEXT   0x00000001

Definition at line 47 of file radeon_drm.h.

#define RADEON_UPLOAD_CONTEXT_ALL   0x003e01ff

Definition at line 66 of file radeon_drm.h.

#define RADEON_UPLOAD_LINE   0x00000004

Definition at line 49 of file radeon_drm.h.

#define RADEON_UPLOAD_MASKS   0x00000010

Definition at line 51 of file radeon_drm.h.

#define RADEON_UPLOAD_MISC   0x00000100

Definition at line 55 of file radeon_drm.h.

#define RADEON_UPLOAD_SETUP   0x00000040

Definition at line 53 of file radeon_drm.h.

#define RADEON_UPLOAD_TCL   0x00000080

Definition at line 54 of file radeon_drm.h.

#define RADEON_UPLOAD_TEX0   0x00000200

Definition at line 56 of file radeon_drm.h.

#define RADEON_UPLOAD_TEX0IMAGES   0x00001000

Definition at line 59 of file radeon_drm.h.

#define RADEON_UPLOAD_TEX1   0x00000400

Definition at line 57 of file radeon_drm.h.

#define RADEON_UPLOAD_TEX1IMAGES   0x00002000

Definition at line 60 of file radeon_drm.h.

#define RADEON_UPLOAD_TEX2   0x00000800

Definition at line 58 of file radeon_drm.h.

#define RADEON_UPLOAD_TEX2IMAGES   0x00004000

Definition at line 61 of file radeon_drm.h.

#define RADEON_UPLOAD_VERTFMT   0x00000002

Definition at line 48 of file radeon_drm.h.

#define RADEON_UPLOAD_VIEWPORT   0x00000020

Definition at line 52 of file radeon_drm.h.

#define RADEON_UPLOAD_ZBIAS   0x00020000 /* version 1.2 and newer */

Definition at line 64 of file radeon_drm.h.

#define RADEON_USE_COMP_ZBUF   0x20000000

Definition at line 283 of file radeon_drm.h.

#define RADEON_USE_HIERZ   0x40000000

Definition at line 282 of file radeon_drm.h.

#define RADEON_WAIT_2D   0x1

Definition at line 207 of file radeon_drm.h.

#define RADEON_WAIT_3D   0x2

Definition at line 208 of file radeon_drm.h.


Typedef Documentation