Back to index

libdrm  2.4.37
radeon_cs_space.c
Go to the documentation of this file.
00001 /*
00002  * Copyright © 2009 Red Hat Inc.
00003  * All Rights Reserved.
00004  *
00005  * Permission is hereby granted, free of charge, to any person obtaining
00006  * a copy of this software and associated documentation files (the
00007  * "Software"), to deal in the Software without restriction, including
00008  * without limitation the rights to use, copy, modify, merge, publish,
00009  * distribute, sub license, and/or sell copies of the Software, and to
00010  * permit persons to whom the Software is furnished to do so, subject to
00011  * the following conditions:
00012  *
00013  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
00014  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
00015  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
00016  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
00017  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00018  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
00020  * USE OR OTHER DEALINGS IN THE SOFTWARE.
00021  *
00022  * The above copyright notice and this permission notice (including the
00023  * next paragraph) shall be included in all copies or substantial portions
00024  * of the Software.
00025  */
00026 /*
00027  */
00028 #include <assert.h>
00029 #include <errno.h>
00030 #include <stdlib.h>
00031 #include "radeon_cs.h"
00032 #include "radeon_bo_int.h"
00033 #include "radeon_cs_int.h"
00034 
00035 struct rad_sizes {
00036     int32_t op_read;
00037     int32_t op_gart_write;
00038     int32_t op_vram_write;
00039 };
00040 
00041 static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct rad_sizes *sizes)
00042 {
00043     uint32_t read_domains, write_domain;
00044     struct radeon_bo_int *bo;
00045 
00046     bo = sc->bo;
00047     sc->new_accounted = 0;
00048     read_domains = sc->read_domains;
00049     write_domain = sc->write_domain;
00050 
00051     /* legacy needs a static check */
00052     if (radeon_bo_is_static((struct radeon_bo *)sc->bo)) {
00053         bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
00054         return 0;
00055     }
00056 
00057     /* already accounted this bo */
00058     if (write_domain && (write_domain == bo->space_accounted)) {
00059         sc->new_accounted = bo->space_accounted;
00060         return 0;
00061     }
00062     if (read_domains && ((read_domains << 16) == bo->space_accounted)) {
00063         sc->new_accounted = bo->space_accounted;
00064         return 0;
00065     }
00066 
00067     if (bo->space_accounted == 0) {
00068         if (write_domain) {
00069             if (write_domain == RADEON_GEM_DOMAIN_VRAM)
00070                 sizes->op_vram_write += bo->size;
00071             else if (write_domain == RADEON_GEM_DOMAIN_GTT)
00072                 sizes->op_gart_write += bo->size;
00073             sc->new_accounted = write_domain;
00074         } else {
00075             sizes->op_read += bo->size;
00076             sc->new_accounted = read_domains << 16;
00077         }
00078     } else {
00079         uint16_t old_read, old_write;
00080 
00081         old_read = bo->space_accounted >> 16;
00082         old_write = bo->space_accounted & 0xffff;
00083 
00084         if (write_domain && (old_read & write_domain)) {
00085             sc->new_accounted = write_domain;
00086             /* moving from read to a write domain */
00087             if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
00088                 sizes->op_read -= bo->size;
00089                 sizes->op_vram_write += bo->size;
00090             } else if (write_domain == RADEON_GEM_DOMAIN_GTT) {
00091                 sizes->op_read -= bo->size;
00092                 sizes->op_gart_write += bo->size;
00093             }
00094         } else if (read_domains & old_write) {
00095             sc->new_accounted = bo->space_accounted & 0xffff;
00096         } else {
00097             /* rewrite the domains */
00098             if (write_domain != old_write)
00099                 fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
00100             if (read_domains != old_read)
00101                fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
00102             return RADEON_CS_SPACE_FLUSH;
00103         }
00104     }
00105     return 0;
00106 }
00107 
00108 static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_space_check *new_tmp)
00109 {
00110     struct radeon_cs_manager *csm = cs->csm;
00111     int i;
00112     struct radeon_bo_int *bo;
00113     struct rad_sizes sizes;
00114     int ret;
00115 
00116     /* check the totals for this operation */
00117 
00118     if (cs->bo_count == 0 && !new_tmp)
00119         return 0;
00120 
00121     memset(&sizes, 0, sizeof(struct rad_sizes));
00122 
00123     /* prepare */
00124     for (i = 0; i < cs->bo_count; i++) {
00125         ret = radeon_cs_setup_bo(&cs->bos[i], &sizes);
00126         if (ret)
00127             return ret;
00128     }
00129 
00130     if (new_tmp) {
00131         ret = radeon_cs_setup_bo(new_tmp, &sizes);
00132         if (ret)
00133             return ret;
00134     }
00135 
00136     if (sizes.op_read < 0)
00137         sizes.op_read = 0;
00138 
00139     /* check sizes - operation first */
00140     if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) ||
00141         (sizes.op_vram_write > csm->vram_limit)) {
00142         return RADEON_CS_SPACE_OP_TO_BIG;
00143     }
00144 
00145     if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) ||
00146         ((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) {
00147         return RADEON_CS_SPACE_FLUSH;
00148     }
00149 
00150     csm->gart_write_used += sizes.op_gart_write;
00151     csm->vram_write_used += sizes.op_vram_write;
00152     csm->read_used += sizes.op_read;
00153     /* commit */
00154     for (i = 0; i < cs->bo_count; i++) {
00155         bo = cs->bos[i].bo;
00156         bo->space_accounted = cs->bos[i].new_accounted;
00157     }
00158     if (new_tmp)
00159         new_tmp->bo->space_accounted = new_tmp->new_accounted;
00160 
00161     return RADEON_CS_SPACE_OK;
00162 }
00163 
00164 void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain)
00165 {
00166     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
00167     struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
00168     int i;
00169     for (i = 0; i < csi->bo_count; i++) {
00170         if (csi->bos[i].bo == boi &&
00171             csi->bos[i].read_domains == read_domains &&
00172             csi->bos[i].write_domain == write_domain)
00173             return;
00174     }
00175     radeon_bo_ref(bo);
00176     i = csi->bo_count;
00177     csi->bos[i].bo = boi;
00178     csi->bos[i].read_domains = read_domains;
00179     csi->bos[i].write_domain = write_domain;
00180     csi->bos[i].new_accounted = 0;
00181     csi->bo_count++;
00182 
00183     assert(csi->bo_count < MAX_SPACE_BOS);
00184 }
00185 
00186 static int radeon_cs_check_space_internal(struct radeon_cs_int *cs,
00187                       struct radeon_cs_space_check *tmp_bo)
00188 {
00189     int ret;
00190     int flushed = 0;
00191 
00192 again:
00193     ret = radeon_cs_do_space_check(cs, tmp_bo);
00194     if (ret == RADEON_CS_SPACE_OP_TO_BIG)
00195         return -1;
00196     if (ret == RADEON_CS_SPACE_FLUSH) {
00197         (*cs->space_flush_fn)(cs->space_flush_data);
00198         if (flushed)
00199             return -1;
00200         flushed = 1;
00201         goto again;
00202     }
00203     return 0;
00204 }
00205 
00206 int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
00207                   struct radeon_bo *bo,
00208                   uint32_t read_domains, uint32_t write_domain)
00209 {
00210     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
00211     struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
00212     struct radeon_cs_space_check temp_bo;
00213 
00214     int ret = 0;
00215 
00216     if (bo) {
00217         temp_bo.bo = boi;
00218         temp_bo.read_domains = read_domains;
00219         temp_bo.write_domain = write_domain;
00220         temp_bo.new_accounted = 0;
00221     }
00222 
00223     ret = radeon_cs_check_space_internal(csi, bo ? &temp_bo : NULL);
00224     return ret;
00225 }
00226 
00227 int radeon_cs_space_check(struct radeon_cs *cs)
00228 {
00229     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
00230     return radeon_cs_check_space_internal(csi, NULL);
00231 }
00232 
00233 void radeon_cs_space_reset_bos(struct radeon_cs *cs)
00234 {
00235     struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
00236     int i;
00237     for (i = 0; i < csi->bo_count; i++) {
00238         radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo);
00239         csi->bos[i].bo = NULL;
00240         csi->bos[i].read_domains = 0;
00241         csi->bos[i].write_domain = 0;
00242         csi->bos[i].new_accounted = 0;
00243     }
00244     csi->bo_count = 0;
00245 }