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libdrm  2.4.37
r128_drm.h
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00001 /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
00002  * Created: Wed Apr  5 19:24:19 2000 by kevin@precisioninsight.com
00003  */
00004 /*
00005  * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
00006  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
00007  * All rights reserved.
00008  *
00009  * Permission is hereby granted, free of charge, to any person obtaining a
00010  * copy of this software and associated documentation files (the "Software"),
00011  * to deal in the Software without restriction, including without limitation
00012  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00013  * and/or sell copies of the Software, and to permit persons to whom the
00014  * Software is furnished to do so, subject to the following conditions:
00015  *
00016  * The above copyright notice and this permission notice (including the next
00017  * paragraph) shall be included in all copies or substantial portions of the
00018  * Software.
00019  *
00020  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00021  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00022  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
00023  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
00024  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00025  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
00026  * DEALINGS IN THE SOFTWARE.
00027  *
00028  * Authors:
00029  *    Gareth Hughes <gareth@valinux.com>
00030  *    Kevin E. Martin <martin@valinux.com>
00031  */
00032 
00033 #ifndef __R128_DRM_H__
00034 #define __R128_DRM_H__
00035 
00036 /* WARNING: If you change any of these defines, make sure to change the
00037  * defines in the X server file (r128_sarea.h)
00038  */
00039 #ifndef __R128_SAREA_DEFINES__
00040 #define __R128_SAREA_DEFINES__
00041 
00042 /* What needs to be changed for the current vertex buffer?
00043  */
00044 #define R128_UPLOAD_CONTEXT        0x001
00045 #define R128_UPLOAD_SETUP          0x002
00046 #define R128_UPLOAD_TEX0           0x004
00047 #define R128_UPLOAD_TEX1           0x008
00048 #define R128_UPLOAD_TEX0IMAGES            0x010
00049 #define R128_UPLOAD_TEX1IMAGES            0x020
00050 #define R128_UPLOAD_CORE           0x040
00051 #define R128_UPLOAD_MASKS          0x080
00052 #define R128_UPLOAD_WINDOW         0x100
00053 #define R128_UPLOAD_CLIPRECTS             0x200  /* handled client-side */
00054 #define R128_REQUIRE_QUIESCENCE           0x400
00055 #define R128_UPLOAD_ALL                   0x7ff
00056 
00057 #define R128_FRONT                 0x1
00058 #define R128_BACK                  0x2
00059 #define R128_DEPTH                 0x4
00060 
00061 /* Primitive types
00062  */
00063 #define R128_POINTS                0x1
00064 #define R128_LINES                 0x2
00065 #define R128_LINE_STRIP                   0x3
00066 #define R128_TRIANGLES                    0x4
00067 #define R128_TRIANGLE_FAN          0x5
00068 #define R128_TRIANGLE_STRIP        0x6
00069 
00070 /* Vertex/indirect buffer size
00071  */
00072 #define R128_BUFFER_SIZE           16384
00073 
00074 /* Byte offsets for indirect buffer data
00075  */
00076 #define R128_INDEX_PRIM_OFFSET            20
00077 #define R128_HOSTDATA_BLIT_OFFSET  32
00078 
00079 /* Keep these small for testing.
00080  */
00081 #define R128_NR_SAREA_CLIPRECTS           12
00082 
00083 /* There are 2 heaps (local/AGP).  Each region within a heap is a
00084  *  minimum of 64k, and there are at most 64 of them per heap.
00085  */
00086 #define R128_LOCAL_TEX_HEAP        0
00087 #define R128_AGP_TEX_HEAP          1
00088 #define R128_NR_TEX_HEAPS          2
00089 #define R128_NR_TEX_REGIONS        64
00090 #define R128_LOG_TEX_GRANULARITY   16
00091 
00092 #define R128_NR_CONTEXT_REGS              12
00093 
00094 #define R128_MAX_TEXTURE_LEVELS           11
00095 #define R128_MAX_TEXTURE_UNITS            2
00096 
00097 #endif                      /* __R128_SAREA_DEFINES__ */
00098 
00099 typedef struct {
00100        /* Context state - can be written in one large chunk */
00101        unsigned int dst_pitch_offset_c;
00102        unsigned int dp_gui_master_cntl_c;
00103        unsigned int sc_top_left_c;
00104        unsigned int sc_bottom_right_c;
00105        unsigned int z_offset_c;
00106        unsigned int z_pitch_c;
00107        unsigned int z_sten_cntl_c;
00108        unsigned int tex_cntl_c;
00109        unsigned int misc_3d_state_cntl_reg;
00110        unsigned int texture_clr_cmp_clr_c;
00111        unsigned int texture_clr_cmp_msk_c;
00112        unsigned int fog_color_c;
00113 
00114        /* Texture state */
00115        unsigned int tex_size_pitch_c;
00116        unsigned int constant_color_c;
00117 
00118        /* Setup state */
00119        unsigned int pm4_vc_fpu_setup;
00120        unsigned int setup_cntl;
00121 
00122        /* Mask state */
00123        unsigned int dp_write_mask;
00124        unsigned int sten_ref_mask_c;
00125        unsigned int plane_3d_mask_c;
00126 
00127        /* Window state */
00128        unsigned int window_xy_offset;
00129 
00130        /* Core state */
00131        unsigned int scale_3d_cntl;
00132 } drm_r128_context_regs_t;
00133 
00134 /* Setup registers for each texture unit
00135  */
00136 typedef struct {
00137        unsigned int tex_cntl;
00138        unsigned int tex_combine_cntl;
00139        unsigned int tex_size_pitch;
00140        unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
00141        unsigned int tex_border_color;
00142 } drm_r128_texture_regs_t;
00143 
00144 typedef struct drm_r128_sarea {
00145        /* The channel for communication of state information to the kernel
00146         * on firing a vertex buffer.
00147         */
00148        drm_r128_context_regs_t context_state;
00149        drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
00150        unsigned int dirty;
00151        unsigned int vertsize;
00152        unsigned int vc_format;
00153 
00154        /* The current cliprects, or a subset thereof.
00155         */
00156        struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
00157        unsigned int nbox;
00158 
00159        /* Counters for client-side throttling of rendering clients.
00160         */
00161        unsigned int last_frame;
00162        unsigned int last_dispatch;
00163 
00164        struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
00165        unsigned int tex_age[R128_NR_TEX_HEAPS];
00166        int ctx_owner;
00167        int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
00168        int pfCurrentPage;   /* which buffer is being displayed? */
00169 } drm_r128_sarea_t;
00170 
00171 /* WARNING: If you change any of these defines, make sure to change the
00172  * defines in the Xserver file (xf86drmR128.h)
00173  */
00174 
00175 /* Rage 128 specific ioctls
00176  * The device specific ioctl range is 0x40 to 0x79.
00177  */
00178 #define DRM_R128_INIT       0x00
00179 #define DRM_R128_CCE_START  0x01
00180 #define DRM_R128_CCE_STOP   0x02
00181 #define DRM_R128_CCE_RESET  0x03
00182 #define DRM_R128_CCE_IDLE   0x04
00183 /* 0x05 not used */
00184 #define DRM_R128_RESET      0x06
00185 #define DRM_R128_SWAP       0x07
00186 #define DRM_R128_CLEAR      0x08
00187 #define DRM_R128_VERTEX     0x09
00188 #define DRM_R128_INDICES    0x0a
00189 #define DRM_R128_BLIT       0x0b
00190 #define DRM_R128_DEPTH      0x0c
00191 #define DRM_R128_STIPPLE    0x0d
00192 /* 0x0e not used */
00193 #define DRM_R128_INDIRECT   0x0f
00194 #define DRM_R128_FULLSCREEN 0x10
00195 #define DRM_R128_CLEAR2     0x11
00196 #define DRM_R128_GETPARAM   0x12
00197 #define DRM_R128_FLIP       0x13
00198 
00199 #define DRM_IOCTL_R128_INIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
00200 #define DRM_IOCTL_R128_CCE_START  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_START)
00201 #define DRM_IOCTL_R128_CCE_STOP   DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
00202 #define DRM_IOCTL_R128_CCE_RESET  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
00203 #define DRM_IOCTL_R128_CCE_IDLE   DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
00204 /* 0x05 not used */
00205 #define DRM_IOCTL_R128_RESET      DRM_IO(  DRM_COMMAND_BASE + DRM_R128_RESET)
00206 #define DRM_IOCTL_R128_SWAP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_SWAP)
00207 #define DRM_IOCTL_R128_CLEAR      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
00208 #define DRM_IOCTL_R128_VERTEX     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
00209 #define DRM_IOCTL_R128_INDICES    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
00210 #define DRM_IOCTL_R128_BLIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
00211 #define DRM_IOCTL_R128_DEPTH      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
00212 #define DRM_IOCTL_R128_STIPPLE    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
00213 /* 0x0e not used */
00214 #define DRM_IOCTL_R128_INDIRECT   DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
00215 #define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
00216 #define DRM_IOCTL_R128_CLEAR2     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
00217 #define DRM_IOCTL_R128_GETPARAM   DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
00218 #define DRM_IOCTL_R128_FLIP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_FLIP)
00219 
00220 typedef struct drm_r128_init {
00221        enum {
00222               R128_INIT_CCE = 0x01,
00223               R128_CLEANUP_CCE = 0x02
00224        } func;
00225        unsigned long sarea_priv_offset;
00226        int is_pci;
00227        int cce_mode;
00228        int cce_secure;
00229        int ring_size;
00230        int usec_timeout;
00231 
00232        unsigned int fb_bpp;
00233        unsigned int front_offset, front_pitch;
00234        unsigned int back_offset, back_pitch;
00235        unsigned int depth_bpp;
00236        unsigned int depth_offset, depth_pitch;
00237        unsigned int span_offset;
00238 
00239        unsigned long fb_offset;
00240        unsigned long mmio_offset;
00241        unsigned long ring_offset;
00242        unsigned long ring_rptr_offset;
00243        unsigned long buffers_offset;
00244        unsigned long agp_textures_offset;
00245 } drm_r128_init_t;
00246 
00247 typedef struct drm_r128_cce_stop {
00248        int flush;
00249        int idle;
00250 } drm_r128_cce_stop_t;
00251 
00252 typedef struct drm_r128_clear {
00253        unsigned int flags;
00254        unsigned int clear_color;
00255        unsigned int clear_depth;
00256        unsigned int color_mask;
00257        unsigned int depth_mask;
00258 } drm_r128_clear_t;
00259 
00260 typedef struct drm_r128_vertex {
00261        int prim;
00262        int idx;             /* Index of vertex buffer */
00263        int count;           /* Number of vertices in buffer */
00264        int discard;         /* Client finished with buffer? */
00265 } drm_r128_vertex_t;
00266 
00267 typedef struct drm_r128_indices {
00268        int prim;
00269        int idx;
00270        int start;
00271        int end;
00272        int discard;         /* Client finished with buffer? */
00273 } drm_r128_indices_t;
00274 
00275 typedef struct drm_r128_blit {
00276        int idx;
00277        int pitch;
00278        int offset;
00279        int format;
00280        unsigned short x, y;
00281        unsigned short width, height;
00282 } drm_r128_blit_t;
00283 
00284 typedef struct drm_r128_depth {
00285        enum {
00286               R128_WRITE_SPAN = 0x01,
00287               R128_WRITE_PIXELS = 0x02,
00288               R128_READ_SPAN = 0x03,
00289               R128_READ_PIXELS = 0x04
00290        } func;
00291        int n;
00292        int *x;
00293        int *y;
00294        unsigned int *buffer;
00295        unsigned char *mask;
00296 } drm_r128_depth_t;
00297 
00298 typedef struct drm_r128_stipple {
00299        unsigned int *mask;
00300 } drm_r128_stipple_t;
00301 
00302 typedef struct drm_r128_indirect {
00303        int idx;
00304        int start;
00305        int end;
00306        int discard;
00307 } drm_r128_indirect_t;
00308 
00309 typedef struct drm_r128_fullscreen {
00310        enum {
00311               R128_INIT_FULLSCREEN = 0x01,
00312               R128_CLEANUP_FULLSCREEN = 0x02
00313        } func;
00314 } drm_r128_fullscreen_t;
00315 
00316 /* 2.3: An ioctl to get parameters that aren't available to the 3d
00317  * client any other way.
00318  */
00319 #define R128_PARAM_IRQ_NR            1
00320 
00321 typedef struct drm_r128_getparam {
00322        int param;
00323        void *value;
00324 } drm_r128_getparam_t;
00325 
00326 #endif