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libdrm  2.4.37
mach64_drm.h
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00001 /* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*-
00002  * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com
00003  */
00004 /*
00005  * Copyright 2000 Gareth Hughes
00006  * Copyright 2002 Frank C. Earl
00007  * Copyright 2002-2003 Leif Delgass
00008  * All Rights Reserved.
00009  *
00010  * Permission is hereby granted, free of charge, to any person obtaining a
00011  * copy of this software and associated documentation files (the "Software"),
00012  * to deal in the Software without restriction, including without limitation
00013  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00014  * and/or sell copies of the Software, and to permit persons to whom the
00015  * Software is furnished to do so, subject to the following conditions:
00016  *
00017  * The above copyright notice and this permission notice (including the next
00018  * paragraph) shall be included in all copies or substantial portions of the
00019  * Software.
00020  *
00021  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00022  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00023  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
00024  * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
00025  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
00026  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
00027  *
00028  * Authors:
00029  *    Gareth Hughes <gareth@valinux.com>
00030  *    Frank C. Earl <fearl@airmail.net>
00031  *    Leif Delgass <ldelgass@retinalburn.net>
00032  */
00033 
00034 #ifndef __MACH64_DRM_H__
00035 #define __MACH64_DRM_H__
00036 
00037 /* WARNING: If you change any of these defines, make sure to change the
00038  * defines in the Xserver file (mach64_sarea.h)
00039  */
00040 #ifndef __MACH64_SAREA_DEFINES__
00041 #define __MACH64_SAREA_DEFINES__
00042 
00043 /* What needs to be changed for the current vertex buffer?
00044  * GH: We're going to be pedantic about this.  We want the card to do as
00045  * little as possible, so let's avoid having it fetch a whole bunch of
00046  * register values that don't change all that often, if at all.
00047  */
00048 #define MACH64_UPLOAD_DST_OFF_PITCH       0x0001
00049 #define MACH64_UPLOAD_Z_OFF_PITCH  0x0002
00050 #define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004
00051 #define MACH64_UPLOAD_SCALE_3D_CNTL       0x0008
00052 #define MACH64_UPLOAD_DP_FOG_CLR   0x0010
00053 #define MACH64_UPLOAD_DP_WRITE_MASK       0x0020
00054 #define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040
00055 #define MACH64_UPLOAD_SETUP_CNTL   0x0080
00056 #define MACH64_UPLOAD_MISC         0x0100
00057 #define MACH64_UPLOAD_TEXTURE             0x0200
00058 #define MACH64_UPLOAD_TEX0IMAGE           0x0400
00059 #define MACH64_UPLOAD_TEX1IMAGE           0x0800
00060 #define MACH64_UPLOAD_CLIPRECTS           0x1000 /* handled client-side */
00061 #define MACH64_UPLOAD_CONTEXT             0x00ff
00062 #define MACH64_UPLOAD_ALL          0x1fff
00063 
00064 /* DMA buffer size
00065  */
00066 #define MACH64_BUFFER_SIZE         16384
00067 
00068 /* Max number of swaps allowed on the ring
00069  * before the client must wait
00070  */
00071 #define MACH64_MAX_QUEUED_FRAMES        3U
00072 
00073 /* Byte offsets for host blit buffer data
00074  */
00075 #define MACH64_HOSTDATA_BLIT_OFFSET       104
00076 
00077 /* Keep these small for testing.
00078  */
00079 #define MACH64_NR_SAREA_CLIPRECTS  8
00080 
00081 #define MACH64_CARD_HEAP           0
00082 #define MACH64_AGP_HEAP                   1
00083 #define MACH64_NR_TEX_HEAPS        2
00084 #define MACH64_NR_TEX_REGIONS             64
00085 #define MACH64_LOG_TEX_GRANULARITY 16
00086 
00087 #define MACH64_TEX_MAXLEVELS              1
00088 
00089 #define MACH64_NR_CONTEXT_REGS            15
00090 #define MACH64_NR_TEXTURE_REGS            4
00091 
00092 #endif                      /* __MACH64_SAREA_DEFINES__ */
00093 
00094 typedef struct {
00095        unsigned int dst_off_pitch;
00096 
00097        unsigned int z_off_pitch;
00098        unsigned int z_cntl;
00099        unsigned int alpha_tst_cntl;
00100 
00101        unsigned int scale_3d_cntl;
00102 
00103        unsigned int sc_left_right;
00104        unsigned int sc_top_bottom;
00105 
00106        unsigned int dp_fog_clr;
00107        unsigned int dp_write_mask;
00108        unsigned int dp_pix_width;
00109        unsigned int dp_mix;
00110        unsigned int dp_src;
00111 
00112        unsigned int clr_cmp_cntl;
00113        unsigned int gui_traj_cntl;
00114 
00115        unsigned int setup_cntl;
00116 
00117        unsigned int tex_size_pitch;
00118        unsigned int tex_cntl;
00119        unsigned int secondary_tex_off;
00120        unsigned int tex_offset;
00121 } drm_mach64_context_regs_t;
00122 
00123 typedef struct drm_mach64_sarea {
00124        /* The channel for communication of state information to the kernel
00125         * on firing a vertex dma buffer.
00126         */
00127        drm_mach64_context_regs_t context_state;
00128        unsigned int dirty;
00129        unsigned int vertsize;
00130 
00131        /* The current cliprects, or a subset thereof.
00132         */
00133        struct drm_clip_rect boxes[MACH64_NR_SAREA_CLIPRECTS];
00134        unsigned int nbox;
00135 
00136        /* Counters for client-side throttling of rendering clients.
00137         */
00138        unsigned int frames_queued;
00139 
00140        /* Texture memory LRU.
00141         */
00142        struct drm_tex_region tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS +
00143                                                  1];
00144        unsigned int tex_age[MACH64_NR_TEX_HEAPS];
00145        int ctx_owner;
00146 } drm_mach64_sarea_t;
00147 
00148 /* WARNING: If you change any of these defines, make sure to change the
00149  * defines in the Xserver file (mach64_common.h)
00150  */
00151 
00152 /* Mach64 specific ioctls
00153  * The device specific ioctl range is 0x40 to 0x79.
00154  */
00155 
00156 #define DRM_MACH64_INIT           0x00
00157 #define DRM_MACH64_IDLE           0x01
00158 #define DRM_MACH64_RESET          0x02
00159 #define DRM_MACH64_SWAP           0x03
00160 #define DRM_MACH64_CLEAR          0x04
00161 #define DRM_MACH64_VERTEX         0x05
00162 #define DRM_MACH64_BLIT           0x06
00163 #define DRM_MACH64_FLUSH          0x07
00164 #define DRM_MACH64_GETPARAM       0x08
00165 
00166 #define DRM_IOCTL_MACH64_INIT           DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t)
00167 #define DRM_IOCTL_MACH64_IDLE           DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_IDLE )
00168 #define DRM_IOCTL_MACH64_RESET          DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_RESET )
00169 #define DRM_IOCTL_MACH64_SWAP           DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_SWAP )
00170 #define DRM_IOCTL_MACH64_CLEAR          DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t)
00171 #define DRM_IOCTL_MACH64_VERTEX         DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t)
00172 #define DRM_IOCTL_MACH64_BLIT           DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t)
00173 #define DRM_IOCTL_MACH64_FLUSH          DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_FLUSH )
00174 #define DRM_IOCTL_MACH64_GETPARAM       DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t)
00175 
00176 /* Buffer flags for clears
00177  */
00178 #define MACH64_FRONT               0x1
00179 #define MACH64_BACK                0x2
00180 #define MACH64_DEPTH               0x4
00181 
00182 /* Primitive types for vertex buffers
00183  */
00184 #define MACH64_PRIM_POINTS         0x00000000
00185 #define MACH64_PRIM_LINES          0x00000001
00186 #define MACH64_PRIM_LINE_LOOP             0x00000002
00187 #define MACH64_PRIM_LINE_STRIP            0x00000003
00188 #define MACH64_PRIM_TRIANGLES             0x00000004
00189 #define MACH64_PRIM_TRIANGLE_STRIP 0x00000005
00190 #define MACH64_PRIM_TRIANGLE_FAN   0x00000006
00191 #define MACH64_PRIM_QUADS          0x00000007
00192 #define MACH64_PRIM_QUAD_STRIP            0x00000008
00193 #define MACH64_PRIM_POLYGON        0x00000009
00194 
00195 typedef enum _drm_mach64_dma_mode_t {
00196        MACH64_MODE_DMA_ASYNC,
00197        MACH64_MODE_DMA_SYNC,
00198        MACH64_MODE_MMIO
00199 } drm_mach64_dma_mode_t;
00200 
00201 typedef struct drm_mach64_init {
00202        enum {
00203               DRM_MACH64_INIT_DMA = 0x01,
00204               DRM_MACH64_CLEANUP_DMA = 0x02
00205        } func;
00206 
00207        unsigned long sarea_priv_offset;
00208        int is_pci;
00209        drm_mach64_dma_mode_t dma_mode;
00210 
00211        unsigned int fb_bpp;
00212        unsigned int front_offset, front_pitch;
00213        unsigned int back_offset, back_pitch;
00214 
00215        unsigned int depth_bpp;
00216        unsigned int depth_offset, depth_pitch;
00217 
00218        unsigned long fb_offset;
00219        unsigned long mmio_offset;
00220        unsigned long ring_offset;
00221        unsigned long buffers_offset;
00222        unsigned long agp_textures_offset;
00223 } drm_mach64_init_t;
00224 
00225 typedef struct drm_mach64_clear {
00226        unsigned int flags;
00227        int x, y, w, h;
00228        unsigned int clear_color;
00229        unsigned int clear_depth;
00230 } drm_mach64_clear_t;
00231 
00232 typedef struct drm_mach64_vertex {
00233        int prim;
00234        void *buf;           /* Address of vertex buffer */
00235        unsigned long used;  /* Number of bytes in buffer */
00236        int discard;         /* Client finished with buffer? */
00237 } drm_mach64_vertex_t;
00238 
00239 typedef struct drm_mach64_blit {
00240        void *buf;
00241        int pitch;
00242        int offset;
00243        int format;
00244        unsigned short x, y;
00245        unsigned short width, height;
00246 } drm_mach64_blit_t;
00247 
00248 typedef struct drm_mach64_getparam {
00249        enum {
00250               MACH64_PARAM_FRAMES_QUEUED = 0x01,
00251               MACH64_PARAM_IRQ_NR = 0x02
00252        } param;
00253        void *value;
00254 } drm_mach64_getparam_t;
00255 
00256 #endif