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libdrm  2.4.37
drm_mode.h
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00001 /*
00002  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
00003  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
00004  * Copyright (c) 2008 Red Hat Inc.
00005  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
00006  * Copyright (c) 2007-2008 Intel Corporation
00007  *
00008  * Permission is hereby granted, free of charge, to any person obtaining a
00009  * copy of this software and associated documentation files (the "Software"),
00010  * to deal in the Software without restriction, including without limitation
00011  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00012  * and/or sell copies of the Software, and to permit persons to whom the
00013  * Software is furnished to do so, subject to the following conditions:
00014  *
00015  * The above copyright notice and this permission notice shall be included in
00016  * all copies or substantial portions of the Software.
00017  *
00018  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00019  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00020  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
00021  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00022  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
00023  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
00024  * IN THE SOFTWARE.
00025  */
00026 
00027 #ifndef _DRM_MODE_H
00028 #define _DRM_MODE_H
00029 
00030 #define DRM_DISPLAY_INFO_LEN       32
00031 #define DRM_CONNECTOR_NAME_LEN     32
00032 #define DRM_DISPLAY_MODE_LEN       32
00033 #define DRM_PROP_NAME_LEN   32
00034 
00035 #define DRM_MODE_TYPE_BUILTIN      (1<<0)
00036 #define DRM_MODE_TYPE_CLOCK_C      ((1<<1) | DRM_MODE_TYPE_BUILTIN)
00037 #define DRM_MODE_TYPE_CRTC_C       ((1<<2) | DRM_MODE_TYPE_BUILTIN)
00038 #define DRM_MODE_TYPE_PREFERRED    (1<<3)
00039 #define DRM_MODE_TYPE_DEFAULT      (1<<4)
00040 #define DRM_MODE_TYPE_USERDEF      (1<<5)
00041 #define DRM_MODE_TYPE_DRIVER       (1<<6)
00042 
00043 /* Video mode flags */
00044 /* bit compatible with the xorg definitions. */
00045 #define DRM_MODE_FLAG_PHSYNC       (1<<0)
00046 #define DRM_MODE_FLAG_NHSYNC       (1<<1)
00047 #define DRM_MODE_FLAG_PVSYNC       (1<<2)
00048 #define DRM_MODE_FLAG_NVSYNC       (1<<3)
00049 #define DRM_MODE_FLAG_INTERLACE    (1<<4)
00050 #define DRM_MODE_FLAG_DBLSCAN      (1<<5)
00051 #define DRM_MODE_FLAG_CSYNC (1<<6)
00052 #define DRM_MODE_FLAG_PCSYNC       (1<<7)
00053 #define DRM_MODE_FLAG_NCSYNC       (1<<8)
00054 #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
00055 #define DRM_MODE_FLAG_BCAST (1<<10)
00056 #define DRM_MODE_FLAG_PIXMUX       (1<<11)
00057 #define DRM_MODE_FLAG_DBLCLK       (1<<12)
00058 #define DRM_MODE_FLAG_CLKDIV2      (1<<13)
00059 
00060 /* DPMS flags */
00061 /* bit compatible with the xorg definitions. */
00062 #define DRM_MODE_DPMS_ON    0
00063 #define DRM_MODE_DPMS_STANDBY      1
00064 #define DRM_MODE_DPMS_SUSPEND      2
00065 #define DRM_MODE_DPMS_OFF   3
00066 
00067 /* Scaling mode options */
00068 #define DRM_MODE_SCALE_NONE        0 /* Unmodified timing (display or
00069                                         software can still scale) */
00070 #define DRM_MODE_SCALE_FULLSCREEN  1 /* Full screen, ignore aspect */
00071 #define DRM_MODE_SCALE_CENTER             2 /* Centered, no scaling */
00072 #define DRM_MODE_SCALE_ASPECT             3 /* Full screen, preserve aspect */
00073 
00074 /* Dithering mode options */
00075 #define DRM_MODE_DITHERING_OFF     0
00076 #define DRM_MODE_DITHERING_ON      1
00077 #define DRM_MODE_DITHERING_AUTO 2
00078 
00079 /* Dirty info options */
00080 #define DRM_MODE_DIRTY_OFF      0
00081 #define DRM_MODE_DIRTY_ON       1
00082 #define DRM_MODE_DIRTY_ANNOTATE 2
00083 
00084 struct drm_mode_modeinfo {
00085        __u32 clock;
00086        __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
00087        __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
00088 
00089        __u32 vrefresh;
00090 
00091        __u32 flags;
00092        __u32 type;
00093        char name[DRM_DISPLAY_MODE_LEN];
00094 };
00095 
00096 struct drm_mode_card_res {
00097        __u64 fb_id_ptr;
00098        __u64 crtc_id_ptr;
00099        __u64 connector_id_ptr;
00100        __u64 encoder_id_ptr;
00101        __u32 count_fbs;
00102        __u32 count_crtcs;
00103        __u32 count_connectors;
00104        __u32 count_encoders;
00105        __u32 min_width, max_width;
00106        __u32 min_height, max_height;
00107 };
00108 
00109 struct drm_mode_crtc {
00110        __u64 set_connectors_ptr;
00111        __u32 count_connectors;
00112 
00113        __u32 crtc_id; 
00114        __u32 fb_id; 
00116        __u32 x, y; 
00118        __u32 gamma_size;
00119        __u32 mode_valid;
00120        struct drm_mode_modeinfo mode;
00121 };
00122 
00123 #define DRM_MODE_PRESENT_TOP_FIELD     (1<<0)
00124 #define DRM_MODE_PRESENT_BOTTOM_FIELD  (1<<1)
00125 
00126 /* Planes blend with or override other bits on the CRTC */
00127 struct drm_mode_set_plane {
00128        __u32 plane_id;
00129        __u32 crtc_id;
00130        __u32 fb_id; /* fb object contains surface format type */
00131        __u32 flags;
00132 
00133        /* Signed dest location allows it to be partially off screen */
00134        __s32 crtc_x, crtc_y;
00135        __u32 crtc_w, crtc_h;
00136 
00137        /* Source values are 16.16 fixed point */
00138        __u32 src_x, src_y;
00139        __u32 src_h, src_w;
00140 };
00141 
00142 struct drm_mode_get_plane {
00143        __u32 plane_id;
00144 
00145        __u32 crtc_id;
00146        __u32 fb_id;
00147 
00148        __u32 possible_crtcs;
00149        __u32 gamma_size;
00150 
00151        __u32 count_format_types;
00152        __u64 format_type_ptr;
00153 };
00154 
00155 struct drm_mode_get_plane_res {
00156        __u64 plane_id_ptr;
00157        __u32 count_planes;
00158 };
00159 
00160 #define DRM_MODE_ENCODER_NONE      0
00161 #define DRM_MODE_ENCODER_DAC       1
00162 #define DRM_MODE_ENCODER_TMDS      2
00163 #define DRM_MODE_ENCODER_LVDS      3
00164 #define DRM_MODE_ENCODER_TVDAC     4
00165 
00166 struct drm_mode_get_encoder {
00167        __u32 encoder_id;
00168        __u32 encoder_type;
00169 
00170        __u32 crtc_id; 
00172        __u32 possible_crtcs;
00173        __u32 possible_clones;
00174 };
00175 
00176 /* This is for connectors with multiple signal types. */
00177 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
00178 #define DRM_MODE_SUBCONNECTOR_Automatic   0
00179 #define DRM_MODE_SUBCONNECTOR_Unknown     0
00180 #define DRM_MODE_SUBCONNECTOR_DVID 3
00181 #define DRM_MODE_SUBCONNECTOR_DVIA 4
00182 #define DRM_MODE_SUBCONNECTOR_Composite   5
00183 #define DRM_MODE_SUBCONNECTOR_SVIDEO      6
00184 #define DRM_MODE_SUBCONNECTOR_Component   8
00185 #define DRM_MODE_SUBCONNECTOR_SCART       9
00186 
00187 #define DRM_MODE_CONNECTOR_Unknown 0
00188 #define DRM_MODE_CONNECTOR_VGA            1
00189 #define DRM_MODE_CONNECTOR_DVII           2
00190 #define DRM_MODE_CONNECTOR_DVID           3
00191 #define DRM_MODE_CONNECTOR_DVIA           4
00192 #define DRM_MODE_CONNECTOR_Composite      5
00193 #define DRM_MODE_CONNECTOR_SVIDEO  6
00194 #define DRM_MODE_CONNECTOR_LVDS           7
00195 #define DRM_MODE_CONNECTOR_Component      8
00196 #define DRM_MODE_CONNECTOR_9PinDIN 9
00197 #define DRM_MODE_CONNECTOR_DisplayPort    10
00198 #define DRM_MODE_CONNECTOR_HDMIA   11
00199 #define DRM_MODE_CONNECTOR_HDMIB   12
00200 #define DRM_MODE_CONNECTOR_TV             13
00201 #define DRM_MODE_CONNECTOR_eDP            14
00202 
00203 struct drm_mode_get_connector {
00204 
00205        __u64 encoders_ptr;
00206        __u64 modes_ptr;
00207        __u64 props_ptr;
00208        __u64 prop_values_ptr;
00209 
00210        __u32 count_modes;
00211        __u32 count_props;
00212        __u32 count_encoders;
00213 
00214        __u32 encoder_id; 
00215        __u32 connector_id; 
00216        __u32 connector_type;
00217        __u32 connector_type_id;
00218 
00219        __u32 connection;
00220        __u32 mm_width, mm_height; 
00221        __u32 subpixel;
00222 };
00223 
00224 #define DRM_MODE_PROP_PENDING      (1<<0)
00225 #define DRM_MODE_PROP_RANGE (1<<1)
00226 #define DRM_MODE_PROP_IMMUTABLE    (1<<2)
00227 #define DRM_MODE_PROP_ENUM  (1<<3) /* enumerated type with text strings */
00228 #define DRM_MODE_PROP_BLOB  (1<<4)
00229 #define DRM_MODE_PROP_BITMASK      (1<<5) /* bitmask of enumerated types */
00230 
00231 struct drm_mode_property_enum {
00232        __u64 value;
00233        char name[DRM_PROP_NAME_LEN];
00234 };
00235 
00236 struct drm_mode_get_property {
00237        __u64 values_ptr; /* values and blob lengths */
00238        __u64 enum_blob_ptr; /* enum and blob id ptrs */
00239 
00240        __u32 prop_id;
00241        __u32 flags;
00242        char name[DRM_PROP_NAME_LEN];
00243 
00244        __u32 count_values;
00245        __u32 count_enum_blobs;
00246 };
00247 
00248 struct drm_mode_connector_set_property {
00249        __u64 value;
00250        __u32 prop_id;
00251        __u32 connector_id;
00252 };
00253 
00254 #define DRM_MODE_OBJECT_CRTC 0xcccccccc
00255 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
00256 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
00257 #define DRM_MODE_OBJECT_MODE 0xdededede
00258 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
00259 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb
00260 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
00261 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
00262 
00263 struct drm_mode_obj_get_properties {
00264        __u64 props_ptr;
00265        __u64 prop_values_ptr;
00266        __u32 count_props;
00267        __u32 obj_id;
00268        __u32 obj_type;
00269 };
00270 
00271 struct drm_mode_obj_set_property {
00272        __u64 value;
00273        __u32 prop_id;
00274        __u32 obj_id;
00275        __u32 obj_type;
00276 };
00277 
00278 struct drm_mode_get_blob {
00279        __u32 blob_id;
00280        __u32 length;
00281        __u64 data;
00282 };
00283 
00284 struct drm_mode_fb_cmd {
00285        __u32 fb_id;
00286        __u32 width, height;
00287        __u32 pitch;
00288        __u32 bpp;
00289        __u32 depth;
00290        /* driver specific handle */
00291        __u32 handle;
00292 };
00293 
00294 #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
00295 
00296 struct drm_mode_fb_cmd2 {
00297        __u32 fb_id;
00298        __u32 width, height;
00299        __u32 pixel_format; /* fourcc code from drm_fourcc.h */
00300        __u32 flags;
00301 
00302        /*
00303         * In case of planar formats, this ioctl allows up to 4
00304         * buffer objects with offsets and pitches per plane.
00305         * The pitch and offset order is dictated by the fourcc,
00306         * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
00307         *
00308         *   YUV 4:2:0 image with a plane of 8 bit Y samples
00309         *   followed by an interleaved U/V plane containing
00310         *   8 bit 2x2 subsampled colour difference samples.
00311         *
00312         * So it would consist of Y as offset[0] and UV as
00313         * offset[1].  Note that offset[0] will generally
00314         * be 0.
00315         */
00316        __u32 handles[4];
00317        __u32 pitches[4]; /* pitch for each plane */
00318        __u32 offsets[4]; /* offset of each plane */
00319 };
00320 
00321 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
00322 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
00323 #define DRM_MODE_FB_DIRTY_FLAGS         0x03
00324 
00325 /*
00326  * Mark a region of a framebuffer as dirty.
00327  *
00328  * Some hardware does not automatically update display contents
00329  * as a hardware or software draw to a framebuffer. This ioctl
00330  * allows userspace to tell the kernel and the hardware what
00331  * regions of the framebuffer have changed.
00332  *
00333  * The kernel or hardware is free to update more then just the
00334  * region specified by the clip rects. The kernel or hardware
00335  * may also delay and/or coalesce several calls to dirty into a
00336  * single update.
00337  *
00338  * Userspace may annotate the updates, the annotates are a
00339  * promise made by the caller that the change is either a copy
00340  * of pixels or a fill of a single color in the region specified.
00341  *
00342  * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
00343  * the number of updated regions are half of num_clips given,
00344  * where the clip rects are paired in src and dst. The width and
00345  * height of each one of the pairs must match.
00346  *
00347  * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
00348  * promises that the region specified of the clip rects is filled
00349  * completely with a single color as given in the color argument.
00350  */
00351 
00352 struct drm_mode_fb_dirty_cmd {
00353        __u32 fb_id;
00354        __u32 flags;
00355        __u32 color;
00356        __u32 num_clips;
00357        __u64 clips_ptr;
00358 };
00359 
00360 struct drm_mode_mode_cmd {
00361        __u32 connector_id;
00362        struct drm_mode_modeinfo mode;
00363 };
00364 
00365 #define DRM_MODE_CURSOR_BO  (1<<0)
00366 #define DRM_MODE_CURSOR_MOVE       (1<<1)
00367 
00368 /*
00369  * depending on the value in flags diffrent members are used.
00370  *
00371  * CURSOR_BO uses
00372  *    crtc
00373  *    width
00374  *    height
00375  *    handle - if 0 turns the cursor of
00376  *
00377  * CURSOR_MOVE uses
00378  *    crtc
00379  *    x
00380  *    y
00381  */
00382 struct drm_mode_cursor {
00383        __u32 flags;
00384        __u32 crtc_id;
00385        __s32 x;
00386        __s32 y;
00387        __u32 width;
00388        __u32 height;
00389        /* driver specific handle */
00390        __u32 handle;
00391 };
00392 
00393 struct drm_mode_crtc_lut {
00394        __u32 crtc_id;
00395        __u32 gamma_size;
00396 
00397        /* pointers to arrays */
00398        __u64 red;
00399        __u64 green;
00400        __u64 blue;
00401 };
00402 
00403 #define DRM_MODE_PAGE_FLIP_EVENT 0x01
00404 #define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
00405 
00406 /*
00407  * Request a page flip on the specified crtc.
00408  *
00409  * This ioctl will ask KMS to schedule a page flip for the specified
00410  * crtc.  Once any pending rendering targeting the specified fb (as of
00411  * ioctl time) has completed, the crtc will be reprogrammed to display
00412  * that fb after the next vertical refresh.  The ioctl returns
00413  * immediately, but subsequent rendering to the current fb will block
00414  * in the execbuffer ioctl until the page flip happens.  If a page
00415  * flip is already pending as the ioctl is called, EBUSY will be
00416  * returned.
00417  *
00418  * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
00419  * request that drm sends back a vblank event (see drm.h: struct
00420  * drm_event_vblank) when the page flip is done.  The user_data field
00421  * passed in with this ioctl will be returned as the user_data field
00422  * in the vblank event struct.
00423  *
00424  * The reserved field must be zero until we figure out something
00425  * clever to use it for.
00426  */
00427 
00428 struct drm_mode_crtc_page_flip {
00429        __u32 crtc_id;
00430        __u32 fb_id;
00431        __u32 flags;
00432        __u32 reserved;
00433        __u64 user_data;
00434 };
00435 
00436 /* create a dumb scanout buffer */
00437 struct drm_mode_create_dumb {
00438         __u32 height;
00439         __u32 width;
00440         __u32 bpp;
00441         __u32 flags;
00442         /* handle, pitch, size will be returned */
00443         __u32 handle;
00444         __u32 pitch;
00445         __u64 size;
00446 };
00447 
00448 /* set up for mmap of a dumb scanout buffer */
00449 struct drm_mode_map_dumb {
00451         __u32 handle;
00452         __u32 pad;
00458         __u64 offset;
00459 };
00460 
00461 struct drm_mode_destroy_dumb {
00462        __u32 handle;
00463 };
00464 
00465 #endif