Back to index

glibc  2.9
ucontext.h
Go to the documentation of this file.
00001 /* Copyright (C) 1998, 1999, 2002, 2004, 2005 Free Software Foundation, Inc.
00002    This file is part of the GNU C Library.
00003 
00004    The GNU C Library is free software; you can redistribute it and/or
00005    modify it under the terms of the GNU Lesser General Public
00006    License as published by the Free Software Foundation; either
00007    version 2.1 of the License, or (at your option) any later version.
00008 
00009    The GNU C Library is distributed in the hope that it will be useful,
00010    but WITHOUT ANY WARRANTY; without even the implied warranty of
00011    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012    Lesser General Public License for more details.
00013 
00014    You should have received a copy of the GNU Lesser General Public
00015    License along with the GNU C Library; if not, write to the Free
00016    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
00017    02111-1307 USA.  */
00018 
00019 #ifndef _SYS_UCONTEXT_H
00020 #define _SYS_UCONTEXT_H     1
00021 
00022 #include <features.h>
00023 #include <signal.h>
00024 
00025 /* We need the signal context definitions even if they are not used
00026    included in <signal.h>.  */
00027 #include <bits/sigcontext.h>
00028 
00029 #if __WORDSIZE == 32
00030 
00031 /* Number of general registers.  */
00032 # define NGREG       48
00033 
00034 /* Container for all general registers.  */
00035 typedef unsigned long gregset_t[NGREG];
00036 
00037 /* Container for floating-point registers and status */
00038 typedef struct _libc_fpstate
00039 {
00040        double fpregs[32];
00041        double fpscr;
00042        unsigned int _pad[2];
00043 } fpregset_t;
00044 
00045 /* Container for Altivec/VMX registers and status.
00046    Needs to be aligned on a 16-byte boundary. */
00047 typedef struct _libc_vrstate
00048 {
00049        unsigned int vrregs[32][4];
00050        unsigned int vrsave;
00051        unsigned int _pad[2];
00052        unsigned int vscr;
00053 } vrregset_t;
00054 
00055 /* Context to describe whole processor state.  */
00056 typedef struct
00057 {
00058        gregset_t gregs;
00059        fpregset_t fpregs;
00060        vrregset_t vrregs __attribute__((__aligned__(16)));
00061 } mcontext_t;
00062 
00063 #else
00064 
00065 /* For 64-bit kernels with Altivec support, a machine context is exactly 
00066  * a sigcontext.  For older kernel (without Altivec) the sigcontext matches 
00067  * the mcontext upto but not including the v_regs field.  For kernels that 
00068  * don't AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the 
00069  * v_regs field may not exit and should not be referenced.  The v_regd field
00070  * can be refernced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC
00071  * is set in AT_HWCAP.  */
00072     
00073 /* Number of general registers.  */
00074 # define NGREG       48     /* includes r0-r31, nip, msr, lr, etc.   */
00075 # define NFPREG      33     /* includes fp0-fp31 &fpscr.  */
00076 # define NVRREG      34     /* includes v0-v31, vscr, & vrsave in split vectors */
00077 
00078 typedef unsigned long gregset_t[NGREG];
00079 typedef double fpregset_t[NFPREG];
00080 
00081 /* Container for Altivec/VMX Vector Status and Control Register.  Only 32-bits
00082    but can only be copied to/from a 128-bit vector register.  So we allocated 
00083    a whole quadword speedup save/restore.  */
00084 typedef struct _libc_vscr
00085 {
00086        unsigned int __pad[3];
00087        unsigned int vscr_word;
00088 } vscr_t;
00089 
00090 /* Container for Altivec/VMX registers and status.
00091    Must to be aligned on a 16-byte boundary. */
00092 typedef struct _libc_vrstate
00093 {
00094        unsigned int  vrregs[32][4];
00095        vscr_t        vscr;
00096        unsigned int  vrsave;
00097        unsigned int  __pad[3];
00098 } vrregset_t  __attribute__((__aligned__(16)));
00099 
00100 typedef struct {
00101        unsigned long __unused[4];
00102        int           signal;
00103        int           __pad0;
00104        unsigned long handler;
00105        unsigned long oldmask;
00106        struct pt_regs       *regs;
00107        gregset_t     gp_regs;
00108        fpregset_t    fp_regs;
00109 /*
00110  * To maintain compatibility with current implementations the sigcontext is 
00111  * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) 
00112  * followed by an unstructured (vmx_reserve) field of 69 doublewords.  This 
00113  * allows the array of vector registers to be quadword aligned independent of 
00114  * the alignment of the containing sigcontext or ucontext. It is the 
00115  * responsibility of the code setting the sigcontext to set this pointer to 
00116  * either NULL (if this processor does not support the VMX feature) or the 
00117  * address of the first quadword within the allocated (vmx_reserve) area.
00118  *
00119  * The pointer (v_regs) of vector type (elf_vrreg_t) is essentually  
00120  * an array of 34 quadword entries.  The entries with 
00121  * indexes 0-31 contain the corresponding vector registers.  The entry with 
00122  * index 32 contains the vscr as the last word (offset 12) within the 
00123  * quadword.  This allows the vscr to be stored as either a quadword (since 
00124  * it must be copied via a vector register to/from storage) or as a word.  
00125  * The entry with index 33 contains the vrsave as the first word (offset 0) 
00126  * within the quadword.
00127  */
00128        vrregset_t    *v_regs;
00129        long          vmx_reserve[NVRREG+NVRREG+1];
00130 } mcontext_t;
00131 
00132 #endif
00133 
00134 /* Userlevel context.  */
00135 typedef struct ucontext
00136   {
00137     unsigned long int uc_flags;
00138     struct ucontext *uc_link;
00139     stack_t uc_stack;
00140 #if __WORDSIZE == 32
00141     /*
00142      * These fields are set up this way to maximize source and
00143      * binary compatibility with code written for the old
00144      * ucontext_t definition, which didn't include space for the
00145      * registers.
00146      *
00147      * Different versions of the kernel have stored the registers on
00148      * signal delivery at different offsets from the ucontext struct.
00149      * Programs should thus use the uc_mcontext.uc_regs pointer to
00150      * find where the registers are actually stored.  The registers
00151      * will be stored within the ucontext_t struct but not necessarily
00152      * at a fixed address.  As a side-effect, this lets us achieve
00153      * 16-byte alignment for the register storage space if the
00154      * Altivec registers are to be saved, without requiring 16-byte
00155      * alignment on the whole ucontext_t.
00156      *
00157      * The uc_mcontext.regs field is included for source compatibility
00158      * with programs written against the older ucontext_t definition,
00159      * and its name should therefore not change.  The uc_pad field
00160      * is for binary compatibility with programs compiled against the
00161      * old ucontext_t; it ensures that uc_mcontext.regs and uc_sigmask
00162      * are at the same offset as previously.
00163      */
00164     int uc_pad[7];
00165     union uc_regs_ptr {
00166       struct pt_regs *regs;
00167       mcontext_t *uc_regs;
00168     } uc_mcontext;
00169     sigset_t    uc_sigmask;
00170     char uc_reg_space[sizeof(mcontext_t) + 12];  /* last for extensibility */
00171 #else /* 64-bit */
00172     sigset_t    uc_sigmask;
00173     mcontext_t  uc_mcontext;  /* last for extensibility */
00174 #endif
00175   } ucontext_t;
00176 
00177 #endif /* sys/ucontext.h */