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glibc  2.9
sysdep.h
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00001 /* Copyright (C) 1999, 2001, 2002, 2006 Free Software Foundation, Inc.
00002    This file is part of the GNU C Library.
00003 
00004    The GNU C Library is free software; you can redistribute it and/or
00005    modify it under the terms of the GNU Lesser General Public
00006    License as published by the Free Software Foundation; either
00007    version 2.1 of the License, or (at your option) any later version.
00008 
00009    The GNU C Library is distributed in the hope that it will be useful,
00010    but WITHOUT ANY WARRANTY; without even the implied warranty of
00011    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012    Lesser General Public License for more details.
00013 
00014    You should have received a copy of the GNU Lesser General Public
00015    License along with the GNU C Library; if not, write to the Free
00016    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
00017    02111-1307 USA.  */
00018 
00019 /* 
00020  * Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP). 
00021  * This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup.
00022  * The following must match the kernels linux/asm/cputable.h.  
00023  */
00024 #define PPC_FEATURE_32                    0x80000000 /* 32-bit mode. */
00025 #define PPC_FEATURE_64                    0x40000000 /* 64-bit mode. */
00026 #define PPC_FEATURE_601_INSTR             0x20000000 /* 601 chip, Old POWER ISA.  */
00027 #define PPC_FEATURE_HAS_ALTIVEC           0x10000000 /* SIMD/Vector Unit.  */
00028 #define PPC_FEATURE_HAS_FPU        0x08000000 /* Floating Point Unit.  */
00029 #define PPC_FEATURE_HAS_MMU        0x04000000 /* Memory Management Unit.  */
00030 #define PPC_FEATURE_HAS_4xxMAC            0x02000000 /* 4xx Multiply Accumulator.  */
00031 #define PPC_FEATURE_UNIFIED_CACHE  0x01000000 /* Unified I/D cache.  */
00032 #define PPC_FEATURE_HAS_SPE        0x00800000 /* Signal Processing ext.  */
00033 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 /* SPE Float.  */
00034 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 /* SPE Double.  */
00035 #define PPC_FEATURE_NO_TB          0x00100000 /* 601/403gx have no timebase */
00036 #define PPC_FEATURE_POWER4         0x00080000 /* POWER4 ISA 2.00 */
00037 #define PPC_FEATURE_POWER5         0x00040000 /* POWER5 ISA 2.02 */
00038 #define PPC_FEATURE_POWER5_PLUS           0x00020000 /* POWER5+ ISA 2.03 */
00039 #define PPC_FEATURE_CELL_BE        0x00010000 /* CELL Broadband Engine */
00040 #define PPC_FEATURE_BOOKE          0x00008000
00041 #define PPC_FEATURE_SMT                   0x00004000 /* Simultaneous Multi-Threading */
00042 #define PPC_FEATURE_ICACHE_SNOOP   0x00002000
00043 #define PPC_FEATURE_ARCH_2_05             0x00001000 /* ISA 2.05 */
00044 #define PPC_FEATURE_PA6T           0x00000800 /* PA Semi 6T Core */
00045 #define PPC_FEATURE_HAS_DFP        0x00000400 /* Decimal FP Unit */
00046 #define PPC_FEATURE_POWER6_EXT            0x00000200 /* P6 + mffgpr/mftgpr */
00047 #define PPC_FEATURE_HAS_VSX        0x00000100 /* P7 Vector Extension.  */
00048 #define PPC_FEATURE_ARCH_2_06              0x00000080 /* ISA 2.06 */
00049 #define PPC_FEATURE_970 (PPC_FEATURE_POWER4 + PPC_FEATURE_HAS_ALTIVEC)
00050 
00051 #ifdef __ASSEMBLER__
00052 
00053 /* Symbolic names for the registers.  The only portable way to write asm
00054    code is to use number but this produces really unreadable code.
00055    Therefore these symbolic names.  */
00056 
00057 /* Integer registers.  */
00058 #define r0    0
00059 #define r1    1
00060 #define r2    2
00061 #define r3    3
00062 #define r4    4
00063 #define r5    5
00064 #define r6    6
00065 #define r7    7
00066 #define r8    8
00067 #define r9    9
00068 #define r10   10
00069 #define r11   11
00070 #define r12   12
00071 #define r13   13
00072 #define r14   14
00073 #define r15   15
00074 #define r16   16
00075 #define r17   17
00076 #define r18   18
00077 #define r19   19
00078 #define r20   20
00079 #define r21   21
00080 #define r22   22
00081 #define r23   23
00082 #define r24   24
00083 #define r25   25
00084 #define r26   26
00085 #define r27   27
00086 #define r28   28
00087 #define r29   29
00088 #define r30   30
00089 #define r31   31
00090 
00091 /* Floating-point registers.  */
00092 #define fp0   0
00093 #define fp1   1
00094 #define fp2   2
00095 #define fp3   3
00096 #define fp4   4
00097 #define fp5   5
00098 #define fp6   6
00099 #define fp7   7
00100 #define fp8   8
00101 #define fp9   9
00102 #define fp10  10
00103 #define fp11  11
00104 #define fp12  12
00105 #define fp13  13
00106 #define fp14  14
00107 #define fp15  15
00108 #define fp16  16
00109 #define fp17  17
00110 #define fp18  18
00111 #define fp19  19
00112 #define fp20  20
00113 #define fp21  21
00114 #define fp22  22
00115 #define fp23  23
00116 #define fp24  24
00117 #define fp25  25
00118 #define fp26  26
00119 #define fp27  27
00120 #define fp28  28
00121 #define fp29  29
00122 #define fp30  30
00123 #define fp31  31
00124 
00125 /* Condition code registers.  */
00126 #define cr0   0
00127 #define cr1   1
00128 #define cr2   2
00129 #define cr3   3
00130 #define cr4   4
00131 #define cr5   5
00132 #define cr6   6
00133 #define cr7   7
00134 
00135 /* Vector registers. */
00136 #define v0    0
00137 #define v1    1
00138 #define v2    2
00139 #define v3    3
00140 #define v4    4
00141 #define v5    5
00142 #define v6    6
00143 #define v7    7
00144 #define v8    8
00145 #define v9    9
00146 #define v10   10
00147 #define v11   11
00148 #define v12   12
00149 #define v13   13
00150 #define v14   14
00151 #define v15   15
00152 #define v16   16
00153 #define v17   17
00154 #define v18   18
00155 #define v19   19
00156 #define v20   20
00157 #define v21   21
00158 #define v22   22
00159 #define v23   23
00160 #define v24   24
00161 #define v25   25
00162 #define v26   26
00163 #define v27   27
00164 #define v28   28
00165 #define v29   29
00166 #define v30   30
00167 #define v31   31
00168 
00169 #define VRSAVE       256
00170 
00171 
00172 #ifdef __ELF__
00173 
00174 /* This seems to always be the case on PPC.  */
00175 #define ALIGNARG(log2) log2
00176 /* For ELF we need the `.type' directive to make shared libs work right.  */
00177 #define ASM_TYPE_DIRECTIVE(name,typearg) .type name,typearg;
00178 #define ASM_SIZE_DIRECTIVE(name) .size name,.-name
00179 
00180 #endif /* __ELF__ */
00181 #endif /* __ASSEMBLER__ */
00182