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glibc  2.9
register-dump.h
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00001 /* Dump registers.
00002    Copyright (C) 1998, 2006 Free Software Foundation, Inc.
00003    This file is part of the GNU C Library.
00004 
00005    The GNU C Library is free software; you can redistribute it and/or
00006    modify it under the terms of the GNU Lesser General Public
00007    License as published by the Free Software Foundation; either
00008    version 2.1 of the License, or (at your option) any later version.
00009 
00010    The GNU C Library is distributed in the hope that it will be useful,
00011    but WITHOUT ANY WARRANTY; without even the implied warranty of
00012    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00013    Lesser General Public License for more details.
00014 
00015    You should have received a copy of the GNU Lesser General Public
00016    License along with the GNU C Library; if not, write to the Free
00017    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
00018    02111-1307 USA.  */
00019 
00020 #include <sys/uio.h>
00021 #include <stdio-common/_itoa.h>
00022 
00023 /* This prints out the information in the following form: */
00024 static const char dumpform[] = "\
00025 Register dump:\n\
00026 fp0-3:   0000030%0000031% 0000032%0000033% 0000034%0000035% 0000036%0000037%\n\
00027 fp4-7:   0000038%0000039% 000003a%000003b% 000003c%000003d% 000003e%000003f%\n\
00028 fp8-11:  0000040%0000041% 0000042%0000043% 0000044%0000045% 0000046%0000047%\n\
00029 fp12-15: 0000048%0000049% 000004a%000004b% 000004c%000004d% 000004e%000004f%\n\
00030 fp16-19: 0000050%0000051% 0000052%0000053% 0000054%0000055% 0000056%0000057%\n\
00031 fp20-23: 0000058%0000059% 000005a%000005b% 000005c%000005d% 000005e%000005f%\n\
00032 fp24-27: 0000060%0000061% 0000062%0000063% 0000064%0000065% 0000066%0000067%\n\
00033 fp28-31: 0000068%0000069% 000006a%000006b% 000006c%000006d% 000006e%000006f%\n\
00034 r0 =0000000% sp =0000001% r2 =0000002% r3 =0000003%  trap=0000028%\n\
00035 r4 =0000004% r5 =0000005% r6 =0000006% r7 =0000007%   sr0=0000020% sr1=0000021%\n\
00036 r8 =0000008% r9 =0000009% r10=000000a% r11=000000b%   dar=0000029% dsi=000002a%\n\
00037 r12=000000c% r13=000000d% r14=000000e% r15=000000f%   r3*=0000022%\n\
00038 r16=0000010% r17=0000011% r18=0000012% r19=0000013%\n\
00039 r20=0000014% r21=0000015% r22=0000016% r23=0000017%    lr=0000024% xer=0000025%\n\
00040 r24=0000018% r25=0000019% r26=000001a% r27=000001b%    mq=0000027% ctr=0000023%\n\
00041 r28=000001c% r29=000001d% r30=000001e% r31=000001f%  fscr=0000071% ccr=0000026%\n\
00042 ";
00043 
00044 /* Most of the fields are self-explanatory.  'sr0' is the next
00045    instruction to execute, from SRR0, which may have some relationship
00046    with the instruction that caused the exception.  'r3*' is the value
00047    that will be returned in register 3 when the current system call
00048    returns.  'sr1' is SRR1, bits 16-31 of which are copied from the MSR:
00049 
00050    16 - External interrupt enable
00051    17 - Privilege level (1=user, 0=supervisor)
00052    18 - FP available
00053    19 - Machine check enable (if clear, processor locks up on machine check)
00054    20 - FP exception mode bit 0 (FP exceptions recoverable)
00055    21 - Single-step trace enable
00056    22 - Branch trace enable
00057    23 - FP exception mode bit 1
00058    25 - exception prefix (if set, exceptions are taken from 0xFFFnnnnn,
00059         otherwise from 0x000nnnnn).
00060    26 - Instruction address translation enabled.
00061    27 - Data address translation enabled.
00062    30 - Exception is recoverable (otherwise, don't try to return).
00063    31 - Little-endian mode enable.
00064 
00065    'Trap' is the address of the exception:
00066 
00067    00200 - Machine check exception (memory parity error, for instance)
00068    00300 - Data access exception (memory not mapped, see dsisr for why)
00069    00400 - Instruction access exception (memory not mapped)
00070    00500 - External interrupt
00071    00600 - Alignment exception (see dsisr for more information)
00072    00700 - Program exception (illegal/trap instruction, FP exception)
00073    00800 - FP unavailable (should not be seen by user code)
00074    00900 - Decrementer exception (for instance, SIGALRM)
00075    00A00 - I/O controller interface exception
00076    00C00 - System call exception (for instance, kill(3)).
00077    00E00 - FP assist exception (optional FP instructions, etc.)
00078 
00079    'dar' is the memory location, for traps 00300, 00400, 00600, 00A00.
00080    'dsisr' has the following bits under trap 00300:
00081    0 - direct-store error exception
00082    1 - no page table entry for page
00083    4 - memory access not permitted
00084    5 - trying to access I/O controller space or using lwarx/stwcx on
00085        non-write-cached memory
00086    6 - access was store
00087    9 - data access breakpoint hit
00088    10 - segment table search failed to find translation (64-bit ppcs only)
00089    11 - I/O controller instruction not permitted
00090    For trap 00400, the same bits are set in SRR1 instead.
00091    For trap 00600, bits 12-31 of the DSISR set to allow emulation of
00092    the instruction without actually having to read it from memory.
00093 */
00094 
00095 #define xtoi(x) (x >= 'a' ? x + 10 - 'a' : x - '0')
00096 
00097 static void
00098 register_dump (int fd, struct sigcontext *ctx)
00099 {
00100   char buffer[sizeof(dumpform)];
00101   char *bufferpos;
00102   unsigned regno;
00103   unsigned *regs = (unsigned *)(ctx->regs);
00104 
00105   memcpy(buffer, dumpform, sizeof(dumpform));
00106 
00107   /* Generate the output.  */
00108   while ((bufferpos = memchr (buffer, '%', sizeof(dumpform))))
00109     {
00110       regno = xtoi (bufferpos[-1]) | xtoi (bufferpos[-2]) << 4;
00111       memset (bufferpos-2, '0', 3);
00112       _itoa_word (regs[regno], bufferpos+1, 16, 0);
00113     }
00114 
00115   /* Write the output.  */
00116   write (fd, buffer, sizeof(buffer) - 1);
00117 }
00118 
00119 
00120 #define REGISTER_DUMP \
00121   register_dump (fd, ctx)