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glibc  2.9
fpu_control.h
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00001 /* FPU control word bits.  AM33/2.0 version.
00002    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2004
00003    Free Software Foundation, Inc.
00004    This file is part of the GNU C Library.
00005    Contributed by Alexandre Oliva <aoliva@redhat.com>
00006    based on the corresponding file in the mips port.
00007 
00008    The GNU C Library is free software; you can redistribute it and/or
00009    modify it under the terms of the GNU Lesser General Public
00010    License as published by the Free Software Foundation; either
00011    version 2.1 of the License, or (at your option) any later version.
00012 
00013    The GNU C Library is distributed in the hope that it will be useful,
00014    but WITHOUT ANY WARRANTY; without even the implied warranty of
00015    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00016    Lesser General Public License for more details.
00017 
00018    You should have received a copy of the GNU Lesser General Public
00019    License along with the GNU C Library; if not, write to the Free
00020    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
00021    02111-1307 USA.  */
00022 
00023 #ifndef _FPU_CONTROL_H
00024 #define _FPU_CONTROL_H
00025 
00026 /* AM33/2.0 FPU floating point control register bits.
00027  *
00028  * 31-22  -> reserved
00029  * 21-18  -> floating-point condition codes (L, G, E, U)
00030  * 17-16  -> rounding modes (00 is to-nearest; other values are reserved
00031  * 15     -> reserved (read as 0, write with 0)
00032  * 14-10  -> Exception Cause (inValid, divZero, Overflow, Underflow, Inexact)
00033  *  9- 5  -> Exception Enable
00034  *  4- 0  -> Exception Flag, cleared when exception cause is set
00035  */
00036 
00037 #include <features.h>
00038 #include <fenv.h>
00039 
00040 /* masking of interrupts */
00041 #define _FPU_MASK_V     0x0200  /* Invalid operation */
00042 #define _FPU_MASK_Z     0x0100  /* Division by zero  */
00043 #define _FPU_MASK_O     0x0080  /* Overflow          */
00044 #define _FPU_MASK_U     0x0040  /* Underflow         */
00045 #define _FPU_MASK_I     0x0020  /* Inexact operation */
00046 
00047 /* rounding control */
00048 #define _FPU_RC_NEAREST 0x0     /* Only available mode */
00049 
00050 #define _FPU_RESERVED 0xffc08000  /* Reserved bits in fpcr */
00051 
00052 
00053 /* The fdlibm code requires strict IEEE double precision arithmetic,
00054    and no interrupts for exceptions, rounding to nearest.  */
00055 
00056 #define _FPU_DEFAULT  0x0000001f
00057 
00058 /* IEEE:  same as above, but exceptions */
00059 #define _FPU_IEEE     0x000003ff
00060 
00061 /* Type of the control word.  */
00062 typedef unsigned int fpu_control_t;
00063 
00064 /* Macros for accessing the hardware control word.  _FPU_SETCW is
00065    defined such that it won't modify the EF bits, that are cleared
00066    when assigned bits that are set.  Use SETFCW to get them actually
00067    reset.  */
00068 #define _FPU_SETFCW(cw) __asm__ ("fmov %0,fpcr" : : "ri" (cw))
00069 #define _FPU_SETCW(cw) _FPU_SETFCW((cw) & ~FE_ALL_EXCEPT)
00070 #define _FPU_GETCW(cw) __asm__ ("fmov fpcr,%0" : "=r" (cw))
00071 
00072 /* Default control word set at startup.  */
00073 extern fpu_control_t __fpu_control;
00074 
00075 #endif /* fpu_control.h */