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glibc  2.9
debugreg.h
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00001 /* Copyright (C) 1998, 2000 Free Software Foundation, Inc.
00002    This file is part of the GNU C Library.
00003 
00004    The GNU C Library is free software; you can redistribute it and/or
00005    modify it under the terms of the GNU Lesser General Public
00006    License as published by the Free Software Foundation; either
00007    version 2.1 of the License, or (at your option) any later version.
00008 
00009    The GNU C Library is distributed in the hope that it will be useful,
00010    but WITHOUT ANY WARRANTY; without even the implied warranty of
00011    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00012    Lesser General Public License for more details.
00013 
00014    You should have received a copy of the GNU Lesser General Public
00015    License along with the GNU C Library; if not, write to the Free
00016    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
00017    02111-1307 USA.  */
00018 
00019 #ifndef _SYS_DEBUGREG_H
00020 #define _SYS_DEBUGREG_H     1
00021 
00022 /* Indicate the register numbers for a number of the specific
00023    debug registers.  Registers 0-3 contain the addresses we wish to trap on */
00024 #define DR_FIRSTADDR 0        /* u_debugreg[DR_FIRSTADDR] */
00025 #define DR_LASTADDR 3         /* u_debugreg[DR_LASTADDR]  */
00026 
00027 #define DR_STATUS 6           /* u_debugreg[DR_STATUS]     */
00028 #define DR_CONTROL 7          /* u_debugreg[DR_CONTROL] */
00029 
00030 /* Define a few things for the status register.  We can use this to determine
00031    which debugging register was responsible for the trap.  The other bits
00032    are either reserved or not of interest to us. */
00033 
00034 #define DR_TRAP0     (0x1)         /* db0 */
00035 #define DR_TRAP1     (0x2)         /* db1 */
00036 #define DR_TRAP2     (0x4)         /* db2 */
00037 #define DR_TRAP3     (0x8)         /* db3 */
00038 
00039 #define DR_STEP             (0x4000)      /* single-step */
00040 #define DR_SWITCH    (0x8000)      /* task switch */
00041 
00042 /* Now define a bunch of things for manipulating the control register.
00043    The top two bytes of the control register consist of 4 fields of 4
00044    bits - each field corresponds to one of the four debug registers,
00045    and indicates what types of access we trap on, and how large the data
00046    field is that we are looking at */
00047 
00048 #define DR_CONTROL_SHIFT 16   /* Skip this many bits in ctl register */
00049 #define DR_CONTROL_SIZE  4    /* 4 control bits per register */
00050 
00051 #define DR_RW_EXECUTE       (0x0) /* Settings for the access types to trap on */
00052 #define DR_RW_WRITE  (0x1)
00053 #define DR_RW_READ   (0x3)
00054 
00055 #define DR_LEN_1 (0x0)            /* Settings for data length to trap on */
00056 #define DR_LEN_2 (0x4)
00057 #define DR_LEN_4 (0xC)
00058 
00059 /* The low byte to the control register determine which registers are
00060    enabled.  There are 4 fields of two bits.  One bit is "local", meaning
00061    that the processor will reset the bit after a task switch and the other
00062    is global meaning that we have to explicitly reset the bit.  With linux,
00063    you can use either one, since we explicitly zero the register when we enter
00064    kernel mode. */
00065 
00066 #define DR_LOCAL_ENABLE_SHIFT  0   /* Extra shift to the local enable bit */
00067 #define DR_GLOBAL_ENABLE_SHIFT 1   /* Extra shift to the global enable bit */
00068 #define DR_ENABLE_SIZE             2   /* 2 enable bits per register */
00069 
00070 #define DR_LOCAL_ENABLE_MASK  (0x55) /* Set  local bits for all 4 regs */
00071 #define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
00072 
00073 /* The second byte to the control register has a few special things.
00074 
00075     On the i386, you should set the DR_LOCAL_SLOWDOWN or
00076     DR_GLOBAL_SLOWDOWN bits if you want to know exactly which
00077     instruction triggered the watchpoint.  Setting these bits causes
00078     the processor to run more slowly, but leaving them clear makes it
00079     treat watchpoint hits as imprecise exceptions, so you can't
00080     reliably determine which instruction caused the hit.
00081 
00082     The i486 and all later IA-32 processors ignore DR_LOCAL_SLOWDOWN
00083     and DR_GLOBAL_SLOWDOWN.  They always report the exception
00084     precisely, except in some rare cases, which the user can't do
00085     anything about.  */
00086 
00087 #define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */
00088 #define DR_LOCAL_SLOWDOWN   (0x100)  /* Local slow the pipeline */
00089 #define DR_GLOBAL_SLOWDOWN  (0x200)  /* Global slow the pipeline */
00090 
00091 #endif /* sys/debugreg.h */