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glibc  2.9
Defines
debugreg.h File Reference

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Defines

#define DR_FIRSTADDR   0 /* u_debugreg[DR_FIRSTADDR] */
#define DR_LASTADDR   3 /* u_debugreg[DR_LASTADDR] */
#define DR_STATUS   6 /* u_debugreg[DR_STATUS] */
#define DR_CONTROL   7 /* u_debugreg[DR_CONTROL] */
#define DR_TRAP0   (0x1) /* db0 */
#define DR_TRAP1   (0x2) /* db1 */
#define DR_TRAP2   (0x4) /* db2 */
#define DR_TRAP3   (0x8) /* db3 */
#define DR_STEP   (0x4000) /* single-step */
#define DR_SWITCH   (0x8000) /* task switch */
#define DR_CONTROL_SHIFT   16 /* Skip this many bits in ctl register */
#define DR_CONTROL_SIZE   4 /* 4 control bits per register */
#define DR_RW_EXECUTE   (0x0) /* Settings for the access types to trap on */
#define DR_RW_WRITE   (0x1)
#define DR_RW_READ   (0x3)
#define DR_LEN_1   (0x0) /* Settings for data length to trap on */
#define DR_LEN_2   (0x4)
#define DR_LEN_4   (0xC)
#define DR_LOCAL_ENABLE_SHIFT   0 /* Extra shift to the local enable bit */
#define DR_GLOBAL_ENABLE_SHIFT   1 /* Extra shift to the global enable bit */
#define DR_ENABLE_SIZE   2 /* 2 enable bits per register */
#define DR_LOCAL_ENABLE_MASK   (0x55) /* Set local bits for all 4 regs */
#define DR_GLOBAL_ENABLE_MASK   (0xAA) /* Set global bits for all 4 regs */
#define DR_CONTROL_RESERVED   (0xFC00) /* Reserved by Intel */
#define DR_LOCAL_SLOWDOWN   (0x100) /* Local slow the pipeline */
#define DR_GLOBAL_SLOWDOWN   (0x200) /* Global slow the pipeline */

Define Documentation

#define DR_CONTROL   7 /* u_debugreg[DR_CONTROL] */

Definition at line 28 of file debugreg.h.

#define DR_CONTROL_RESERVED   (0xFC00) /* Reserved by Intel */

Definition at line 87 of file debugreg.h.

#define DR_CONTROL_SHIFT   16 /* Skip this many bits in ctl register */

Definition at line 48 of file debugreg.h.

#define DR_CONTROL_SIZE   4 /* 4 control bits per register */

Definition at line 49 of file debugreg.h.

#define DR_ENABLE_SIZE   2 /* 2 enable bits per register */

Definition at line 68 of file debugreg.h.

#define DR_FIRSTADDR   0 /* u_debugreg[DR_FIRSTADDR] */

Definition at line 24 of file debugreg.h.

#define DR_GLOBAL_ENABLE_MASK   (0xAA) /* Set global bits for all 4 regs */

Definition at line 71 of file debugreg.h.

#define DR_GLOBAL_ENABLE_SHIFT   1 /* Extra shift to the global enable bit */

Definition at line 67 of file debugreg.h.

#define DR_GLOBAL_SLOWDOWN   (0x200) /* Global slow the pipeline */

Definition at line 89 of file debugreg.h.

#define DR_LASTADDR   3 /* u_debugreg[DR_LASTADDR] */

Definition at line 25 of file debugreg.h.

#define DR_LEN_1   (0x0) /* Settings for data length to trap on */

Definition at line 55 of file debugreg.h.

#define DR_LEN_2   (0x4)

Definition at line 56 of file debugreg.h.

#define DR_LEN_4   (0xC)

Definition at line 57 of file debugreg.h.

#define DR_LOCAL_ENABLE_MASK   (0x55) /* Set local bits for all 4 regs */

Definition at line 70 of file debugreg.h.

#define DR_LOCAL_ENABLE_SHIFT   0 /* Extra shift to the local enable bit */

Definition at line 66 of file debugreg.h.

#define DR_LOCAL_SLOWDOWN   (0x100) /* Local slow the pipeline */

Definition at line 88 of file debugreg.h.

#define DR_RW_EXECUTE   (0x0) /* Settings for the access types to trap on */

Definition at line 51 of file debugreg.h.

#define DR_RW_READ   (0x3)

Definition at line 53 of file debugreg.h.

#define DR_RW_WRITE   (0x1)

Definition at line 52 of file debugreg.h.

#define DR_STATUS   6 /* u_debugreg[DR_STATUS] */

Definition at line 27 of file debugreg.h.

#define DR_STEP   (0x4000) /* single-step */

Definition at line 39 of file debugreg.h.

#define DR_SWITCH   (0x8000) /* task switch */

Definition at line 40 of file debugreg.h.

#define DR_TRAP0   (0x1) /* db0 */

Definition at line 34 of file debugreg.h.

#define DR_TRAP1   (0x2) /* db1 */

Definition at line 35 of file debugreg.h.

#define DR_TRAP2   (0x4) /* db2 */

Definition at line 36 of file debugreg.h.

#define DR_TRAP3   (0x8) /* db3 */

Definition at line 37 of file debugreg.h.