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xtensa-isa.h
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00001 /* Interface definition for configurable Xtensa ISA support.
00002    Copyright 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
00003 
00004    This file is part of BFD, the Binary File Descriptor library.
00005 
00006    This program is free software; you can redistribute it and/or modify
00007    it under the terms of the GNU General Public License as published by
00008    the Free Software Foundation; either version 2 of the License, or
00009    (at your option) any later version.
00010 
00011    This program is distributed in the hope that it will be useful,
00012    but WITHOUT ANY WARRANTY; without even the implied warranty of
00013    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014    GNU General Public License for more details.
00015 
00016    You should have received a copy of the GNU General Public License
00017    along with this program; if not, write to the Free Software
00018    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00019 
00020 #ifndef XTENSA_LIBISA_H
00021 #define XTENSA_LIBISA_H
00022 
00023 #ifdef __cplusplus
00024 extern "C" {
00025 #endif
00026 
00027 /* Version number: This is intended to help support code that works with
00028    versions of this library from multiple Xtensa releases.  */
00029 
00030 #define XTENSA_ISA_VERSION 7000
00031 
00032 #ifndef uint32
00033 #define uint32 unsigned int
00034 #endif
00035 
00036 /* This file defines the interface to the Xtensa ISA library.  This
00037    library contains most of the ISA-specific information for a
00038    particular Xtensa processor.  For example, the set of valid
00039    instructions, their opcode encodings and operand fields are all
00040    included here.
00041 
00042    This interface basically defines a number of abstract data types.
00043 
00044    . an instruction buffer - for holding the raw instruction bits
00045    . ISA info - information about the ISA as a whole
00046    . instruction formats - instruction size and slot structure
00047    . opcodes - information about individual instructions
00048    . operands - information about register and immediate instruction operands
00049    . stateOperands - information about processor state instruction operands
00050    . interfaceOperands - information about interface instruction operands
00051    . register files - register file information
00052    . processor states - internal processor state information
00053    . system registers - "special registers" and "user registers"
00054    . interfaces - TIE interfaces that are external to the processor
00055    . functional units - TIE shared functions
00056 
00057    The interface defines a set of functions to access each data type.
00058    With the exception of the instruction buffer, the internal
00059    representations of the data structures are hidden.  All accesses must
00060    be made through the functions defined here.  */
00061 
00062 typedef struct xtensa_isa_opaque { int unused; } *xtensa_isa;
00063 
00064 
00065 /* Most of the Xtensa ISA entities (e.g., opcodes, regfiles, etc.) are
00066    represented here using sequential integers beginning with 0.  The
00067    specific values are only fixed for a particular instantiation of an
00068    xtensa_isa structure, so these values should only be used
00069    internally.  */
00070 
00071 typedef int xtensa_opcode;
00072 typedef int xtensa_format;
00073 typedef int xtensa_regfile;
00074 typedef int xtensa_state;
00075 typedef int xtensa_sysreg;
00076 typedef int xtensa_interface;
00077 typedef int xtensa_funcUnit;
00078 
00079 
00080 /* Define a unique value for undefined items.  */
00081 
00082 #define XTENSA_UNDEFINED -1
00083 
00084 
00085 /* Overview of using this interface to decode/encode instructions:
00086 
00087    Each Xtensa instruction is associated with a particular instruction
00088    format, where the format defines a fixed number of slots for
00089    operations.  The formats for the core Xtensa ISA have only one slot,
00090    but FLIX instructions may have multiple slots.  Within each slot,
00091    there is a single opcode and some number of associated operands.
00092 
00093    The encoding and decoding functions operate on instruction buffers,
00094    not on the raw bytes of the instructions.  The same instruction
00095    buffer data structure is used for both entire instructions and
00096    individual slots in those instructions -- the contents of a slot need
00097    to be extracted from or inserted into the buffer for the instruction
00098    as a whole.
00099 
00100    Decoding an instruction involves first finding the format, which
00101    identifies the number of slots, and then decoding each slot
00102    separately.  A slot is decoded by finding the opcode and then using
00103    the opcode to determine how many operands there are.  For example:
00104 
00105    xtensa_insnbuf_from_chars
00106    xtensa_format_decode
00107    for each slot {
00108      xtensa_format_get_slot
00109      xtensa_opcode_decode
00110      for each operand {
00111        xtensa_operand_get_field
00112        xtensa_operand_decode
00113      }
00114    }
00115 
00116    Encoding an instruction is roughly the same procedure in reverse:
00117 
00118    xtensa_format_encode
00119    for each slot {
00120      xtensa_opcode_encode
00121      for each operand {
00122        xtensa_operand_encode
00123        xtensa_operand_set_field
00124      }
00125      xtensa_format_set_slot
00126    }
00127    xtensa_insnbuf_to_chars
00128 */
00129 
00130 
00131 /* Error handling.  */
00132 
00133 /* Error codes.  The code for the most recent error condition can be
00134    retrieved with the "errno" function.  For any result other than
00135    xtensa_isa_ok, an error message containing additional information
00136    about the problem can be retrieved using the "error_msg" function.
00137    The error messages are stored in an internal buffer, which should
00138    not be freed and may be overwritten by subsequent operations.  */
00139 
00140 typedef enum xtensa_isa_status_enum
00141 {
00142   xtensa_isa_ok = 0,
00143   xtensa_isa_bad_format,
00144   xtensa_isa_bad_slot,
00145   xtensa_isa_bad_opcode,
00146   xtensa_isa_bad_operand,
00147   xtensa_isa_bad_field,
00148   xtensa_isa_bad_iclass,
00149   xtensa_isa_bad_regfile,
00150   xtensa_isa_bad_sysreg,
00151   xtensa_isa_bad_state,
00152   xtensa_isa_bad_interface,
00153   xtensa_isa_bad_funcUnit,
00154   xtensa_isa_wrong_slot,
00155   xtensa_isa_no_field,
00156   xtensa_isa_out_of_memory,
00157   xtensa_isa_buffer_overflow,
00158   xtensa_isa_internal_error,
00159   xtensa_isa_bad_value
00160 } xtensa_isa_status;
00161 
00162 extern xtensa_isa_status
00163 xtensa_isa_errno (xtensa_isa isa);
00164 
00165 extern char *
00166 xtensa_isa_error_msg (xtensa_isa isa);
00167 
00168 
00169 
00170 /* Instruction buffers.  */
00171 
00172 typedef uint32 xtensa_insnbuf_word;
00173 typedef xtensa_insnbuf_word *xtensa_insnbuf;
00174 
00175 
00176 /* Get the size in "insnbuf_words" of the xtensa_insnbuf array.  */
00177 
00178 extern int
00179 xtensa_insnbuf_size (xtensa_isa isa); 
00180 
00181 
00182 /* Allocate an xtensa_insnbuf of the right size.  */
00183 
00184 extern xtensa_insnbuf
00185 xtensa_insnbuf_alloc (xtensa_isa isa);
00186 
00187 
00188 /* Release an xtensa_insnbuf.  */
00189 
00190 extern void
00191 xtensa_insnbuf_free (xtensa_isa isa, xtensa_insnbuf buf);
00192 
00193 
00194 /* Conversion between raw memory (char arrays) and our internal
00195    instruction representation.  This is complicated by the Xtensa ISA's
00196    variable instruction lengths.  When converting to chars, the buffer
00197    must contain a valid instruction so we know how many bytes to copy;
00198    thus, the "to_chars" function returns the number of bytes copied or
00199    XTENSA_UNDEFINED on error.  The "from_chars" function first reads the
00200    minimal number of bytes required to decode the instruction length and
00201    then proceeds to copy the entire instruction into the buffer; if the
00202    memory does not contain a valid instruction, it copies the maximum
00203    number of bytes required for the longest Xtensa instruction.  The
00204    "num_chars" argument may be used to limit the number of bytes that
00205    can be read or written.  Otherwise, if "num_chars" is zero, the
00206    functions may read or write past the end of the code.  */
00207 
00208 extern int
00209 xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn,
00210                       unsigned char *cp, int num_chars);
00211 
00212 extern void
00213 xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn,
00214                         const unsigned char *cp, int num_chars);
00215 
00216 
00217 
00218 /* ISA information.  */
00219 
00220 /* Initialize the ISA information.  */
00221 
00222 extern xtensa_isa
00223 xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p);
00224 
00225 
00226 /* Deallocate an xtensa_isa structure.  */
00227 
00228 extern void
00229 xtensa_isa_free (xtensa_isa isa);
00230 
00231 
00232 /* Get the maximum instruction size in bytes.  */
00233 
00234 extern int
00235 xtensa_isa_maxlength (xtensa_isa isa); 
00236 
00237 
00238 /* Decode the length in bytes of an instruction in raw memory (not an
00239    insnbuf).  This function reads only the minimal number of bytes
00240    required to decode the instruction length.  Returns
00241    XTENSA_UNDEFINED on error.  */
00242 
00243 extern int
00244 xtensa_isa_length_from_chars (xtensa_isa isa, const unsigned char *cp);
00245 
00246 
00247 /* Get the number of stages in the processor's pipeline.  The pipeline
00248    stage values returned by other functions in this library will range
00249    from 0 to N-1, where N is the value returned by this function.
00250    Note that the stage numbers used here may not correspond to the
00251    actual processor hardware, e.g., the hardware may have additional
00252    stages before stage 0.  Returns XTENSA_UNDEFINED on error.  */
00253 
00254 extern int
00255 xtensa_isa_num_pipe_stages (xtensa_isa isa); 
00256 
00257 
00258 /* Get the number of various entities that are defined for this processor.  */
00259 
00260 extern int
00261 xtensa_isa_num_formats (xtensa_isa isa);
00262 
00263 extern int
00264 xtensa_isa_num_opcodes (xtensa_isa isa);
00265 
00266 extern int
00267 xtensa_isa_num_regfiles (xtensa_isa isa);
00268 
00269 extern int
00270 xtensa_isa_num_states (xtensa_isa isa);
00271 
00272 extern int
00273 xtensa_isa_num_sysregs (xtensa_isa isa);
00274 
00275 extern int
00276 xtensa_isa_num_interfaces (xtensa_isa isa);
00277 
00278 extern int
00279 xtensa_isa_num_funcUnits (xtensa_isa isa);
00280 
00281 
00282 
00283 /* Instruction formats.  */
00284 
00285 /* Get the name of a format.  Returns null on error.  */
00286 
00287 extern const char *
00288 xtensa_format_name (xtensa_isa isa, xtensa_format fmt);
00289 
00290 
00291 /* Given a format name, return the format number.  Returns
00292    XTENSA_UNDEFINED if the name is not a valid format.  */
00293 
00294 extern xtensa_format
00295 xtensa_format_lookup (xtensa_isa isa, const char *fmtname);
00296 
00297 
00298 /* Decode the instruction format from a binary instruction buffer.
00299    Returns XTENSA_UNDEFINED if the format is not recognized.  */
00300 
00301 extern xtensa_format
00302 xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn);
00303 
00304 
00305 /* Set the instruction format field(s) in a binary instruction buffer.
00306    All the other fields are set to zero.  Returns non-zero on error.  */
00307 
00308 extern int
00309 xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn);
00310 
00311 
00312 /* Find the length (in bytes) of an instruction.  Returns
00313    XTENSA_UNDEFINED on error.  */
00314 
00315 extern int
00316 xtensa_format_length (xtensa_isa isa, xtensa_format fmt);
00317 
00318 
00319 /* Get the number of slots in an instruction.  Returns XTENSA_UNDEFINED
00320    on error.  */
00321 
00322 extern int
00323 xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt);
00324 
00325 
00326 /* Get the opcode for a no-op in a particular slot.
00327    Returns XTENSA_UNDEFINED on error.  */
00328 
00329 extern xtensa_opcode
00330 xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot);
00331 
00332 
00333 /* Get the bits for a specified slot out of an insnbuf for the
00334    instruction as a whole and put them into an insnbuf for that one
00335    slot, and do the opposite to set a slot.  Return non-zero on error.  */
00336 
00337 extern int
00338 xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
00339                      const xtensa_insnbuf insn, xtensa_insnbuf slotbuf);
00340 
00341 extern int
00342 xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
00343                      xtensa_insnbuf insn, const xtensa_insnbuf slotbuf);
00344 
00345 
00346 
00347 /* Opcode information.  */
00348 
00349 /* Translate a mnemonic name to an opcode.  Returns XTENSA_UNDEFINED if
00350    the name is not a valid opcode mnemonic.  */
00351 
00352 extern xtensa_opcode
00353 xtensa_opcode_lookup (xtensa_isa isa, const char *opname);
00354 
00355 
00356 /* Decode the opcode for one instruction slot from a binary instruction
00357    buffer.  Returns the opcode or XTENSA_UNDEFINED if the opcode is
00358    illegal.  */
00359 
00360 extern xtensa_opcode
00361 xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
00362                     const xtensa_insnbuf slotbuf);
00363 
00364 
00365 /* Set the opcode field(s) for an instruction slot.  All other fields
00366    in the slot are set to zero.  Returns non-zero if the opcode cannot
00367    be encoded.  */
00368 
00369 extern int
00370 xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
00371                     xtensa_insnbuf slotbuf, xtensa_opcode opc);
00372 
00373 
00374 /* Get the mnemonic name for an opcode.  Returns null on error.  */
00375 
00376 extern const char *
00377 xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc);
00378 
00379 
00380 /* Check various properties of opcodes.  These functions return 0 if
00381    the condition is false, 1 if the condition is true, and
00382    XTENSA_UNDEFINED on error.  The instructions are classified as
00383    follows:
00384 
00385    branch: conditional branch; may fall through to next instruction (B*)
00386    jump: unconditional branch (J, JX, RET*, RF*)
00387    loop: zero-overhead loop (LOOP*)
00388    call: unconditional call; control returns to next instruction (CALL*)
00389 
00390    For the opcodes that affect control flow in some way, the branch
00391    target may be specified by an immediate operand or it may be an
00392    address stored in a register.  You can distinguish these by
00393    checking if the instruction has a PC-relative immediate
00394    operand.  */
00395 
00396 extern int
00397 xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc);
00398 
00399 extern int
00400 xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc);
00401 
00402 extern int
00403 xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc);
00404 
00405 extern int
00406 xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc);
00407 
00408 
00409 /* Find the number of ordinary operands, state operands, and interface
00410    operands for an instruction.  These return XTENSA_UNDEFINED on
00411    error.  */
00412 
00413 extern int
00414 xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc);
00415 
00416 extern int
00417 xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc);
00418 
00419 extern int
00420 xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc);
00421 
00422 
00423 /* Get functional unit usage requirements for an opcode.  Each "use"
00424    is identified by a <functional unit, pipeline stage> pair.  The
00425    "num_funcUnit_uses" function returns the number of these "uses" or
00426    XTENSA_UNDEFINED on error.  The "funcUnit_use" function returns
00427    a pointer to a "use" pair or null on error.  */
00428 
00429 typedef struct xtensa_funcUnit_use_struct
00430 {
00431   xtensa_funcUnit unit;
00432   int stage;
00433 } xtensa_funcUnit_use;
00434 
00435 extern int
00436 xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc);
00437 
00438 extern xtensa_funcUnit_use *
00439 xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u);
00440 
00441 
00442 
00443 /* Operand information.  */
00444 
00445 /* Get the name of an operand.  Returns null on error.  */
00446 
00447 extern const char *
00448 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
00449 
00450 
00451 /* Some operands are "invisible", i.e., not explicitly specified in
00452    assembly language.  When assembling an instruction, you need not set
00453    the values of invisible operands, since they are either hardwired or
00454    derived from other field values.  The values of invisible operands
00455    can be examined in the same way as other operands, but remember that
00456    an invisible operand may get its value from another visible one, so
00457    the entire instruction must be available before examining the
00458    invisible operand values.  This function returns 1 if an operand is
00459    visible, 0 if it is invisible, or XTENSA_UNDEFINED on error.  Note
00460    that whether an operand is visible is orthogonal to whether it is
00461    "implicit", i.e., whether it is encoded in a field in the
00462    instruction.  */
00463 
00464 extern int
00465 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
00466 
00467 
00468 /* Check if an operand is an input ('i'), output ('o'), or inout ('m')
00469    operand.  Note: The output operand of a conditional assignment
00470    (e.g., movnez) appears here as an inout ('m') even if it is declared
00471    in the TIE code as an output ('o'); this allows the compiler to
00472    properly handle register allocation for conditional assignments.
00473    Returns 0 on error.  */
00474 
00475 extern char
00476 xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
00477 
00478 
00479 /* Get and set the raw (encoded) value of the field for the specified
00480    operand.  The "set" function does not check if the value fits in the
00481    field; that is done by the "encode" function below.  Both of these
00482    functions return non-zero on error, e.g., if the field is not defined
00483    for the specified slot.  */
00484 
00485 extern int
00486 xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
00487                        xtensa_format fmt, int slot,
00488                        const xtensa_insnbuf slotbuf, uint32 *valp);
00489 
00490 extern int 
00491 xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
00492                        xtensa_format fmt, int slot,
00493                        xtensa_insnbuf slotbuf, uint32 val);
00494 
00495 
00496 /* Encode and decode operands.  The raw bits in the operand field may
00497    be encoded in a variety of different ways.  These functions hide
00498    the details of that encoding.  The result values are returned through
00499    the argument pointer.  The return value is non-zero on error.  */
00500 
00501 extern int
00502 xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
00503                      uint32 *valp);
00504 
00505 extern int
00506 xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
00507                      uint32 *valp);
00508 
00509 
00510 /* An operand may be either a register operand or an immediate of some
00511    sort (e.g., PC-relative or not).  The "is_register" function returns
00512    0 if the operand is an immediate, 1 if it is a register, and
00513    XTENSA_UNDEFINED on error.  The "regfile" function returns the
00514    regfile for a register operand, or XTENSA_UNDEFINED on error.  */
00515 
00516 extern int
00517 xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
00518 
00519 extern xtensa_regfile
00520 xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
00521 
00522 
00523 /* Register operands may span multiple consecutive registers, e.g., a
00524    64-bit data type may occupy two 32-bit registers.  Only the first
00525    register is encoded in the operand field.  This function specifies
00526    the number of consecutive registers occupied by this operand.  For
00527    non-register operands, the return value is undefined.  Returns
00528    XTENSA_UNDEFINED on error.  */
00529 
00530 extern int
00531 xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
00532                              
00533 
00534 /* Some register operands do not completely identify the register being
00535    accessed.  For example, the operand value may be added to an internal
00536    state value.  By definition, this implies that the corresponding
00537    regfile is not allocatable.  Unknown registers should generally be
00538    treated with worst-case assumptions.  The function returns 0 if the
00539    register value is unknown, 1 if known, and XTENSA_UNDEFINED on
00540    error.  */
00541 
00542 extern int
00543 xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd);
00544 
00545 
00546 /* Check if an immediate operand is PC-relative.  Returns 0 for register
00547    operands and non-PC-relative immediates, 1 for PC-relative
00548    immediates, and XTENSA_UNDEFINED on error.  */
00549  
00550 extern int
00551 xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd);
00552 
00553 
00554 /* For PC-relative offset operands, the interpretation of the offset may
00555    vary between opcodes, e.g., is it relative to the current PC or that
00556    of the next instruction?  The following functions are defined to
00557    perform PC-relative relocations and to undo them (as in the
00558    disassembler).  The "do_reloc" function takes the desired address
00559    value and the PC of the current instruction and sets the value to the
00560    corresponding PC-relative offset (which can then be encoded and
00561    stored into the operand field).  The "undo_reloc" function takes the
00562    unencoded offset value and the current PC and sets the value to the
00563    appropriate address.  The return values are non-zero on error.  Note
00564    that these functions do not replace the encode/decode functions; the
00565    operands must be encoded/decoded separately and the encode functions
00566    are responsible for detecting invalid operand values.  */
00567 
00568 extern int
00569 xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
00570                       uint32 *valp, uint32 pc);
00571 
00572 extern int
00573 xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
00574                         uint32 *valp, uint32 pc);
00575 
00576 
00577 
00578 /* State Operands.  */
00579 
00580 /* Get the state accessed by a state operand.  Returns XTENSA_UNDEFINED
00581    on error.  */
00582 
00583 extern xtensa_state
00584 xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp);
00585 
00586 
00587 /* Check if a state operand is an input ('i'), output ('o'), or inout
00588    ('m') operand.  Returns 0 on error.  */
00589 
00590 extern char
00591 xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp);
00592 
00593 
00594 
00595 /* Interface Operands.  */
00596 
00597 /* Get the external interface accessed by an interface operand.
00598    Returns XTENSA_UNDEFINED on error.  */
00599 
00600 extern xtensa_interface
00601 xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc,
00602                                int ifOp);
00603 
00604 
00605 
00606 /* Register Files.  */
00607 
00608 /* Regfiles include both "real" regfiles and "views", where a view
00609    allows a group of adjacent registers in a real "parent" regfile to be
00610    viewed as a single register.  A regfile view has all the same
00611    properties as its parent except for its (long) name, bit width, number
00612    of entries, and default ctype.  You can use the parent function to
00613    distinguish these two classes.  */
00614 
00615 /* Look up a regfile by either its name or its abbreviated "short name".
00616    Returns XTENSA_UNDEFINED on error.  The "lookup_shortname" function
00617    ignores "view" regfiles since they always have the same shortname as
00618    their parents.  */
00619 
00620 extern xtensa_regfile
00621 xtensa_regfile_lookup (xtensa_isa isa, const char *name);
00622 
00623 extern xtensa_regfile
00624 xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname);
00625 
00626 
00627 /* Get the name or abbreviated "short name" of a regfile.
00628    Returns null on error.  */
00629 
00630 extern const char *
00631 xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf);
00632 
00633 extern const char *
00634 xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf);
00635 
00636 
00637 /* Get the parent regfile of a "view" regfile.  If the regfile is not a
00638    view, the result is the same as the input parameter.  Returns
00639    XTENSA_UNDEFINED on error.  */
00640 
00641 extern xtensa_regfile
00642 xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf);
00643 
00644 
00645 /* Get the bit width of a regfile or regfile view.
00646    Returns XTENSA_UNDEFINED on error.  */
00647 
00648 extern int
00649 xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf);
00650 
00651 
00652 /* Get the number of regfile entries.  Returns XTENSA_UNDEFINED on
00653    error.  */
00654 
00655 extern int
00656 xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf);
00657 
00658 
00659 
00660 /* Processor States.  */
00661 
00662 /* Look up a state by name.  Returns XTENSA_UNDEFINED on error.  */
00663 
00664 extern xtensa_state
00665 xtensa_state_lookup (xtensa_isa isa, const char *name);
00666 
00667 
00668 /* Get the name for a processor state.  Returns null on error.  */
00669 
00670 extern const char *
00671 xtensa_state_name (xtensa_isa isa, xtensa_state st);
00672 
00673 
00674 /* Get the bit width for a processor state.
00675    Returns XTENSA_UNDEFINED on error.  */
00676 
00677 extern int
00678 xtensa_state_num_bits (xtensa_isa isa, xtensa_state st);
00679 
00680 
00681 /* Check if a state is exported from the processor core.  Returns 0 if
00682    the condition is false, 1 if the condition is true, and
00683    XTENSA_UNDEFINED on error.  */
00684 
00685 extern int
00686 xtensa_state_is_exported (xtensa_isa isa, xtensa_state st);
00687 
00688 
00689 
00690 /* Sysregs ("special registers" and "user registers").  */
00691 
00692 /* Look up a register by its number and whether it is a "user register"
00693    or a "special register".  Returns XTENSA_UNDEFINED if the sysreg does
00694    not exist.  */
00695 
00696 extern xtensa_sysreg
00697 xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user);
00698 
00699 
00700 /* Check if there exists a sysreg with a given name.
00701    If not, this function returns XTENSA_UNDEFINED.  */
00702 
00703 extern xtensa_sysreg
00704 xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name);
00705 
00706 
00707 /* Get the name of a sysreg.  Returns null on error.  */
00708 
00709 extern const char *
00710 xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg);
00711 
00712 
00713 /* Get the register number.  Returns XTENSA_UNDEFINED on error.  */
00714 
00715 extern int
00716 xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg);
00717 
00718 
00719 /* Check if a sysreg is a "special register" or a "user register".
00720    Returns 0 for special registers, 1 for user registers and
00721    XTENSA_UNDEFINED on error.  */
00722 
00723 extern int
00724 xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg);
00725 
00726 
00727 
00728 /* Interfaces.  */
00729 
00730 /* Find an interface by name.  The return value is XTENSA_UNDEFINED if
00731    the specified interface is not found.  */
00732 
00733 extern xtensa_interface
00734 xtensa_interface_lookup (xtensa_isa isa, const char *ifname);
00735 
00736 
00737 /* Get the name of an interface.  Returns null on error.  */
00738 
00739 extern const char *
00740 xtensa_interface_name (xtensa_isa isa, xtensa_interface intf);
00741 
00742 
00743 /* Get the bit width for an interface.
00744    Returns XTENSA_UNDEFINED on error.  */
00745 
00746 extern int
00747 xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf);
00748 
00749 
00750 /* Check if an interface is an input ('i') or output ('o') with respect
00751    to the Xtensa processor core.  Returns 0 on error.  */
00752 
00753 extern char
00754 xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf);
00755 
00756 
00757 /* Check if accessing an interface has potential side effects.
00758    Currently "data" interfaces have side effects and "control"
00759    interfaces do not.  Returns 1 if there are side effects, 0 if not,
00760    and XTENSA_UNDEFINED on error.  */
00761 
00762 extern int
00763 xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf);
00764 
00765 
00766 /* Some interfaces may be related such that accessing one interface
00767    has side effects on a set of related interfaces.  The interfaces
00768    are partitioned into equivalence classes of related interfaces, and
00769    each class is assigned a unique identifier number.  This function
00770    returns the class identifier for an interface, or XTENSA_UNDEFINED
00771    on error.  These identifiers can be compared to determine if two
00772    interfaces are related; the specific values of the identifiers have
00773    no particular meaning otherwise.  */
00774 
00775 extern int
00776 xtensa_interface_class_id (xtensa_isa isa, xtensa_interface intf);
00777 
00778 
00779 
00780 /* Functional Units.  */
00781 
00782 /* Find a functional unit by name.  The return value is XTENSA_UNDEFINED if
00783    the specified unit is not found.  */
00784 
00785 extern xtensa_funcUnit
00786 xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname);
00787 
00788 
00789 /* Get the name of a functional unit.  Returns null on error.  */
00790 
00791 extern const char *
00792 xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun);
00793 
00794 
00795 /* Functional units may be replicated.  See how many instances of a
00796    particular function unit exist.  Returns XTENSA_UNDEFINED on error.  */
00797 
00798 extern int
00799 xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun);
00800 
00801 
00802 #ifdef __cplusplus
00803 }
00804 #endif
00805 #endif /* XTENSA_LIBISA_H */