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cell-binutils  2.17cvs20070401
xstormy16-opc.c
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00001 /* Instruction opcode table for xstormy16.
00002 
00003 THIS FILE IS MACHINE GENERATED WITH CGEN.
00004 
00005 Copyright 1996-2005 Free Software Foundation, Inc.
00006 
00007 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
00008 
00009 This program is free software; you can redistribute it and/or modify
00010 it under the terms of the GNU General Public License as published by
00011 the Free Software Foundation; either version 2, or (at your option)
00012 any later version.
00013 
00014 This program is distributed in the hope that it will be useful,
00015 but WITHOUT ANY WARRANTY; without even the implied warranty of
00016 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00017 GNU General Public License for more details.
00018 
00019 You should have received a copy of the GNU General Public License along
00020 with this program; if not, write to the Free Software Foundation, Inc.,
00021 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
00022 
00023 */
00024 
00025 #include "sysdep.h"
00026 #include "ansidecl.h"
00027 #include "bfd.h"
00028 #include "symcat.h"
00029 #include "xstormy16-desc.h"
00030 #include "xstormy16-opc.h"
00031 #include "libiberty.h"
00032 
00033 /* The hash functions are recorded here to help keep assembler code out of
00034    the disassembler and vice versa.  */
00035 
00036 static int asm_hash_insn_p        (const CGEN_INSN *);
00037 static unsigned int asm_hash_insn (const char *);
00038 static int dis_hash_insn_p        (const CGEN_INSN *);
00039 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
00040 
00041 /* Instruction formats.  */
00042 
00043 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00044 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
00045 #else
00046 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_f]
00047 #endif
00048 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
00049   0, 0, 0x0, { { 0 } }
00050 };
00051 
00052 static const CGEN_IFMT ifmt_movlmemimm ATTRIBUTE_UNUSED = {
00053   32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_LMEM8) }, { F (F_IMM16) }, { 0 } }
00054 };
00055 
00056 static const CGEN_IFMT ifmt_movhmemimm ATTRIBUTE_UNUSED = {
00057   32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_HMEM8) }, { F (F_IMM16) }, { 0 } }
00058 };
00059 
00060 static const CGEN_IFMT ifmt_movlgrmem ATTRIBUTE_UNUSED = {
00061   16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } }
00062 };
00063 
00064 static const CGEN_IFMT ifmt_movhgrmem ATTRIBUTE_UNUSED = {
00065   16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } }
00066 };
00067 
00068 static const CGEN_IFMT ifmt_movgrgri ATTRIBUTE_UNUSED = {
00069   16, 16, 0xfe08, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { 0 } }
00070 };
00071 
00072 static const CGEN_IFMT ifmt_movgrgrii ATTRIBUTE_UNUSED = {
00073   32, 32, 0xfe08f000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5) }, { F (F_IMM12) }, { 0 } }
00074 };
00075 
00076 static const CGEN_IFMT ifmt_movgrgr ATTRIBUTE_UNUSED = {
00077   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { 0 } }
00078 };
00079 
00080 static const CGEN_IFMT ifmt_movwimm8 ATTRIBUTE_UNUSED = {
00081   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } }
00082 };
00083 
00084 static const CGEN_IFMT ifmt_movwgrimm8 ATTRIBUTE_UNUSED = {
00085   16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } }
00086 };
00087 
00088 static const CGEN_IFMT ifmt_movwgrimm16 ATTRIBUTE_UNUSED = {
00089   32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } }
00090 };
00091 
00092 static const CGEN_IFMT ifmt_movlowgr ATTRIBUTE_UNUSED = {
00093   16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { 0 } }
00094 };
00095 
00096 static const CGEN_IFMT ifmt_movfgrgrii ATTRIBUTE_UNUSED = {
00097   32, 32, 0xfe088000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5A) }, { F (F_RB) }, { F (F_IMM12) }, { 0 } }
00098 };
00099 
00100 static const CGEN_IFMT ifmt_addgrimm4 ATTRIBUTE_UNUSED = {
00101   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { 0 } }
00102 };
00103 
00104 static const CGEN_IFMT ifmt_incgrimm2 ATTRIBUTE_UNUSED = {
00105   16, 16, 0xffc0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
00106 };
00107 
00108 static const CGEN_IFMT ifmt_set1lmemimm ATTRIBUTE_UNUSED = {
00109   16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } }
00110 };
00111 
00112 static const CGEN_IFMT ifmt_set1hmemimm ATTRIBUTE_UNUSED = {
00113   16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } }
00114 };
00115 
00116 static const CGEN_IFMT ifmt_bccgrgr ATTRIBUTE_UNUSED = {
00117   32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00118 };
00119 
00120 static const CGEN_IFMT ifmt_bccgrimm8 ATTRIBUTE_UNUSED = {
00121   32, 32, 0xf1000000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00122 };
00123 
00124 static const CGEN_IFMT ifmt_bccimm16 ATTRIBUTE_UNUSED = {
00125   32, 32, 0xf0000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_4) }, { F (F_IMM16) }, { 0 } }
00126 };
00127 
00128 static const CGEN_IFMT ifmt_bngrimm4 ATTRIBUTE_UNUSED = {
00129   32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00130 };
00131 
00132 static const CGEN_IFMT ifmt_bngrgr ATTRIBUTE_UNUSED = {
00133   32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00134 };
00135 
00136 static const CGEN_IFMT ifmt_bnlmemimm ATTRIBUTE_UNUSED = {
00137   32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_LMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } }
00138 };
00139 
00140 static const CGEN_IFMT ifmt_bnhmemimm ATTRIBUTE_UNUSED = {
00141   32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_HMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } }
00142 };
00143 
00144 static const CGEN_IFMT ifmt_bcc ATTRIBUTE_UNUSED = {
00145   16, 16, 0xf000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_2) }, { 0 } }
00146 };
00147 
00148 static const CGEN_IFMT ifmt_br ATTRIBUTE_UNUSED = {
00149   16, 16, 0xf001, { { F (F_OP1) }, { F (F_REL12A) }, { F (F_OP4B) }, { 0 } }
00150 };
00151 
00152 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
00153   16, 16, 0xffe0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3B) }, { F (F_RBJ) }, { F (F_RD) }, { 0 } }
00154 };
00155 
00156 static const CGEN_IFMT ifmt_jmpf ATTRIBUTE_UNUSED = {
00157   32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_ABS24) }, { 0 } }
00158 };
00159 
00160 static const CGEN_IFMT ifmt_iret ATTRIBUTE_UNUSED = {
00161   16, 16, 0xffff, { { F (F_OP) }, { 0 } }
00162 };
00163 
00164 #undef F
00165 
00166 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00167 #define A(a) (1 << CGEN_INSN_##a)
00168 #else
00169 #define A(a) (1 << CGEN_INSN_a)
00170 #endif
00171 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00172 #define OPERAND(op) XSTORMY16_OPERAND_##op
00173 #else
00174 #define OPERAND(op) XSTORMY16_OPERAND_op
00175 #endif
00176 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
00177 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
00178 
00179 /* The instruction table.  */
00180 
00181 static const CGEN_OPCODE xstormy16_cgen_insn_opcode_table[MAX_INSNS] =
00182 {
00183   /* Special null first entry.
00184      A `num' value of zero is thus invalid.
00185      Also, the special `invalid' insn resides here.  */
00186   { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
00187 /* mov$ws2 $lmem8,#$imm16 */
00188   {
00189     { 0, 0, 0, 0 },
00190     { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } },
00191     & ifmt_movlmemimm, { 0x78000000 }
00192   },
00193 /* mov$ws2 $hmem8,#$imm16 */
00194   {
00195     { 0, 0, 0, 0 },
00196     { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', '#', OP (IMM16), 0 } },
00197     & ifmt_movhmemimm, { 0x7a000000 }
00198   },
00199 /* mov$ws2 $Rm,$lmem8 */
00200   {
00201     { 0, 0, 0, 0 },
00202     { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (LMEM8), 0 } },
00203     & ifmt_movlgrmem, { 0x8000 }
00204   },
00205 /* mov$ws2 $Rm,$hmem8 */
00206   {
00207     { 0, 0, 0, 0 },
00208     { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (HMEM8), 0 } },
00209     & ifmt_movhgrmem, { 0xa000 }
00210   },
00211 /* mov$ws2 $lmem8,$Rm */
00212   {
00213     { 0, 0, 0, 0 },
00214     { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', OP (RM), 0 } },
00215     & ifmt_movlgrmem, { 0x9000 }
00216   },
00217 /* mov$ws2 $hmem8,$Rm */
00218   {
00219     { 0, 0, 0, 0 },
00220     { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', OP (RM), 0 } },
00221     & ifmt_movhgrmem, { 0xb000 }
00222   },
00223 /* mov$ws2 $Rdm,($Rs) */
00224   {
00225     { 0, 0, 0, 0 },
00226     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } },
00227     & ifmt_movgrgri, { 0x7000 }
00228   },
00229 /* mov$ws2 $Rdm,($Rs++) */
00230   {
00231     { 0, 0, 0, 0 },
00232     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } },
00233     & ifmt_movgrgri, { 0x6000 }
00234   },
00235 /* mov$ws2 $Rdm,(--$Rs) */
00236   {
00237     { 0, 0, 0, 0 },
00238     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } },
00239     & ifmt_movgrgri, { 0x6800 }
00240   },
00241 /* mov$ws2 ($Rs),$Rdm */
00242   {
00243     { 0, 0, 0, 0 },
00244     { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } },
00245     & ifmt_movgrgri, { 0x7200 }
00246   },
00247 /* mov$ws2 ($Rs++),$Rdm */
00248   {
00249     { 0, 0, 0, 0 },
00250     { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } },
00251     & ifmt_movgrgri, { 0x6200 }
00252   },
00253 /* mov$ws2 (--$Rs),$Rdm */
00254   {
00255     { 0, 0, 0, 0 },
00256     { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } },
00257     & ifmt_movgrgri, { 0x6a00 }
00258   },
00259 /* mov$ws2 $Rdm,($Rs,$imm12) */
00260   {
00261     { 0, 0, 0, 0 },
00262     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ',', OP (IMM12), ')', 0 } },
00263     & ifmt_movgrgrii, { 0x70080000 }
00264   },
00265 /* mov$ws2 $Rdm,($Rs++,$imm12) */
00266   {
00267     { 0, 0, 0, 0 },
00268     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
00269     & ifmt_movgrgrii, { 0x60080000 }
00270   },
00271 /* mov$ws2 $Rdm,(--$Rs,$imm12) */
00272   {
00273     { 0, 0, 0, 0 },
00274     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
00275     & ifmt_movgrgrii, { 0x68080000 }
00276   },
00277 /* mov$ws2 ($Rs,$imm12),$Rdm */
00278   {
00279     { 0, 0, 0, 0 },
00280     { { MNEM, OP (WS2), ' ', '(', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00281     & ifmt_movgrgrii, { 0x72080000 }
00282   },
00283 /* mov$ws2 ($Rs++,$imm12),$Rdm */
00284   {
00285     { 0, 0, 0, 0 },
00286     { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00287     & ifmt_movgrgrii, { 0x62080000 }
00288   },
00289 /* mov$ws2 (--$Rs,$imm12),$Rdm */
00290   {
00291     { 0, 0, 0, 0 },
00292     { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00293     & ifmt_movgrgrii, { 0x6a080000 }
00294   },
00295 /* mov $Rd,$Rs */
00296   {
00297     { 0, 0, 0, 0 },
00298     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00299     & ifmt_movgrgr, { 0x4600 }
00300   },
00301 /* mov.w Rx,#$imm8 */
00302   {
00303     { 0, 0, 0, 0 },
00304     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00305     & ifmt_movwimm8, { 0x4700 }
00306   },
00307 /* mov.w $Rm,#$imm8small */
00308   {
00309     { 0, 0, 0, 0 },
00310     { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } },
00311     & ifmt_movwgrimm8, { 0x2100 }
00312   },
00313 /* mov.w $Rd,#$imm16 */
00314   {
00315     { 0, 0, 0, 0 },
00316     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00317     & ifmt_movwgrimm16, { 0x31300000 }
00318   },
00319 /* mov.b $Rd,RxL */
00320   {
00321     { 0, 0, 0, 0 },
00322     { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'L', 0 } },
00323     & ifmt_movlowgr, { 0x30c0 }
00324   },
00325 /* mov.b $Rd,RxH */
00326   {
00327     { 0, 0, 0, 0 },
00328     { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'H', 0 } },
00329     & ifmt_movlowgr, { 0x30d0 }
00330   },
00331 /* movf$ws2 $Rdm,($Rs) */
00332   {
00333     { 0, 0, 0, 0 },
00334     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } },
00335     & ifmt_movgrgri, { 0x7400 }
00336   },
00337 /* movf$ws2 $Rdm,($Rs++) */
00338   {
00339     { 0, 0, 0, 0 },
00340     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } },
00341     & ifmt_movgrgri, { 0x6400 }
00342   },
00343 /* movf$ws2 $Rdm,(--$Rs) */
00344   {
00345     { 0, 0, 0, 0 },
00346     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } },
00347     & ifmt_movgrgri, { 0x6c00 }
00348   },
00349 /* movf$ws2 ($Rs),$Rdm */
00350   {
00351     { 0, 0, 0, 0 },
00352     { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } },
00353     & ifmt_movgrgri, { 0x7600 }
00354   },
00355 /* movf$ws2 ($Rs++),$Rdm */
00356   {
00357     { 0, 0, 0, 0 },
00358     { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } },
00359     & ifmt_movgrgri, { 0x6600 }
00360   },
00361 /* movf$ws2 (--$Rs),$Rdm */
00362   {
00363     { 0, 0, 0, 0 },
00364     { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } },
00365     & ifmt_movgrgri, { 0x6e00 }
00366   },
00367 /* movf$ws2 $Rdm,($Rb,$Rs,$imm12) */
00368   {
00369     { 0, 0, 0, 0 },
00370     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', 0 } },
00371     & ifmt_movfgrgrii, { 0x74080000 }
00372   },
00373 /* movf$ws2 $Rdm,($Rb,$Rs++,$imm12) */
00374   {
00375     { 0, 0, 0, 0 },
00376     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
00377     & ifmt_movfgrgrii, { 0x64080000 }
00378   },
00379 /* movf$ws2 $Rdm,($Rb,--$Rs,$imm12) */
00380   {
00381     { 0, 0, 0, 0 },
00382     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
00383     & ifmt_movfgrgrii, { 0x6c080000 }
00384   },
00385 /* movf$ws2 ($Rb,$Rs,$imm12),$Rdm */
00386   {
00387     { 0, 0, 0, 0 },
00388     { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00389     & ifmt_movfgrgrii, { 0x76080000 }
00390   },
00391 /* movf$ws2 ($Rb,$Rs++,$imm12),$Rdm */
00392   {
00393     { 0, 0, 0, 0 },
00394     { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00395     & ifmt_movfgrgrii, { 0x66080000 }
00396   },
00397 /* movf$ws2 ($Rb,--$Rs,$imm12),$Rdm */
00398   {
00399     { 0, 0, 0, 0 },
00400     { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00401     & ifmt_movfgrgrii, { 0x6e080000 }
00402   },
00403 /* mask $Rd,$Rs */
00404   {
00405     { 0, 0, 0, 0 },
00406     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00407     & ifmt_movgrgr, { 0x3300 }
00408   },
00409 /* mask $Rd,#$imm16 */
00410   {
00411     { 0, 0, 0, 0 },
00412     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00413     & ifmt_movwgrimm16, { 0x30e00000 }
00414   },
00415 /* push $Rd */
00416   {
00417     { 0, 0, 0, 0 },
00418     { { MNEM, ' ', OP (RD), 0 } },
00419     & ifmt_movlowgr, { 0x80 }
00420   },
00421 /* pop $Rd */
00422   {
00423     { 0, 0, 0, 0 },
00424     { { MNEM, ' ', OP (RD), 0 } },
00425     & ifmt_movlowgr, { 0x90 }
00426   },
00427 /* swpn $Rd */
00428   {
00429     { 0, 0, 0, 0 },
00430     { { MNEM, ' ', OP (RD), 0 } },
00431     & ifmt_movlowgr, { 0x3090 }
00432   },
00433 /* swpb $Rd */
00434   {
00435     { 0, 0, 0, 0 },
00436     { { MNEM, ' ', OP (RD), 0 } },
00437     & ifmt_movlowgr, { 0x3080 }
00438   },
00439 /* swpw $Rd,$Rs */
00440   {
00441     { 0, 0, 0, 0 },
00442     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00443     & ifmt_movgrgr, { 0x3200 }
00444   },
00445 /* and $Rd,$Rs */
00446   {
00447     { 0, 0, 0, 0 },
00448     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00449     & ifmt_movgrgr, { 0x4000 }
00450   },
00451 /* and Rx,#$imm8 */
00452   {
00453     { 0, 0, 0, 0 },
00454     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00455     & ifmt_movwimm8, { 0x4100 }
00456   },
00457 /* and $Rd,#$imm16 */
00458   {
00459     { 0, 0, 0, 0 },
00460     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00461     & ifmt_movwgrimm16, { 0x31000000 }
00462   },
00463 /* or $Rd,$Rs */
00464   {
00465     { 0, 0, 0, 0 },
00466     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00467     & ifmt_movgrgr, { 0x4200 }
00468   },
00469 /* or Rx,#$imm8 */
00470   {
00471     { 0, 0, 0, 0 },
00472     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00473     & ifmt_movwimm8, { 0x4300 }
00474   },
00475 /* or $Rd,#$imm16 */
00476   {
00477     { 0, 0, 0, 0 },
00478     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00479     & ifmt_movwgrimm16, { 0x31100000 }
00480   },
00481 /* xor $Rd,$Rs */
00482   {
00483     { 0, 0, 0, 0 },
00484     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00485     & ifmt_movgrgr, { 0x4400 }
00486   },
00487 /* xor Rx,#$imm8 */
00488   {
00489     { 0, 0, 0, 0 },
00490     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00491     & ifmt_movwimm8, { 0x4500 }
00492   },
00493 /* xor $Rd,#$imm16 */
00494   {
00495     { 0, 0, 0, 0 },
00496     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00497     & ifmt_movwgrimm16, { 0x31200000 }
00498   },
00499 /* not $Rd */
00500   {
00501     { 0, 0, 0, 0 },
00502     { { MNEM, ' ', OP (RD), 0 } },
00503     & ifmt_movlowgr, { 0x30b0 }
00504   },
00505 /* add $Rd,$Rs */
00506   {
00507     { 0, 0, 0, 0 },
00508     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00509     & ifmt_movgrgr, { 0x4900 }
00510   },
00511 /* add $Rd,#$imm4 */
00512   {
00513     { 0, 0, 0, 0 },
00514     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00515     & ifmt_addgrimm4, { 0x5100 }
00516   },
00517 /* add Rx,#$imm8 */
00518   {
00519     { 0, 0, 0, 0 },
00520     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00521     & ifmt_movwimm8, { 0x5900 }
00522   },
00523 /* add $Rd,#$imm16 */
00524   {
00525     { 0, 0, 0, 0 },
00526     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00527     & ifmt_movwgrimm16, { 0x31400000 }
00528   },
00529 /* adc $Rd,$Rs */
00530   {
00531     { 0, 0, 0, 0 },
00532     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00533     & ifmt_movgrgr, { 0x4b00 }
00534   },
00535 /* adc $Rd,#$imm4 */
00536   {
00537     { 0, 0, 0, 0 },
00538     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00539     & ifmt_addgrimm4, { 0x5300 }
00540   },
00541 /* adc Rx,#$imm8 */
00542   {
00543     { 0, 0, 0, 0 },
00544     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00545     & ifmt_movwimm8, { 0x5b00 }
00546   },
00547 /* adc $Rd,#$imm16 */
00548   {
00549     { 0, 0, 0, 0 },
00550     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00551     & ifmt_movwgrimm16, { 0x31500000 }
00552   },
00553 /* sub $Rd,$Rs */
00554   {
00555     { 0, 0, 0, 0 },
00556     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00557     & ifmt_movgrgr, { 0x4d00 }
00558   },
00559 /* sub $Rd,#$imm4 */
00560   {
00561     { 0, 0, 0, 0 },
00562     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00563     & ifmt_addgrimm4, { 0x5500 }
00564   },
00565 /* sub Rx,#$imm8 */
00566   {
00567     { 0, 0, 0, 0 },
00568     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00569     & ifmt_movwimm8, { 0x5d00 }
00570   },
00571 /* sub $Rd,#$imm16 */
00572   {
00573     { 0, 0, 0, 0 },
00574     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00575     & ifmt_movwgrimm16, { 0x31600000 }
00576   },
00577 /* sbc $Rd,$Rs */
00578   {
00579     { 0, 0, 0, 0 },
00580     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00581     & ifmt_movgrgr, { 0x4f00 }
00582   },
00583 /* sbc $Rd,#$imm4 */
00584   {
00585     { 0, 0, 0, 0 },
00586     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00587     & ifmt_addgrimm4, { 0x5700 }
00588   },
00589 /* sbc Rx,#$imm8 */
00590   {
00591     { 0, 0, 0, 0 },
00592     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00593     & ifmt_movwimm8, { 0x5f00 }
00594   },
00595 /* sbc $Rd,#$imm16 */
00596   {
00597     { 0, 0, 0, 0 },
00598     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00599     & ifmt_movwgrimm16, { 0x31700000 }
00600   },
00601 /* inc $Rd,#$imm2 */
00602   {
00603     { 0, 0, 0, 0 },
00604     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
00605     & ifmt_incgrimm2, { 0x3000 }
00606   },
00607 /* dec $Rd,#$imm2 */
00608   {
00609     { 0, 0, 0, 0 },
00610     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
00611     & ifmt_incgrimm2, { 0x3040 }
00612   },
00613 /* rrc $Rd,$Rs */
00614   {
00615     { 0, 0, 0, 0 },
00616     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00617     & ifmt_movgrgr, { 0x3800 }
00618   },
00619 /* rrc $Rd,#$imm4 */
00620   {
00621     { 0, 0, 0, 0 },
00622     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00623     & ifmt_addgrimm4, { 0x3900 }
00624   },
00625 /* rlc $Rd,$Rs */
00626   {
00627     { 0, 0, 0, 0 },
00628     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00629     & ifmt_movgrgr, { 0x3a00 }
00630   },
00631 /* rlc $Rd,#$imm4 */
00632   {
00633     { 0, 0, 0, 0 },
00634     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00635     & ifmt_addgrimm4, { 0x3b00 }
00636   },
00637 /* shr $Rd,$Rs */
00638   {
00639     { 0, 0, 0, 0 },
00640     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00641     & ifmt_movgrgr, { 0x3c00 }
00642   },
00643 /* shr $Rd,#$imm4 */
00644   {
00645     { 0, 0, 0, 0 },
00646     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00647     & ifmt_addgrimm4, { 0x3d00 }
00648   },
00649 /* shl $Rd,$Rs */
00650   {
00651     { 0, 0, 0, 0 },
00652     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00653     & ifmt_movgrgr, { 0x3e00 }
00654   },
00655 /* shl $Rd,#$imm4 */
00656   {
00657     { 0, 0, 0, 0 },
00658     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00659     & ifmt_addgrimm4, { 0x3f00 }
00660   },
00661 /* asr $Rd,$Rs */
00662   {
00663     { 0, 0, 0, 0 },
00664     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00665     & ifmt_movgrgr, { 0x3600 }
00666   },
00667 /* asr $Rd,#$imm4 */
00668   {
00669     { 0, 0, 0, 0 },
00670     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00671     & ifmt_addgrimm4, { 0x3700 }
00672   },
00673 /* set1 $Rd,#$imm4 */
00674   {
00675     { 0, 0, 0, 0 },
00676     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00677     & ifmt_addgrimm4, { 0x900 }
00678   },
00679 /* set1 $Rd,$Rs */
00680   {
00681     { 0, 0, 0, 0 },
00682     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00683     & ifmt_movgrgr, { 0xb00 }
00684   },
00685 /* set1 $lmem8,#$imm3 */
00686   {
00687     { 0, 0, 0, 0 },
00688     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } },
00689     & ifmt_set1lmemimm, { 0xe100 }
00690   },
00691 /* set1 $hmem8,#$imm3 */
00692   {
00693     { 0, 0, 0, 0 },
00694     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } },
00695     & ifmt_set1hmemimm, { 0xf100 }
00696   },
00697 /* clr1 $Rd,#$imm4 */
00698   {
00699     { 0, 0, 0, 0 },
00700     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00701     & ifmt_addgrimm4, { 0x800 }
00702   },
00703 /* clr1 $Rd,$Rs */
00704   {
00705     { 0, 0, 0, 0 },
00706     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00707     & ifmt_movgrgr, { 0xa00 }
00708   },
00709 /* clr1 $lmem8,#$imm3 */
00710   {
00711     { 0, 0, 0, 0 },
00712     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } },
00713     & ifmt_set1lmemimm, { 0xe000 }
00714   },
00715 /* clr1 $hmem8,#$imm3 */
00716   {
00717     { 0, 0, 0, 0 },
00718     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } },
00719     & ifmt_set1hmemimm, { 0xf000 }
00720   },
00721 /* cbw $Rd */
00722   {
00723     { 0, 0, 0, 0 },
00724     { { MNEM, ' ', OP (RD), 0 } },
00725     & ifmt_movlowgr, { 0x30a0 }
00726   },
00727 /* rev $Rd */
00728   {
00729     { 0, 0, 0, 0 },
00730     { { MNEM, ' ', OP (RD), 0 } },
00731     & ifmt_movlowgr, { 0x30f0 }
00732   },
00733 /* b$bcond5 $Rd,$Rs,$rel12 */
00734   {
00735     { 0, 0, 0, 0 },
00736     { { MNEM, OP (BCOND5), ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
00737     & ifmt_bccgrgr, { 0xd000000 }
00738   },
00739 /* b$bcond5 $Rm,#$imm8,$rel12 */
00740   {
00741     { 0, 0, 0, 0 },
00742     { { MNEM, OP (BCOND5), ' ', OP (RM), ',', '#', OP (IMM8), ',', OP (REL12), 0 } },
00743     & ifmt_bccgrimm8, { 0x20000000 }
00744   },
00745 /* b$bcond2 Rx,#$imm16,${rel8-4} */
00746   {
00747     { 0, 0, 0, 0 },
00748     { { MNEM, OP (BCOND2), ' ', 'R', 'x', ',', '#', OP (IMM16), ',', OP (REL8_4), 0 } },
00749     & ifmt_bccimm16, { 0xc0000000 }
00750   },
00751 /* bn $Rd,#$imm4,$rel12 */
00752   {
00753     { 0, 0, 0, 0 },
00754     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } },
00755     & ifmt_bngrimm4, { 0x4000000 }
00756   },
00757 /* bn $Rd,$Rs,$rel12 */
00758   {
00759     { 0, 0, 0, 0 },
00760     { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
00761     & ifmt_bngrgr, { 0x6000000 }
00762   },
00763 /* bn $lmem8,#$imm3b,$rel12 */
00764   {
00765     { 0, 0, 0, 0 },
00766     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00767     & ifmt_bnlmemimm, { 0x7c000000 }
00768   },
00769 /* bn $hmem8,#$imm3b,$rel12 */
00770   {
00771     { 0, 0, 0, 0 },
00772     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00773     & ifmt_bnhmemimm, { 0x7e000000 }
00774   },
00775 /* bp $Rd,#$imm4,$rel12 */
00776   {
00777     { 0, 0, 0, 0 },
00778     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } },
00779     & ifmt_bngrimm4, { 0x5000000 }
00780   },
00781 /* bp $Rd,$Rs,$rel12 */
00782   {
00783     { 0, 0, 0, 0 },
00784     { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
00785     & ifmt_bngrgr, { 0x7000000 }
00786   },
00787 /* bp $lmem8,#$imm3b,$rel12 */
00788   {
00789     { 0, 0, 0, 0 },
00790     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00791     & ifmt_bnlmemimm, { 0x7d000000 }
00792   },
00793 /* bp $hmem8,#$imm3b,$rel12 */
00794   {
00795     { 0, 0, 0, 0 },
00796     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00797     & ifmt_bnhmemimm, { 0x7f000000 }
00798   },
00799 /* b$bcond2 ${rel8-2} */
00800   {
00801     { 0, 0, 0, 0 },
00802     { { MNEM, OP (BCOND2), ' ', OP (REL8_2), 0 } },
00803     & ifmt_bcc, { 0xd000 }
00804   },
00805 /* br $Rd */
00806   {
00807     { 0, 0, 0, 0 },
00808     { { MNEM, ' ', OP (RD), 0 } },
00809     & ifmt_movlowgr, { 0x20 }
00810   },
00811 /* br $rel12a */
00812   {
00813     { 0, 0, 0, 0 },
00814     { { MNEM, ' ', OP (REL12A), 0 } },
00815     & ifmt_br, { 0x1000 }
00816   },
00817 /* jmp $Rbj,$Rd */
00818   {
00819     { 0, 0, 0, 0 },
00820     { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
00821     & ifmt_jmp, { 0x40 }
00822   },
00823 /* jmpf $abs24 */
00824   {
00825     { 0, 0, 0, 0 },
00826     { { MNEM, ' ', OP (ABS24), 0 } },
00827     & ifmt_jmpf, { 0x2000000 }
00828   },
00829 /* callr $Rd */
00830   {
00831     { 0, 0, 0, 0 },
00832     { { MNEM, ' ', OP (RD), 0 } },
00833     & ifmt_movlowgr, { 0x10 }
00834   },
00835 /* callr $rel12a */
00836   {
00837     { 0, 0, 0, 0 },
00838     { { MNEM, ' ', OP (REL12A), 0 } },
00839     & ifmt_br, { 0x1001 }
00840   },
00841 /* call $Rbj,$Rd */
00842   {
00843     { 0, 0, 0, 0 },
00844     { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
00845     & ifmt_jmp, { 0xa0 }
00846   },
00847 /* callf $abs24 */
00848   {
00849     { 0, 0, 0, 0 },
00850     { { MNEM, ' ', OP (ABS24), 0 } },
00851     & ifmt_jmpf, { 0x1000000 }
00852   },
00853 /* icallr $Rd */
00854   {
00855     { 0, 0, 0, 0 },
00856     { { MNEM, ' ', OP (RD), 0 } },
00857     & ifmt_movlowgr, { 0x30 }
00858   },
00859 /* icall $Rbj,$Rd */
00860   {
00861     { 0, 0, 0, 0 },
00862     { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
00863     & ifmt_jmp, { 0x60 }
00864   },
00865 /* icallf $abs24 */
00866   {
00867     { 0, 0, 0, 0 },
00868     { { MNEM, ' ', OP (ABS24), 0 } },
00869     & ifmt_jmpf, { 0x3000000 }
00870   },
00871 /* iret */
00872   {
00873     { 0, 0, 0, 0 },
00874     { { MNEM, 0 } },
00875     & ifmt_iret, { 0x2 }
00876   },
00877 /* ret */
00878   {
00879     { 0, 0, 0, 0 },
00880     { { MNEM, 0 } },
00881     & ifmt_iret, { 0x3 }
00882   },
00883 /* mul */
00884   {
00885     { 0, 0, 0, 0 },
00886     { { MNEM, 0 } },
00887     & ifmt_iret, { 0xd0 }
00888   },
00889 /* div */
00890   {
00891     { 0, 0, 0, 0 },
00892     { { MNEM, 0 } },
00893     & ifmt_iret, { 0xc0 }
00894   },
00895 /* sdiv */
00896   {
00897     { 0, 0, 0, 0 },
00898     { { MNEM, 0 } },
00899     & ifmt_iret, { 0xc8 }
00900   },
00901 /* sdivlh */
00902   {
00903     { 0, 0, 0, 0 },
00904     { { MNEM, 0 } },
00905     & ifmt_iret, { 0xe8 }
00906   },
00907 /* divlh */
00908   {
00909     { 0, 0, 0, 0 },
00910     { { MNEM, 0 } },
00911     & ifmt_iret, { 0xe0 }
00912   },
00913 /* reset */
00914   {
00915     { 0, 0, 0, 0 },
00916     { { MNEM, 0 } },
00917     & ifmt_iret, { 0xf }
00918   },
00919 /* nop */
00920   {
00921     { 0, 0, 0, 0 },
00922     { { MNEM, 0 } },
00923     & ifmt_iret, { 0x0 }
00924   },
00925 /* halt */
00926   {
00927     { 0, 0, 0, 0 },
00928     { { MNEM, 0 } },
00929     & ifmt_iret, { 0x8 }
00930   },
00931 /* hold */
00932   {
00933     { 0, 0, 0, 0 },
00934     { { MNEM, 0 } },
00935     & ifmt_iret, { 0xa }
00936   },
00937 /* holdx */
00938   {
00939     { 0, 0, 0, 0 },
00940     { { MNEM, 0 } },
00941     & ifmt_iret, { 0xb }
00942   },
00943 /* brk */
00944   {
00945     { 0, 0, 0, 0 },
00946     { { MNEM, 0 } },
00947     & ifmt_iret, { 0x5 }
00948   },
00949 /* --unused-- */
00950   {
00951     { 0, 0, 0, 0 },
00952     { { MNEM, 0 } },
00953     & ifmt_iret, { 0x1 }
00954   },
00955 };
00956 
00957 #undef A
00958 #undef OPERAND
00959 #undef MNEM
00960 #undef OP
00961 
00962 /* Formats for ALIAS macro-insns.  */
00963 
00964 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00965 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
00966 #else
00967 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_f]
00968 #endif
00969 static const CGEN_IFMT ifmt_movimm8 ATTRIBUTE_UNUSED = {
00970   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } }
00971 };
00972 
00973 static const CGEN_IFMT ifmt_movgrimm8 ATTRIBUTE_UNUSED = {
00974   16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } }
00975 };
00976 
00977 static const CGEN_IFMT ifmt_movgrimm16 ATTRIBUTE_UNUSED = {
00978   32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } }
00979 };
00980 
00981 static const CGEN_IFMT ifmt_incgr ATTRIBUTE_UNUSED = {
00982   16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
00983 };
00984 
00985 static const CGEN_IFMT ifmt_decgr ATTRIBUTE_UNUSED = {
00986   16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
00987 };
00988 
00989 #undef F
00990 
00991 /* Each non-simple macro entry points to an array of expansion possibilities.  */
00992 
00993 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00994 #define A(a) (1 << CGEN_INSN_##a)
00995 #else
00996 #define A(a) (1 << CGEN_INSN_a)
00997 #endif
00998 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00999 #define OPERAND(op) XSTORMY16_OPERAND_##op
01000 #else
01001 #define OPERAND(op) XSTORMY16_OPERAND_op
01002 #endif
01003 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
01004 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
01005 
01006 /* The macro instruction table.  */
01007 
01008 static const CGEN_IBASE xstormy16_cgen_macro_insn_table[] =
01009 {
01010 /* mov Rx,#$imm8 */
01011   {
01012     -1, "movimm8", "mov", 16,
01013     { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
01014   },
01015 /* mov $Rm,#$imm8small */
01016   {
01017     -1, "movgrimm8", "mov", 16,
01018     { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
01019   },
01020 /* mov $Rd,#$imm16 */
01021   {
01022     -1, "movgrimm16", "mov", 32,
01023     { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
01024   },
01025 /* inc $Rd */
01026   {
01027     -1, "incgr", "inc", 16,
01028     { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
01029   },
01030 /* dec $Rd */
01031   {
01032     -1, "decgr", "dec", 16,
01033     { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
01034   },
01035 };
01036 
01037 /* The macro instruction opcode table.  */
01038 
01039 static const CGEN_OPCODE xstormy16_cgen_macro_insn_opcode_table[] =
01040 {
01041 /* mov Rx,#$imm8 */
01042   {
01043     { 0, 0, 0, 0 },
01044     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
01045     & ifmt_movimm8, { 0x4700 }
01046   },
01047 /* mov $Rm,#$imm8small */
01048   {
01049     { 0, 0, 0, 0 },
01050     { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } },
01051     & ifmt_movgrimm8, { 0x2100 }
01052   },
01053 /* mov $Rd,#$imm16 */
01054   {
01055     { 0, 0, 0, 0 },
01056     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
01057     & ifmt_movgrimm16, { 0x31300000 }
01058   },
01059 /* inc $Rd */
01060   {
01061     { 0, 0, 0, 0 },
01062     { { MNEM, ' ', OP (RD), 0 } },
01063     & ifmt_incgr, { 0x3000 }
01064   },
01065 /* dec $Rd */
01066   {
01067     { 0, 0, 0, 0 },
01068     { { MNEM, ' ', OP (RD), 0 } },
01069     & ifmt_decgr, { 0x3040 }
01070   },
01071 };
01072 
01073 #undef A
01074 #undef OPERAND
01075 #undef MNEM
01076 #undef OP
01077 
01078 #ifndef CGEN_ASM_HASH_P
01079 #define CGEN_ASM_HASH_P(insn) 1
01080 #endif
01081 
01082 #ifndef CGEN_DIS_HASH_P
01083 #define CGEN_DIS_HASH_P(insn) 1
01084 #endif
01085 
01086 /* Return non-zero if INSN is to be added to the hash table.
01087    Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */
01088 
01089 static int
01090 asm_hash_insn_p (insn)
01091      const CGEN_INSN *insn ATTRIBUTE_UNUSED;
01092 {
01093   return CGEN_ASM_HASH_P (insn);
01094 }
01095 
01096 static int
01097 dis_hash_insn_p (insn)
01098      const CGEN_INSN *insn;
01099 {
01100   /* If building the hash table and the NO-DIS attribute is present,
01101      ignore.  */
01102   if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
01103     return 0;
01104   return CGEN_DIS_HASH_P (insn);
01105 }
01106 
01107 #ifndef CGEN_ASM_HASH
01108 #define CGEN_ASM_HASH_SIZE 127
01109 #ifdef CGEN_MNEMONIC_OPERANDS
01110 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
01111 #else
01112 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
01113 #endif
01114 #endif
01115 
01116 /* It doesn't make much sense to provide a default here,
01117    but while this is under development we do.
01118    BUFFER is a pointer to the bytes of the insn, target order.
01119    VALUE is the first base_insn_bitsize bits as an int in host order.  */
01120 
01121 #ifndef CGEN_DIS_HASH
01122 #define CGEN_DIS_HASH_SIZE 256
01123 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
01124 #endif
01125 
01126 /* The result is the hash value of the insn.
01127    Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */
01128 
01129 static unsigned int
01130 asm_hash_insn (mnem)
01131      const char * mnem;
01132 {
01133   return CGEN_ASM_HASH (mnem);
01134 }
01135 
01136 /* BUF is a pointer to the bytes of the insn, target order.
01137    VALUE is the first base_insn_bitsize bits as an int in host order.  */
01138 
01139 static unsigned int
01140 dis_hash_insn (buf, value)
01141      const char * buf ATTRIBUTE_UNUSED;
01142      CGEN_INSN_INT value ATTRIBUTE_UNUSED;
01143 {
01144   return CGEN_DIS_HASH (buf, value);
01145 }
01146 
01147 /* Set the recorded length of the insn in the CGEN_FIELDS struct.  */
01148 
01149 static void
01150 set_fields_bitsize (CGEN_FIELDS *fields, int size)
01151 {
01152   CGEN_FIELDS_BITSIZE (fields) = size;
01153 }
01154 
01155 /* Function to call before using the operand instance table.
01156    This plugs the opcode entries and macro instructions into the cpu table.  */
01157 
01158 void
01159 xstormy16_cgen_init_opcode_table (CGEN_CPU_DESC cd)
01160 {
01161   int i;
01162   int num_macros = (sizeof (xstormy16_cgen_macro_insn_table) /
01163                   sizeof (xstormy16_cgen_macro_insn_table[0]));
01164   const CGEN_IBASE *ib = & xstormy16_cgen_macro_insn_table[0];
01165   const CGEN_OPCODE *oc = & xstormy16_cgen_macro_insn_opcode_table[0];
01166   CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
01167 
01168   memset (insns, 0, num_macros * sizeof (CGEN_INSN));
01169   for (i = 0; i < num_macros; ++i)
01170     {
01171       insns[i].base = &ib[i];
01172       insns[i].opcode = &oc[i];
01173       xstormy16_cgen_build_insn_regex (& insns[i]);
01174     }
01175   cd->macro_insn_table.init_entries = insns;
01176   cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
01177   cd->macro_insn_table.num_init_entries = num_macros;
01178 
01179   oc = & xstormy16_cgen_insn_opcode_table[0];
01180   insns = (CGEN_INSN *) cd->insn_table.init_entries;
01181   for (i = 0; i < MAX_INSNS; ++i)
01182     {
01183       insns[i].opcode = &oc[i];
01184       xstormy16_cgen_build_insn_regex (& insns[i]);
01185     }
01186 
01187   cd->sizeof_fields = sizeof (CGEN_FIELDS);
01188   cd->set_fields_bitsize = set_fields_bitsize;
01189 
01190   cd->asm_hash_p = asm_hash_insn_p;
01191   cd->asm_hash = asm_hash_insn;
01192   cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
01193 
01194   cd->dis_hash_p = dis_hash_insn_p;
01195   cd->dis_hash = dis_hash_insn;
01196   cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
01197 }