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cell-binutils  2.17cvs20070401
xscale.d
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00001 #objdump: -dr --prefix-addresses --show-raw-insn
00002 #name: XScale instructions
00003 #as: -mcpu=xscale -EL
00004 
00005 # Test the XScale instructions:
00006 
00007 .*: +file format .*arm.*
00008 
00009 Disassembly of section .text:
00010 0+00 <foo> ee201010  mia    acc0, r0, r1
00011 0+04 <[^>]*> be20d01e       mialt  acc0, lr, sp
00012 0+08 <[^>]*> ee284012       miaph  acc0, r2, r4
00013 0+0c <[^>]*> 1e286015       miaphne       acc0, r5, r6
00014 0+10 <[^>]*> ee2c8017       miaBB  acc0, r7, r8
00015 0+14 <[^>]*> ee2da019       miaBT  acc0, r9, sl
00016 0+18 <[^>]*> ee2eb01c       miaTB  acc0, ip, fp
00017 0+1c <[^>]*> ee2f0010       miaTT  acc0, r0, r0
00018 0+20 <[^>]*> ec411000       mar    acc0, r1, r1
00019 0+24 <[^>]*> cc4c2000       margt  acc0, r2, ip
00020 0+28 <[^>]*> ec543000       mra    r3, r4, acc0
00021 0+2c <[^>]*> ec585000       mra    r5, r8, acc0
00022 0+30 <[^>]*> f5d0f000       pld    \[r0\]
00023 0+34 <[^>]*> f5d1f789       pld    \[r1, #1929\]
00024 0+38 <[^>]*> f7d2f003       pld    \[r2, r3\]
00025 0+3c <[^>]*> f754f285       pld    \[r4, -r5, lsl #5\]
00026 0+40 <[^>]*> e1c100d0       ldrd   r0, \[r1\]
00027 0+44 <[^>]*> 01c327d8       ldreqd r2, \[r3, #120\]
00028 0+48 <[^>]*> b10540d6       ldrltd r4, \[r5, -r6\]
00029 0+4c <[^>]*> e16a88f9       strd   r8, \[sl, #-137\]!
00030 0+50 <[^>]*> e1ac00fd       strd   r0, \[ip, sp\]!
00031 0+54 <[^>]*> 30ce21f0       strccd r2, \[lr\], #16
00032 0+58 <[^>]*> 708640f8       strvcd r4, \[r6\], r8
00033 0+5c <[^>]*> e5910000       ldr    r0, \[r1\]
00034 0+60 <[^>]*> e5832000       str    r2, \[r3\]
00035 0+64 <[^>]*> e321f011       msr    CPSR_c, #17   ; 0x11
00036 0+68 <[^>]*> e1a00000 ?     nop[   ]+\(mov r0,r0\)
00037 0+6c <[^>]*> e1a00000 ?     nop[   ]+\(mov r0,r0\)