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cell-binutils  2.17cvs20070401
wince.d
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00001 #objdump: -dr --prefix-addresses --show-raw-insn
00002 #name: ARM WinCE basic tests
00003 #as: -mcpu=arm7m -EL
00004 #source: wince.s
00005 #not-skip: *-wince-*
00006 
00007 # Some WinCE specific tests.
00008 
00009 .*: +file format .*arm.*
00010 
00011 Disassembly of section .text:
00012 0+000 <global_data> 00000007       andeq  r0, r0, r7
00013                      0: ARM_32     global_data
00014 0+004 <global_sym> e1a00000        nop                  \(mov r0,r0\)
00015 0+008 <global_sym\+0x4> e1a00000   nop                  \(mov r0,r0\)
00016 0+000c <global_sym\+0x8> e1a00000  nop                  \(mov r0,r0\)
00017 0+010 <global_sym\+0xc> eafffffb   b      f+ff8 <global_sym\+0xf+ff4>
00018                      10: ARM_26D   global_sym\+0xf+ffc
00019 0+018 <global_sym\+0x14> ebfffffa  bl     f+ff4 <global_sym\+0xf+ff0>
00020                      14: ARM_26D   global_sym\+0xf+ffc
00021 0+01c <global_sym\+0x18> 0afffff9  beq    f+ff0 <global_sym\+0xf+fec>
00022                      18: ARM_26D   global_sym\+0xf+ffc
00023 0+020 <global_sym\+0x1c> eafffff8  b      0+008 <global_sym\+0x4>
00024 0+024 <global_sym\+0x20> ebfffff7  bl     0+008 <global_sym\+0x4>
00025 0+028 <global_sym\+0x24> 0afffff6  beq    0+008 <global_sym\+0x4>
00026 0+02c <global_sym\+0x28> eafffff5  b      0+008 <global_sym\+0x4>
00027 0+030 <global_sym\+0x2c> ebfffff4  bl     0+008 <global_sym\+0x4>
00028 0+034 <global_sym\+0x30> e51f0034  ldr    r0, \[pc, #-52\]     ; 0+008 <global_sym\+0x4>
00029 0+038 <global_sym\+0x34> e51f0038  ldr    r0, \[pc, #-56\]     ; 0+008 <global_sym\+0x4>
00030 0+03c <global_sym\+0x38> e51f003c  ldr    r0, \[pc, #-60\]     ; 0+008 <global_sym\+0x4>