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cell-binutils  2.17cvs20070401
vr4120.d
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00001 #objdump: -dr
00002 #name: MIPS VR4120
00003 #as: -march=vr4120
00004 
00005 .*: +file format .*mips.*
00006 
00007 Disassembly of section \.text:
00008 0+000 <\.text>:
00009  + 0:  00002012      mflo   a0
00010        \.\.\.
00011  + c:  00a62029      dmacc  a0,a1,a2
00012  +10:  00a62229      dmacchi       a0,a1,a2
00013  +14:  00a62629      dmacchis      a0,a1,a2
00014  +18:  00a62269      dmacchiu      a0,a1,a2
00015  +1c:  00a62669      dmacchius     a0,a1,a2
00016  +20:  00a62429      dmaccs a0,a1,a2
00017  +24:  00a62069      dmaccu a0,a1,a2
00018  +28:  00a62469      dmaccus       a0,a1,a2
00019  +2c:  00002012      mflo   a0
00020        \.\.\.
00021  +38:  00a62028      macc   a0,a1,a2
00022  +3c:  00a62228      macchi a0,a1,a2
00023  +40:  00a62628      macchis       a0,a1,a2
00024  +44:  00a62268      macchiu       a0,a1,a2
00025  +48:  00a62668      macchius      a0,a1,a2
00026  +4c:  00a62428      maccs  a0,a1,a2
00027  +50:  00a62068      maccu  a0,a1,a2
00028  +54:  00a62468      maccus a0,a1,a2
00029 #pass