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cell-binutils  2.17cvs20070401
ulh-svr4pic.d
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00001 #objdump: -dr --prefix-addresses -mmips:3000
00002 #name: MIPS ulh-svr4pic
00003 #as: -32 -mips1 -KPIC -EB
00004 #source: ulh-pic.s
00005 
00006 # Test the unaligned load and store macros with -KPIC.
00007 
00008 .*: +file format .*mips.*
00009 
00010 Disassembly of section .text:
00011 0+0000 <[^>]*> lw    at,0\(gp\)
00012 [      ]*0: R_MIPS_GOT16    .data
00013 0+0004 <[^>]*> nop
00014 0+0008 <[^>]*> addiu at,at,0
00015 [      ]*8: R_MIPS_LO16     .data
00016 0+000c <[^>]*> lb    a0,0\(at\)
00017 0+0010 <[^>]*> lbu   at,1\(at\)
00018 0+0014 <[^>]*> sll   a0,a0,0x8
00019 0+0018 <[^>]*> or    a0,a0,at
00020 0+001c <[^>]*> lw    at,0\(gp\)
00021 [      ]*1c: R_MIPS_GOT16   big_external_data_label
00022 0+0020 <[^>]*> nop
00023 0+0024 <[^>]*> lbu   a0,0\(at\)
00024 0+0028 <[^>]*> lbu   at,1\(at\)
00025 0+002c <[^>]*> sll   a0,a0,0x8
00026 0+0030 <[^>]*> or    a0,a0,at
00027 0+0034 <[^>]*> lw    at,0\(gp\)
00028 [      ]*34: R_MIPS_GOT16   small_external_data_label
00029 0+0038 <[^>]*> nop
00030 0+003c <[^>]*> lwl   a0,0\(at\)
00031 0+0040 <[^>]*> lwr   a0,3\(at\)
00032 0+0044 <[^>]*> lw    at,0\(gp\)
00033 [      ]*44: R_MIPS_GOT16   big_external_common
00034 0+0048 <[^>]*> nop
00035 0+004c <[^>]*> sb    a0,1\(at\)
00036 0+0050 <[^>]*> srl   a0,a0,0x8
00037 0+0054 <[^>]*> sb    a0,0\(at\)
00038 0+0058 <[^>]*> lbu   at,1\(at\)
00039 0+005c <[^>]*> sll   a0,a0,0x8
00040 0+0060 <[^>]*> or    a0,a0,at
00041 0+0064 <[^>]*> lw    at,0\(gp\)
00042 [      ]*64: R_MIPS_GOT16   small_external_common
00043 0+0068 <[^>]*> nop
00044 0+006c <[^>]*> swl   a0,0\(at\)
00045 0+0070 <[^>]*> swr   a0,3\(at\)
00046 0+0074 <[^>]*> lw    at,0\(gp\)
00047 [      ]*74: R_MIPS_GOT16   .bss
00048 0+0078 <[^>]*> nop
00049 0+007c <[^>]*> addiu at,at,0
00050 [      ]*7c: R_MIPS_LO16    .bss
00051 0+0080 <[^>]*> lb    a0,0\(at\)
00052 0+0084 <[^>]*> lbu   at,1\(at\)
00053 0+0088 <[^>]*> sll   a0,a0,0x8
00054 0+008c <[^>]*> or    a0,a0,at
00055 0+0090 <[^>]*> lw    at,0\(gp\)
00056 [      ]*90: R_MIPS_GOT16   .bss
00057 0+0094 <[^>]*> nop
00058 0+0098 <[^>]*> addiu at,at,1000
00059 [      ]*98: R_MIPS_LO16    .bss
00060 0+009c <[^>]*> lbu   a0,0\(at\)
00061 0+00a0 <[^>]*> lbu   at,1\(at\)
00062 0+00a4 <[^>]*> sll   a0,a0,0x8
00063 0+00a8 <[^>]*> or    a0,a0,at
00064 0+00ac <[^>]*> lw    at,0\(gp\)
00065 [      ]*ac: R_MIPS_GOT16   .data
00066 0+00b0 <[^>]*> nop
00067 0+00b4 <[^>]*> addiu at,at,0
00068 [      ]*b4: R_MIPS_LO16    .data
00069 0+00b8 <[^>]*> addiu at,at,1
00070 0+00bc <[^>]*> lwl   a0,0\(at\)
00071 0+00c0 <[^>]*> lwr   a0,3\(at\)
00072 0+00c4 <[^>]*> lw    at,0\(gp\)
00073 [      ]*c4: R_MIPS_GOT16   big_external_data_label
00074 0+00c8 <[^>]*> nop
00075 0+00cc <[^>]*> addiu at,at,1
00076 0+00d0 <[^>]*> sb    a0,1\(at\)
00077 0+00d4 <[^>]*> srl   a0,a0,0x8
00078 0+00d8 <[^>]*> sb    a0,0\(at\)
00079 0+00dc <[^>]*> lbu   at,1\(at\)
00080 0+00e0 <[^>]*> sll   a0,a0,0x8
00081 0+00e4 <[^>]*> or    a0,a0,at
00082 0+00e8 <[^>]*> lw    at,0\(gp\)
00083 [      ]*e8: R_MIPS_GOT16   small_external_data_label
00084 0+00ec <[^>]*> nop
00085 0+00f0 <[^>]*> addiu at,at,1
00086 0+00f4 <[^>]*> swl   a0,0\(at\)
00087 0+00f8 <[^>]*> swr   a0,3\(at\)
00088 0+00fc <[^>]*> lw    at,0\(gp\)
00089 [      ]*fc: R_MIPS_GOT16   big_external_common
00090 0+0100 <[^>]*> nop
00091 0+0104 <[^>]*> addiu at,at,1
00092 0+0108 <[^>]*> lb    a0,0\(at\)
00093 0+010c <[^>]*> lbu   at,1\(at\)
00094 0+0110 <[^>]*> sll   a0,a0,0x8
00095 0+0114 <[^>]*> or    a0,a0,at
00096 0+0118 <[^>]*> lw    at,0\(gp\)
00097 [      ]*118: R_MIPS_GOT16  small_external_common
00098 0+011c <[^>]*> nop
00099 0+0120 <[^>]*> addiu at,at,1
00100 0+0124 <[^>]*> lbu   a0,0\(at\)
00101 0+0128 <[^>]*> lbu   at,1\(at\)
00102 0+012c <[^>]*> sll   a0,a0,0x8
00103 0+0130 <[^>]*> or    a0,a0,at
00104 0+0134 <[^>]*> lw    at,0\(gp\)
00105 [      ]*134: R_MIPS_GOT16  .bss
00106 0+0138 <[^>]*> nop
00107 0+013c <[^>]*> addiu at,at,0
00108 [      ]*13c: R_MIPS_LO16   .bss
00109 0+0140 <[^>]*> addiu at,at,1
00110 0+0144 <[^>]*> lwl   a0,0\(at\)
00111 0+0148 <[^>]*> lwr   a0,3\(at\)
00112 0+014c <[^>]*> lw    at,0\(gp\)
00113 [      ]*14c: R_MIPS_GOT16  .bss
00114 0+0150 <[^>]*> nop
00115 0+0154 <[^>]*> addiu at,at,1000
00116 [      ]*154: R_MIPS_LO16   .bss
00117 0+0158 <[^>]*> addiu at,at,1
00118 0+015c <[^>]*> sb    a0,1\(at\)
00119 0+0160 <[^>]*> srl   a0,a0,0x8
00120 0+0164 <[^>]*> sb    a0,0\(at\)
00121 0+0168 <[^>]*> lbu   at,1\(at\)
00122 0+016c <[^>]*> sll   a0,a0,0x8
00123 0+0170 <[^>]*> or    a0,a0,at
00124        ...