Back to index

cell-binutils  2.17cvs20070401
tlsso.d
Go to the documentation of this file.
00001 #source: tls.s
00002 #as: -a64
00003 #ld: -shared -melf64ppc
00004 #objdump: -dr
00005 #target: powerpc64*-*-*
00006 
00007 .*: +file format elf64-powerpc
00008 
00009 Disassembly of section \.text:
00010 
00011 .* <\.__tls_get_addr>:
00012 .*     3d 82 00 00   addis   r12,r2,0
00013 .*     f8 41 00 28   std     r2,40\(r1\)
00014 .*     e9 6c 80 78   ld      r11,-32648\(r12\)
00015 .*     e8 4c 80 80   ld      r2,-32640\(r12\)
00016 .*     7d 69 03 a6   mtctr   r11
00017 .*     e9 6c 80 88   ld      r11,-32632\(r12\)
00018 .*     4e 80 04 20   bctr
00019 
00020 .* <_start>:
00021 .*     38 62 80 30   addi    r3,r2,-32720
00022 .*     4b ff ff e1   bl      .* <\.__tls_get_addr>
00023 .*     e8 41 00 28   ld      r2,40\(r1\)
00024 .*     38 62 80 08   addi    r3,r2,-32760
00025 .*     4b ff ff d5   bl      .* <\.__tls_get_addr>
00026 .*     e8 41 00 28   ld      r2,40\(r1\)
00027 .*     38 62 80 48   addi    r3,r2,-32696
00028 .*     4b ff ff c9   bl      .* <\.__tls_get_addr>
00029 .*     e8 41 00 28   ld      r2,40\(r1\)
00030 .*     38 62 80 08   addi    r3,r2,-32760
00031 .*     4b ff ff bd   bl      .* <\.__tls_get_addr>
00032 .*     e8 41 00 28   ld      r2,40\(r1\)
00033 .*     39 23 80 40   addi    r9,r3,-32704
00034 .*     3d 23 00 00   addis   r9,r3,0
00035 .*     81 49 80 48   lwz     r10,-32696\(r9\)
00036 .*     e9 22 80 40   ld      r9,-32704\(r2\)
00037 .*     7d 49 18 2a   ldx     r10,r9,r3
00038 .*     e9 22 80 58   ld      r9,-32680\(r2\)
00039 .*     7d 49 6a 2e   lhzx    r10,r9,r13
00040 .*     89 4d 00 00   lbz     r10,0\(r13\)
00041 .*     3d 2d 00 00   addis   r9,r13,0
00042 .*     99 49 00 00   stb     r10,0\(r9\)
00043 .*     38 62 80 18   addi    r3,r2,-32744
00044 .*     4b ff ff 89   bl      .* <\.__tls_get_addr>
00045 .*     e8 41 00 28   ld      r2,40\(r1\)
00046 .*     38 62 80 08   addi    r3,r2,-32760
00047 .*     4b ff ff 7d   bl      .* <\.__tls_get_addr>
00048 .*     e8 41 00 28   ld      r2,40\(r1\)
00049 .*     f9 43 80 08   std     r10,-32760\(r3\)
00050 .*     3d 23 00 00   addis   r9,r3,0
00051 .*     91 49 80 10   stw     r10,-32752\(r9\)
00052 .*     e9 22 80 28   ld      r9,-32728\(r2\)
00053 .*     7d 49 19 2a   stdx    r10,r9,r3
00054 .*     e9 22 80 58   ld      r9,-32680\(r2\)
00055 .*     7d 49 6b 2e   sthx    r10,r9,r13
00056 .*     e9 4d 00 02   lwa     r10,0\(r13\)
00057 .*     3d 2d 00 00   addis   r9,r13,0
00058 .*     a9 49 00 00   lha     r10,0\(r9\)
00059 .*     60 00 00 00   nop
00060 .*     00 00 00 00 .*
00061 .*     00 01 02 20 .*
00062 .*     7d 88 02 a6   mflr    r12
00063 .*     42 9f 00 05   bcl-    20,4\*cr7\+so,.*
00064 .*     7d 68 02 a6   mflr    r11
00065 .*     e8 4b ff f0   ld      r2,-16\(r11\)
00066 .*     7d 88 03 a6   mtlr    r12
00067 .*     7d 82 5a 14   add     r12,r2,r11
00068 .*     e9 6c 00 00   ld      r11,0\(r12\)
00069 .*     e8 4c 00 08   ld      r2,8\(r12\)
00070 .*     7d 69 03 a6   mtctr   r11
00071 .*     e9 6c 00 10   ld      r11,16\(r12\)
00072 .*     4e 80 04 20   bctr
00073 .*     60 00 00 00   nop
00074 .*     60 00 00 00   nop
00075 .*     60 00 00 00   nop
00076 .*     38 00 00 00   li      r0,0
00077 .*     4b ff ff c4   b       .*