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cell-binutils  2.17cvs20070401
tlsexe32.d
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00001 #source: tls32.s
00002 #as: -a32
00003 #ld: -melf32ppc tmpdir/libtlslib32.so
00004 #objdump: -dr
00005 #target: powerpc*-*-*
00006 
00007 .*: +file format elf32-powerpc
00008 
00009 Disassembly of section \.text:
00010 
00011 .* <_start>:
00012 .*:    80 7f ff f0   lwz     r3,-16\(r31\)
00013 .*:    7c 63 12 14   add     r3,r3,r2
00014 .*:    38 7f ff f4   addi    r3,r31,-12
00015 .*:    48 01 01 85   bl      .*<__tls_get_addr@plt>
00016 .*:    3c 62 00 00   addis   r3,r2,0
00017 .*:    38 63 90 1c   addi    r3,r3,-28644
00018 .*:    3c 62 00 00   addis   r3,r2,0
00019 .*:    38 63 10 00   addi    r3,r3,4096
00020 .*:    39 23 80 20   addi    r9,r3,-32736
00021 .*:    3d 23 00 00   addis   r9,r3,0
00022 .*:    81 49 80 24   lwz     r10,-32732\(r9\)
00023 .*:    3d 22 00 00   addis   r9,r2,0
00024 .*:    a1 49 90 2c   lhz     r10,-28628\(r9\)
00025 .*:    89 42 90 30   lbz     r10,-28624\(r2\)
00026 .*:    3d 22 00 00   addis   r9,r2,0
00027 .*:    99 49 90 34   stb     r10,-28620\(r9\)
00028 .*:    3c 62 00 00   addis   r3,r2,0
00029 .*:    38 63 90 00   addi    r3,r3,-28672
00030 .*:    3c 62 00 00   addis   r3,r2,0
00031 .*:    38 63 10 00   addi    r3,r3,4096
00032 .*:    91 43 80 04   stw     r10,-32764\(r3\)
00033 .*:    3d 23 00 00   addis   r9,r3,0
00034 .*:    91 49 80 08   stw     r10,-32760\(r9\)
00035 .*:    3d 22 00 00   addis   r9,r2,0
00036 .*:    b1 49 90 2c   sth     r10,-28628\(r9\)
00037 .*:    a1 42 90 14   lhz     r10,-28652\(r2\)
00038 .*:    3d 22 00 00   addis   r9,r2,0
00039 .*:    a9 49 90 18   lha     r10,-28648\(r9\)
00040 Disassembly of section \.got:
00041 
00042 .* <_GLOBAL_OFFSET_TABLE_-0x10>:
00043        \.\.\.
00044 .*:    4e 80 00 21   blrl
00045 
00046 .* <_GLOBAL_OFFSET_TABLE_>:
00047 .*:    01 81 02 b4 00 00 00 00 00 00 00 00  .*