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cell-binutils  2.17cvs20070401
tc-sh.c
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00001 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
00002    Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
00003    2003, 2004, 2005, 2006  Free Software Foundation, Inc.
00004 
00005    This file is part of GAS, the GNU Assembler.
00006 
00007    GAS is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 2, or (at your option)
00010    any later version.
00011 
00012    GAS is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with GAS; see the file COPYING.  If not, write to
00019    the Free Software Foundation, 51 Franklin Street - Fifth Floor,
00020    Boston, MA 02110-1301, USA.  */
00021 
00022 /* Written By Steve Chamberlain <sac@cygnus.com>  */
00023 
00024 #include "as.h"
00025 #include "subsegs.h"
00026 #define DEFINE_TABLE
00027 #include "opcodes/sh-opc.h"
00028 #include "safe-ctype.h"
00029 #include "struc-symbol.h"
00030 
00031 #ifdef OBJ_ELF
00032 #include "elf/sh.h"
00033 #endif
00034 
00035 #include "dwarf2dbg.h"
00036 #include "dw2gencfi.h"
00037 
00038 typedef struct
00039   {
00040     sh_arg_type type;
00041     int reg;
00042     expressionS immediate;
00043   }
00044 sh_operand_info;
00045 
00046 const char comment_chars[] = "!";
00047 const char line_separator_chars[] = ";";
00048 const char line_comment_chars[] = "!#";
00049 
00050 static void s_uses (int);
00051 static void s_uacons (int);
00052 
00053 #ifdef OBJ_ELF
00054 static void sh_elf_cons (int);
00055 
00056 symbolS *GOT_symbol;        /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
00057 #endif
00058 
00059 static void
00060 big (int ignore ATTRIBUTE_UNUSED)
00061 {
00062   if (! target_big_endian)
00063     as_bad (_("directive .big encountered when option -big required"));
00064 
00065   /* Stop further messages.  */
00066   target_big_endian = 1;
00067 }
00068 
00069 static void
00070 little (int ignore ATTRIBUTE_UNUSED)
00071 {
00072   if (target_big_endian)
00073     as_bad (_("directive .little encountered when option -little required"));
00074 
00075   /* Stop further messages.  */
00076   target_big_endian = 0;
00077 }
00078 
00079 /* This table describes all the machine specific pseudo-ops the assembler
00080    has to support.  The fields are:
00081    pseudo-op name without dot
00082    function to call to execute this pseudo-op
00083    Integer arg to pass to the function.  */
00084 
00085 const pseudo_typeS md_pseudo_table[] =
00086 {
00087 #ifdef OBJ_ELF
00088   {"long", sh_elf_cons, 4},
00089   {"int", sh_elf_cons, 4},
00090   {"word", sh_elf_cons, 2},
00091   {"short", sh_elf_cons, 2},
00092 #else
00093   {"int", cons, 4},
00094   {"word", cons, 2},
00095 #endif /* OBJ_ELF */
00096   {"big", big, 0},
00097   {"form", listing_psize, 0},
00098   {"little", little, 0},
00099   {"heading", listing_title, 0},
00100   {"import", s_ignore, 0},
00101   {"page", listing_eject, 0},
00102   {"program", s_ignore, 0},
00103   {"uses", s_uses, 0},
00104   {"uaword", s_uacons, 2},
00105   {"ualong", s_uacons, 4},
00106   {"uaquad", s_uacons, 8},
00107   {"2byte", s_uacons, 2},
00108   {"4byte", s_uacons, 4},
00109   {"8byte", s_uacons, 8},
00110 #ifdef HAVE_SH64
00111   {"mode", s_sh64_mode, 0 },
00112 
00113   /* Have the old name too.  */
00114   {"isa", s_sh64_mode, 0 },
00115 
00116   /* Assert that the right ABI is used.  */
00117   {"abi", s_sh64_abi, 0 },
00118 
00119   { "vtable_inherit", sh64_vtable_inherit, 0 },
00120   { "vtable_entry", sh64_vtable_entry, 0 },
00121 #endif /* HAVE_SH64 */
00122   {0, 0, 0}
00123 };
00124 
00125 int sh_relax;        /* set if -relax seen */
00126 
00127 /* Whether -small was seen.  */
00128 
00129 int sh_small;
00130 
00131 /* Flag to generate relocations against symbol values for local symbols.  */
00132 
00133 static int dont_adjust_reloc_32;
00134 
00135 /* Flag to indicate that '$' is allowed as a register prefix.  */
00136 
00137 static int allow_dollar_register_prefix;
00138 
00139 /* Preset architecture set, if given; zero otherwise.  */
00140 
00141 static unsigned int preset_target_arch;
00142 
00143 /* The bit mask of architectures that could
00144    accommodate the insns seen so far.  */
00145 static unsigned int valid_arch;
00146 
00147 const char EXP_CHARS[] = "eE";
00148 
00149 /* Chars that mean this number is a floating point constant.  */
00150 /* As in 0f12.456 */
00151 /* or    0d1.2345e12 */
00152 const char FLT_CHARS[] = "rRsSfFdDxXpP";
00153 
00154 #define C(a,b) ENCODE_RELAX(a,b)
00155 
00156 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
00157 #define GET_WHAT(x) ((x>>4))
00158 
00159 /* These are the three types of relaxable instruction.  */
00160 /* These are the types of relaxable instructions; except for END which is
00161    a marker.  */
00162 #define COND_JUMP 1
00163 #define COND_JUMP_DELAY 2
00164 #define UNCOND_JUMP  3
00165 
00166 #ifdef HAVE_SH64
00167 
00168 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits.  */
00169 #define SH64PCREL16_32 4
00170 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits.  */
00171 #define SH64PCREL16_64 5
00172 
00173 /* Variants of the above for adjusting the insn to PTA or PTB according to
00174    the label.  */
00175 #define SH64PCREL16PT_32 6
00176 #define SH64PCREL16PT_64 7
00177 
00178 /* A MOVI expansion, expanding to at most 32 or 64 bits.  */
00179 #define MOVI_IMM_32 8
00180 #define MOVI_IMM_32_PCREL 9
00181 #define MOVI_IMM_64 10
00182 #define MOVI_IMM_64_PCREL 11
00183 #define END 12
00184 
00185 #else  /* HAVE_SH64 */
00186 
00187 #define END 4
00188 
00189 #endif /* HAVE_SH64 */
00190 
00191 #define UNDEF_DISP 0
00192 #define COND8  1
00193 #define COND12 2
00194 #define COND32 3
00195 #define UNDEF_WORD_DISP 4
00196 
00197 #define UNCOND12 1
00198 #define UNCOND32 2
00199 
00200 #ifdef HAVE_SH64
00201 #define UNDEF_SH64PCREL 0
00202 #define SH64PCREL16 1
00203 #define SH64PCREL32 2
00204 #define SH64PCREL48 3
00205 #define SH64PCREL64 4
00206 #define SH64PCRELPLT 5
00207 
00208 #define UNDEF_MOVI 0
00209 #define MOVI_16 1
00210 #define MOVI_32 2
00211 #define MOVI_48 3
00212 #define MOVI_64 4
00213 #define MOVI_PLT 5
00214 #define MOVI_GOTOFF 6
00215 #define MOVI_GOTPC 7
00216 #endif /* HAVE_SH64 */
00217 
00218 /* Branch displacements are from the address of the branch plus
00219    four, thus all minimum and maximum values have 4 added to them.  */
00220 #define COND8_F 258
00221 #define COND8_M -252
00222 #define COND8_LENGTH 2
00223 
00224 /* There is one extra instruction before the branch, so we must add
00225    two more bytes to account for it.  */
00226 #define COND12_F 4100
00227 #define COND12_M -4090
00228 #define COND12_LENGTH 6
00229 
00230 #define COND12_DELAY_LENGTH 4
00231 
00232 /* ??? The minimum and maximum values are wrong, but this does not matter
00233    since this relocation type is not supported yet.  */
00234 #define COND32_F (1<<30)
00235 #define COND32_M -(1<<30)
00236 #define COND32_LENGTH 14
00237 
00238 #define UNCOND12_F 4098
00239 #define UNCOND12_M -4092
00240 #define UNCOND12_LENGTH 2
00241 
00242 /* ??? The minimum and maximum values are wrong, but this does not matter
00243    since this relocation type is not supported yet.  */
00244 #define UNCOND32_F (1<<30)
00245 #define UNCOND32_M -(1<<30)
00246 #define UNCOND32_LENGTH 14
00247 
00248 #ifdef HAVE_SH64
00249 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
00250    TRd" as is the current insn, so no extra length.  Note that the "reach"
00251    is calculated from the address *after* that insn, but the offset in the
00252    insn is calculated from the beginning of the insn.  We also need to
00253    take into account the implicit 1 coded as the "A" in PTA when counting
00254    forward.  If PTB reaches an odd address, we trap that as an error
00255    elsewhere, so we don't have to have different relaxation entries.  We
00256    don't add a one to the negative range, since PTB would then have the
00257    farthest backward-reaching value skipped, not generated at relaxation.  */
00258 #define SH64PCREL16_F (32767 * 4 - 4 + 1)
00259 #define SH64PCREL16_M (-32768 * 4 - 4)
00260 #define SH64PCREL16_LENGTH 0
00261 
00262 /* The next step is to change that PT insn into
00263      MOVI ((label - datalabel Ln) >> 16) & 65535, R25
00264      SHORI (label - datalabel Ln) & 65535, R25
00265     Ln:
00266      PTREL R25,TRd
00267    which means two extra insns, 8 extra bytes.  This is the limit for the
00268    32-bit ABI.
00269 
00270    The expressions look a bit bad since we have to adjust this to avoid overflow on a
00271    32-bit host.  */
00272 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
00273 #define SH64PCREL32_LENGTH (2 * 4)
00274 
00275 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit
00276    expansion.  */
00277 #if BFD_HOST_64BIT_LONG
00278 /* The "reach" type is long, so we can only do this for a 64-bit-long
00279    host.  */
00280 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
00281 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
00282 #define SH64PCREL48_M (((long) -1 << 47) - 4)
00283 #define SH64PCREL48_LENGTH (3 * 4)
00284 #else
00285 /* If the host does not have 64-bit longs, just make this state identical
00286    in reach to the 32-bit state.  Note that we have a slightly incorrect
00287    reach, but the correct one above will overflow a 32-bit number.  */
00288 #define SH64PCREL32_M (((long) -1 << 30) * 2)
00289 #define SH64PCREL48_F SH64PCREL32_F
00290 #define SH64PCREL48_M SH64PCREL32_M
00291 #define SH64PCREL48_LENGTH (3 * 4)
00292 #endif /* BFD_HOST_64BIT_LONG */
00293 
00294 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
00295    + PTREL sequence.  */
00296 #define SH64PCREL64_LENGTH (4 * 4)
00297 
00298 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the
00299    SH64PCREL expansions.  The PCREL one is similar, but the other has no
00300    pc-relative reach; it must be fully expanded in
00301    shmedia_md_estimate_size_before_relax.  */
00302 #define MOVI_16_LENGTH 0
00303 #define MOVI_16_F (32767 - 4)
00304 #define MOVI_16_M (-32768 - 4)
00305 #define MOVI_32_LENGTH 4
00306 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
00307 #define MOVI_48_LENGTH 8
00308 
00309 #if BFD_HOST_64BIT_LONG
00310 /* The "reach" type is long, so we can only do this for a 64-bit-long
00311    host.  */
00312 #define MOVI_32_M (((long) -1 << 30) * 2 - 4)
00313 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
00314 #define MOVI_48_M (((long) -1 << 47) - 4)
00315 #else
00316 /* If the host does not have 64-bit longs, just make this state identical
00317    in reach to the 32-bit state.  Note that we have a slightly incorrect
00318    reach, but the correct one above will overflow a 32-bit number.  */
00319 #define MOVI_32_M (((long) -1 << 30) * 2)
00320 #define MOVI_48_F MOVI_32_F
00321 #define MOVI_48_M MOVI_32_M
00322 #endif /* BFD_HOST_64BIT_LONG */
00323 
00324 #define MOVI_64_LENGTH 12
00325 #endif /* HAVE_SH64 */
00326 
00327 #define EMPTY { 0, 0, 0, 0 }
00328 
00329 const relax_typeS md_relax_table[C (END, 0)] = {
00330   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00331   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00332 
00333   EMPTY,
00334   /* C (COND_JUMP, COND8) */
00335   { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
00336   /* C (COND_JUMP, COND12) */
00337   { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
00338   /* C (COND_JUMP, COND32) */
00339   { COND32_F, COND32_M, COND32_LENGTH, 0, },
00340   /* C (COND_JUMP, UNDEF_WORD_DISP) */
00341   { 0, 0, COND32_LENGTH, 0, },
00342   EMPTY, EMPTY, EMPTY,
00343   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00344 
00345   EMPTY,
00346   /* C (COND_JUMP_DELAY, COND8) */
00347   { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
00348   /* C (COND_JUMP_DELAY, COND12) */
00349   { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
00350   /* C (COND_JUMP_DELAY, COND32) */
00351   { COND32_F, COND32_M, COND32_LENGTH, 0, },
00352   /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
00353   { 0, 0, COND32_LENGTH, 0, },
00354   EMPTY, EMPTY, EMPTY,
00355   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00356 
00357   EMPTY,
00358   /* C (UNCOND_JUMP, UNCOND12) */
00359   { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
00360   /* C (UNCOND_JUMP, UNCOND32) */
00361   { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
00362   EMPTY,
00363   /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
00364   { 0, 0, UNCOND32_LENGTH, 0, },
00365   EMPTY, EMPTY, EMPTY,
00366   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00367 
00368 #ifdef HAVE_SH64
00369   /* C (SH64PCREL16_32, SH64PCREL16) */
00370   EMPTY,
00371   { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) },
00372   /* C (SH64PCREL16_32, SH64PCREL32) */
00373   { 0, 0, SH64PCREL32_LENGTH, 0 },
00374   EMPTY, EMPTY,
00375   /* C (SH64PCREL16_32, SH64PCRELPLT) */
00376   { 0, 0, SH64PCREL32_LENGTH, 0 },
00377   EMPTY, EMPTY,
00378   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00379 
00380   /* C (SH64PCREL16_64, SH64PCREL16) */
00381   EMPTY,
00382   { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) },
00383   /* C (SH64PCREL16_64, SH64PCREL32) */
00384   { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) },
00385   /* C (SH64PCREL16_64, SH64PCREL48) */
00386   { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) },
00387   /* C (SH64PCREL16_64, SH64PCREL64) */
00388   { 0, 0, SH64PCREL64_LENGTH, 0 },
00389   /* C (SH64PCREL16_64, SH64PCRELPLT) */
00390   { 0, 0, SH64PCREL64_LENGTH, 0 },
00391   EMPTY, EMPTY,
00392   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00393 
00394   /* C (SH64PCREL16PT_32, SH64PCREL16) */
00395   EMPTY,
00396   { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) },
00397   /* C (SH64PCREL16PT_32, SH64PCREL32) */
00398   { 0, 0, SH64PCREL32_LENGTH, 0 },
00399   EMPTY, EMPTY,
00400   /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
00401   { 0, 0, SH64PCREL32_LENGTH, 0 },
00402   EMPTY, EMPTY,
00403   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00404 
00405   /* C (SH64PCREL16PT_64, SH64PCREL16) */
00406   EMPTY,
00407   { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) },
00408   /* C (SH64PCREL16PT_64, SH64PCREL32) */
00409   { SH64PCREL32_F,
00410     SH64PCREL32_M,
00411     SH64PCREL32_LENGTH,
00412     C (SH64PCREL16PT_64, SH64PCREL48) },
00413   /* C (SH64PCREL16PT_64, SH64PCREL48) */
00414   { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) },
00415   /* C (SH64PCREL16PT_64, SH64PCREL64) */
00416   { 0, 0, SH64PCREL64_LENGTH, 0 },
00417   /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
00418   { 0, 0, SH64PCREL64_LENGTH, 0},
00419   EMPTY, EMPTY,
00420   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00421 
00422   /* C (MOVI_IMM_32, UNDEF_MOVI) */
00423   { 0, 0, MOVI_32_LENGTH, 0 },
00424   /* C (MOVI_IMM_32, MOVI_16) */
00425   { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) },
00426   /* C (MOVI_IMM_32, MOVI_32) */
00427   { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 },
00428   EMPTY, EMPTY, EMPTY,
00429   /* C (MOVI_IMM_32, MOVI_GOTOFF) */
00430   { 0, 0, MOVI_32_LENGTH, 0 },
00431   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00432 
00433   /* C (MOVI_IMM_32_PCREL, MOVI_16) */
00434   EMPTY,
00435   { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) },
00436   /* C (MOVI_IMM_32_PCREL, MOVI_32) */
00437   { 0, 0, MOVI_32_LENGTH, 0 },
00438   EMPTY, EMPTY,
00439   /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
00440   { 0, 0, MOVI_32_LENGTH, 0 },
00441   EMPTY,
00442   /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
00443   { 0, 0, MOVI_32_LENGTH, 0 },
00444   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00445 
00446   /* C (MOVI_IMM_64, UNDEF_MOVI) */
00447   { 0, 0, MOVI_64_LENGTH, 0 },
00448   /* C (MOVI_IMM_64, MOVI_16) */
00449   { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) },
00450   /* C (MOVI_IMM_64, MOVI_32) */
00451   { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) },
00452   /* C (MOVI_IMM_64, MOVI_48) */
00453   { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) },
00454   /* C (MOVI_IMM_64, MOVI_64) */
00455   { 0, 0, MOVI_64_LENGTH, 0 },
00456   EMPTY,
00457   /* C (MOVI_IMM_64, MOVI_GOTOFF) */
00458   { 0, 0, MOVI_64_LENGTH, 0 },
00459   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00460 
00461   /* C (MOVI_IMM_64_PCREL, MOVI_16) */
00462   EMPTY,
00463   { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) },
00464   /* C (MOVI_IMM_64_PCREL, MOVI_32) */
00465   { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) },
00466   /* C (MOVI_IMM_64_PCREL, MOVI_48) */
00467   { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) },
00468   /* C (MOVI_IMM_64_PCREL, MOVI_64) */
00469   { 0, 0, MOVI_64_LENGTH, 0 },
00470   /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
00471   { 0, 0, MOVI_64_LENGTH, 0 },
00472   EMPTY,
00473   /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
00474   { 0, 0, MOVI_64_LENGTH, 0 },
00475   EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
00476 
00477 #endif /* HAVE_SH64 */
00478 
00479 };
00480 
00481 #undef EMPTY
00482 
00483 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
00484 
00485 
00486 #ifdef OBJ_ELF
00487 /* Determinet whether the symbol needs any kind of PIC relocation.  */
00488 
00489 inline static int
00490 sh_PIC_related_p (symbolS *sym)
00491 {
00492   expressionS *exp;
00493 
00494   if (! sym)
00495     return 0;
00496 
00497   if (sym == GOT_symbol)
00498     return 1;
00499 
00500 #ifdef HAVE_SH64
00501   if (sh_PIC_related_p (*symbol_get_tc (sym)))
00502     return 1;
00503 #endif
00504 
00505   exp = symbol_get_value_expression (sym);
00506 
00507   return (exp->X_op == O_PIC_reloc
00508          || sh_PIC_related_p (exp->X_add_symbol)
00509          || sh_PIC_related_p (exp->X_op_symbol));
00510 }
00511 
00512 /* Determine the relocation type to be used to represent the
00513    expression, that may be rearranged.  */
00514 
00515 static int
00516 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p)
00517 {
00518   expressionS *exp = main_exp;
00519 
00520   /* This is here for backward-compatibility only.  GCC used to generated:
00521 
00522        f@PLT + . - (.LPCS# + 2)
00523 
00524      but we'd rather be able to handle this as a PIC-related reference
00525      plus/minus a symbol.  However, gas' parser gives us:
00526 
00527        O_subtract (O_add (f@PLT, .), .LPCS#+2)
00528 
00529      so we attempt to transform this into:
00530 
00531         O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
00532 
00533      which we can handle simply below.  */
00534   if (exp->X_op == O_subtract)
00535     {
00536       if (sh_PIC_related_p (exp->X_op_symbol))
00537        return 1;
00538 
00539       exp = symbol_get_value_expression (exp->X_add_symbol);
00540 
00541       if (exp && sh_PIC_related_p (exp->X_op_symbol))
00542        return 1;
00543 
00544       if (exp && exp->X_op == O_add
00545          && sh_PIC_related_p (exp->X_add_symbol))
00546        {
00547          symbolS *sym = exp->X_add_symbol;
00548 
00549          exp->X_op = O_subtract;
00550          exp->X_add_symbol = main_exp->X_op_symbol;
00551 
00552          main_exp->X_op_symbol = main_exp->X_add_symbol;
00553          main_exp->X_add_symbol = sym;
00554 
00555          main_exp->X_add_number += exp->X_add_number;
00556          exp->X_add_number = 0;
00557        }
00558 
00559       exp = main_exp;
00560     }
00561   else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol))
00562     return 1;
00563 
00564   if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract)
00565     {
00566 #ifdef HAVE_SH64
00567       if (exp->X_add_symbol
00568          && (exp->X_add_symbol == GOT_symbol
00569              || (GOT_symbol
00570                 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol)))
00571        {
00572          switch (*r_type_p)
00573            {
00574            case BFD_RELOC_SH_IMM_LOW16:
00575              *r_type_p = BFD_RELOC_SH_GOTPC_LOW16;
00576              break;
00577 
00578            case BFD_RELOC_SH_IMM_MEDLOW16:
00579              *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16;
00580              break;
00581 
00582            case BFD_RELOC_SH_IMM_MEDHI16:
00583              *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16;
00584              break;
00585 
00586            case BFD_RELOC_SH_IMM_HI16:
00587              *r_type_p = BFD_RELOC_SH_GOTPC_HI16;
00588              break;
00589 
00590            case BFD_RELOC_NONE:
00591            case BFD_RELOC_UNUSED:
00592              *r_type_p = BFD_RELOC_SH_GOTPC;
00593              break;
00594 
00595            default:
00596              abort ();
00597            }
00598          return 0;
00599        }
00600 #else
00601       if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
00602        {
00603          *r_type_p = BFD_RELOC_SH_GOTPC;
00604          return 0;
00605        }
00606 #endif
00607       exp = symbol_get_value_expression (exp->X_add_symbol);
00608       if (! exp)
00609        return 0;
00610     }
00611 
00612   if (exp->X_op == O_PIC_reloc)
00613     {
00614 #ifdef HAVE_SH64
00615       switch (*r_type_p)
00616        {
00617        case BFD_RELOC_NONE:
00618        case BFD_RELOC_UNUSED:
00619          *r_type_p = exp->X_md;
00620          break;
00621 
00622        case BFD_RELOC_SH_IMM_LOW16:
00623          switch (exp->X_md)
00624            {
00625            case BFD_RELOC_32_GOTOFF:
00626              *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16;
00627              break;
00628 
00629            case BFD_RELOC_SH_GOTPLT32:
00630              *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16;
00631              break;
00632 
00633            case BFD_RELOC_32_GOT_PCREL:
00634              *r_type_p = BFD_RELOC_SH_GOT_LOW16;
00635              break;
00636 
00637            case BFD_RELOC_32_PLT_PCREL:
00638              *r_type_p = BFD_RELOC_SH_PLT_LOW16;
00639              break;
00640 
00641            default:
00642              abort ();
00643            }
00644          break;
00645 
00646        case BFD_RELOC_SH_IMM_MEDLOW16:
00647          switch (exp->X_md)
00648            {
00649            case BFD_RELOC_32_GOTOFF:
00650              *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16;
00651              break;
00652 
00653            case BFD_RELOC_SH_GOTPLT32:
00654              *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16;
00655              break;
00656 
00657            case BFD_RELOC_32_GOT_PCREL:
00658              *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16;
00659              break;
00660 
00661            case BFD_RELOC_32_PLT_PCREL:
00662              *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16;
00663              break;
00664 
00665            default:
00666              abort ();
00667            }
00668          break;
00669 
00670        case BFD_RELOC_SH_IMM_MEDHI16:
00671          switch (exp->X_md)
00672            {
00673            case BFD_RELOC_32_GOTOFF:
00674              *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16;
00675              break;
00676 
00677            case BFD_RELOC_SH_GOTPLT32:
00678              *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16;
00679              break;
00680 
00681            case BFD_RELOC_32_GOT_PCREL:
00682              *r_type_p = BFD_RELOC_SH_GOT_MEDHI16;
00683              break;
00684 
00685            case BFD_RELOC_32_PLT_PCREL:
00686              *r_type_p = BFD_RELOC_SH_PLT_MEDHI16;
00687              break;
00688 
00689            default:
00690              abort ();
00691            }
00692          break;
00693 
00694        case BFD_RELOC_SH_IMM_HI16:
00695          switch (exp->X_md)
00696            {
00697            case BFD_RELOC_32_GOTOFF:
00698              *r_type_p = BFD_RELOC_SH_GOTOFF_HI16;
00699              break;
00700 
00701            case BFD_RELOC_SH_GOTPLT32:
00702              *r_type_p = BFD_RELOC_SH_GOTPLT_HI16;
00703              break;
00704 
00705            case BFD_RELOC_32_GOT_PCREL:
00706              *r_type_p = BFD_RELOC_SH_GOT_HI16;
00707              break;
00708 
00709            case BFD_RELOC_32_PLT_PCREL:
00710              *r_type_p = BFD_RELOC_SH_PLT_HI16;
00711              break;
00712 
00713            default:
00714              abort ();
00715            }
00716          break;
00717 
00718        default:
00719          abort ();
00720        }
00721 #else
00722       *r_type_p = exp->X_md;
00723 #endif
00724       if (exp == main_exp)
00725        exp->X_op = O_symbol;
00726       else
00727        {
00728          main_exp->X_add_symbol = exp->X_add_symbol;
00729          main_exp->X_add_number += exp->X_add_number;
00730        }
00731     }
00732   else
00733     return (sh_PIC_related_p (exp->X_add_symbol)
00734            || sh_PIC_related_p (exp->X_op_symbol));
00735 
00736   return 0;
00737 }
00738 
00739 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG.  */
00740 
00741 void
00742 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp)
00743 {
00744   bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED;
00745 
00746   if (sh_check_fixup (exp, &r_type))
00747     as_bad (_("Invalid PIC expression."));
00748 
00749   if (r_type == BFD_RELOC_UNUSED)
00750     switch (size)
00751       {
00752       case 1:
00753        r_type = BFD_RELOC_8;
00754        break;
00755 
00756       case 2:
00757        r_type = BFD_RELOC_16;
00758        break;
00759 
00760       case 4:
00761        r_type = BFD_RELOC_32;
00762        break;
00763 
00764 #ifdef HAVE_SH64
00765       case 8:
00766        r_type = BFD_RELOC_64;
00767        break;
00768 #endif
00769 
00770       default:
00771        goto error;
00772       }
00773   else if (size != 4)
00774     {
00775     error:
00776       as_bad (_("unsupported BFD relocation size %u"), size);
00777       r_type = BFD_RELOC_UNUSED;
00778     }
00779 
00780   fix_new_exp (frag, off, size, exp, 0, r_type);
00781 }
00782 
00783 /* The regular cons() function, that reads constants, doesn't support
00784    suffixes such as @GOT, @GOTOFF and @PLT, that generate
00785    machine-specific relocation types.  So we must define it here.  */
00786 /* Clobbers input_line_pointer, checks end-of-line.  */
00787 /* NBYTES 1=.byte, 2=.word, 4=.long */
00788 static void
00789 sh_elf_cons (register int nbytes)
00790 {
00791   expressionS exp;
00792 
00793 #ifdef HAVE_SH64
00794 
00795   /* Update existing range to include a previous insn, if there was one.  */
00796   sh64_update_contents_mark (TRUE);
00797 
00798   /* We need to make sure the contents type is set to data.  */
00799   sh64_flag_output ();
00800 
00801 #endif /* HAVE_SH64 */
00802 
00803   if (is_it_end_of_statement ())
00804     {
00805       demand_empty_rest_of_line ();
00806       return;
00807     }
00808 
00809 #ifdef md_cons_align
00810   md_cons_align (nbytes);
00811 #endif
00812 
00813   do
00814     {
00815       expression (&exp);
00816       emit_expr (&exp, (unsigned int) nbytes);
00817     }
00818   while (*input_line_pointer++ == ',');
00819 
00820   input_line_pointer--;            /* Put terminator back into stream.  */
00821   if (*input_line_pointer == '#' || *input_line_pointer == '!')
00822     {
00823        while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
00824     }
00825   else
00826     demand_empty_rest_of_line ();
00827 }
00828 #endif /* OBJ_ELF */
00829 
00830 
00831 /* This function is called once, at assembler startup time.  This should
00832    set up all the tables, etc that the MD part of the assembler needs.  */
00833 
00834 void
00835 md_begin (void)
00836 {
00837   const sh_opcode_info *opcode;
00838   char *prev_name = "";
00839   unsigned int target_arch;
00840 
00841   target_arch
00842     = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp;
00843   valid_arch = target_arch;
00844 
00845 #ifdef HAVE_SH64
00846   shmedia_md_begin ();
00847 #endif
00848 
00849   opcode_hash_control = hash_new ();
00850 
00851   /* Insert unique names into hash table.  */
00852   for (opcode = sh_table; opcode->name; opcode++)
00853     {
00854       if (strcmp (prev_name, opcode->name) != 0)
00855        {
00856          if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch))
00857            continue;
00858          prev_name = opcode->name;
00859          hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
00860        }
00861     }
00862 }
00863 
00864 static int reg_m;
00865 static int reg_n;
00866 static int reg_x, reg_y;
00867 static int reg_efg;
00868 static int reg_b;
00869 
00870 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
00871 
00872 /* Try to parse a reg name.  Return the number of chars consumed.  */
00873 
00874 static unsigned int
00875 parse_reg_without_prefix (char *src, int *mode, int *reg)
00876 {
00877   char l0 = TOLOWER (src[0]);
00878   char l1 = l0 ? TOLOWER (src[1]) : 0;
00879 
00880   /* We use ! IDENT_CHAR for the next character after the register name, to
00881      make sure that we won't accidentally recognize a symbol name such as
00882      'sram' or sr_ram as being a reference to the register 'sr'.  */
00883 
00884   if (l0 == 'r')
00885     {
00886       if (l1 == '1')
00887        {
00888          if (src[2] >= '0' && src[2] <= '5'
00889              && ! IDENT_CHAR ((unsigned char) src[3]))
00890            {
00891              *mode = A_REG_N;
00892              *reg = 10 + src[2] - '0';
00893              return 3;
00894            }
00895        }
00896       if (l1 >= '0' && l1 <= '9'
00897          && ! IDENT_CHAR ((unsigned char) src[2]))
00898        {
00899          *mode = A_REG_N;
00900          *reg = (l1 - '0');
00901          return 2;
00902        }
00903       if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
00904          && ! IDENT_CHAR ((unsigned char) src[7]))
00905        {
00906          *mode = A_REG_B;
00907          *reg  = (l1 - '0');
00908          return 7;
00909        }
00910 
00911       if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
00912        {
00913          *mode = A_RE;
00914          return 2;
00915        }
00916       if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
00917        {
00918          *mode = A_RS;
00919          return 2;
00920        }
00921     }
00922 
00923   if (l0 == 'a')
00924     {
00925       if (l1 == '0')
00926        {
00927          if (! IDENT_CHAR ((unsigned char) src[2]))
00928            {
00929              *mode = DSP_REG_N;
00930              *reg = A_A0_NUM;
00931              return 2;
00932            }
00933          if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
00934            {
00935              *mode = DSP_REG_N;
00936              *reg = A_A0G_NUM;
00937              return 3;
00938            }
00939        }
00940       if (l1 == '1')
00941        {
00942          if (! IDENT_CHAR ((unsigned char) src[2]))
00943            {
00944              *mode = DSP_REG_N;
00945              *reg = A_A1_NUM;
00946              return 2;
00947            }
00948          if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
00949            {
00950              *mode = DSP_REG_N;
00951              *reg = A_A1G_NUM;
00952              return 3;
00953            }
00954        }
00955 
00956       if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
00957          && ! IDENT_CHAR ((unsigned char) src[3]))
00958        {
00959          *mode = A_REG_N;
00960          *reg = 4 + (l1 - '0');
00961          return 3;
00962        }
00963       if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
00964          && ! IDENT_CHAR ((unsigned char) src[3]))
00965        {
00966          *mode = A_REG_N;
00967          *reg = 6 + (l1 - '0');
00968          return 3;
00969        }
00970       if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
00971          && ! IDENT_CHAR ((unsigned char) src[3]))
00972        {
00973          int n = l1 - '0';
00974 
00975          *mode = A_REG_N;
00976          *reg = n | ((~n & 2) << 1);
00977          return 3;
00978        }
00979     }
00980 
00981   if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2]))
00982     {
00983       if (l1 == 's')
00984        {
00985          *mode = A_REG_N;
00986          *reg = 8;
00987          return 2;
00988        }
00989       if (l1 == 'x')
00990        {
00991          *mode = A_REG_N;
00992          *reg = 8;
00993          return 2;
00994        }
00995       if (l1 == 'y')
00996        {
00997          *mode = A_REG_N;
00998          *reg = 9;
00999          return 2;
01000        }
01001     }
01002 
01003   if (l0 == 'x' && l1 >= '0' && l1 <= '1'
01004       && ! IDENT_CHAR ((unsigned char) src[2]))
01005     {
01006       *mode = DSP_REG_N;
01007       *reg = A_X0_NUM + l1 - '0';
01008       return 2;
01009     }
01010 
01011   if (l0 == 'y' && l1 >= '0' && l1 <= '1'
01012       && ! IDENT_CHAR ((unsigned char) src[2]))
01013     {
01014       *mode = DSP_REG_N;
01015       *reg = A_Y0_NUM + l1 - '0';
01016       return 2;
01017     }
01018 
01019   if (l0 == 'm' && l1 >= '0' && l1 <= '1'
01020       && ! IDENT_CHAR ((unsigned char) src[2]))
01021     {
01022       *mode = DSP_REG_N;
01023       *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
01024       return 2;
01025     }
01026 
01027   if (l0 == 's'
01028       && l1 == 's'
01029       && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
01030     {
01031       *mode = A_SSR;
01032       return 3;
01033     }
01034 
01035   if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c'
01036       && ! IDENT_CHAR ((unsigned char) src[3]))
01037     {
01038       *mode = A_SPC;
01039       return 3;
01040     }
01041 
01042   if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r'
01043       && ! IDENT_CHAR ((unsigned char) src[3]))
01044     {
01045       *mode = A_SGR;
01046       return 3;
01047     }
01048 
01049   if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r'
01050       && ! IDENT_CHAR ((unsigned char) src[3]))
01051     {
01052       *mode = A_DSR;
01053       return 3;
01054     }
01055 
01056   if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r'
01057       && ! IDENT_CHAR ((unsigned char) src[3]))
01058     {
01059       *mode = A_DBR;
01060       return 3;
01061     }
01062 
01063   if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
01064     {
01065       *mode = A_SR;
01066       return 2;
01067     }
01068 
01069   if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
01070     {
01071       *mode = A_REG_N;
01072       *reg = 15;
01073       return 2;
01074     }
01075 
01076   if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
01077     {
01078       *mode = A_PR;
01079       return 2;
01080     }
01081   if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
01082     {
01083       /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
01084          and use an uninitialized immediate.  */
01085       *mode = A_PC;
01086       return 2;
01087     }
01088   if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r'
01089       && ! IDENT_CHAR ((unsigned char) src[3]))
01090     {
01091       *mode = A_GBR;
01092       return 3;
01093     }
01094   if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r'
01095       && ! IDENT_CHAR ((unsigned char) src[3]))
01096     {
01097       *mode = A_VBR;
01098       return 3;
01099     }
01100 
01101   if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r'
01102       && ! IDENT_CHAR ((unsigned char) src[3]))
01103     {
01104       *mode = A_TBR;
01105       return 3;
01106     }
01107   if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
01108       && ! IDENT_CHAR ((unsigned char) src[4]))
01109     {
01110       if (TOLOWER (src[3]) == 'l')
01111        {
01112          *mode = A_MACL;
01113          return 4;
01114        }
01115       if (TOLOWER (src[3]) == 'h')
01116        {
01117          *mode = A_MACH;
01118          return 4;
01119        }
01120     }
01121   if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd'
01122       && ! IDENT_CHAR ((unsigned char) src[3]))
01123     {
01124       *mode = A_MOD;
01125       return 3;
01126     }
01127   if (l0 == 'f' && l1 == 'r')
01128     {
01129       if (src[2] == '1')
01130        {
01131          if (src[3] >= '0' && src[3] <= '5'
01132              && ! IDENT_CHAR ((unsigned char) src[4]))
01133            {
01134              *mode = F_REG_N;
01135              *reg = 10 + src[3] - '0';
01136              return 4;
01137            }
01138        }
01139       if (src[2] >= '0' && src[2] <= '9'
01140          && ! IDENT_CHAR ((unsigned char) src[3]))
01141        {
01142          *mode = F_REG_N;
01143          *reg = (src[2] - '0');
01144          return 3;
01145        }
01146     }
01147   if (l0 == 'd' && l1 == 'r')
01148     {
01149       if (src[2] == '1')
01150        {
01151          if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
01152              && ! IDENT_CHAR ((unsigned char) src[4]))
01153            {
01154              *mode = D_REG_N;
01155              *reg = 10 + src[3] - '0';
01156              return 4;
01157            }
01158        }
01159       if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
01160          && ! IDENT_CHAR ((unsigned char) src[3]))
01161        {
01162          *mode = D_REG_N;
01163          *reg = (src[2] - '0');
01164          return 3;
01165        }
01166     }
01167   if (l0 == 'x' && l1 == 'd')
01168     {
01169       if (src[2] == '1')
01170        {
01171          if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
01172              && ! IDENT_CHAR ((unsigned char) src[4]))
01173            {
01174              *mode = X_REG_N;
01175              *reg = 11 + src[3] - '0';
01176              return 4;
01177            }
01178        }
01179       if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
01180          && ! IDENT_CHAR ((unsigned char) src[3]))
01181        {
01182          *mode = X_REG_N;
01183          *reg = (src[2] - '0') + 1;
01184          return 3;
01185        }
01186     }
01187   if (l0 == 'f' && l1 == 'v')
01188     {
01189       if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
01190        {
01191          *mode = V_REG_N;
01192          *reg = 12;
01193          return 4;
01194        }
01195       if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
01196          && ! IDENT_CHAR ((unsigned char) src[3]))
01197        {
01198          *mode = V_REG_N;
01199          *reg = (src[2] - '0');
01200          return 3;
01201        }
01202     }
01203   if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u'
01204       && TOLOWER (src[3]) == 'l'
01205       && ! IDENT_CHAR ((unsigned char) src[4]))
01206     {
01207       *mode = FPUL_N;
01208       return 4;
01209     }
01210 
01211   if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's'
01212       && TOLOWER (src[3]) == 'c'
01213       && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
01214     {
01215       *mode = FPSCR_N;
01216       return 5;
01217     }
01218 
01219   if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't'
01220       && TOLOWER (src[3]) == 'r'
01221       && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
01222     {
01223       *mode = XMTRX_M4;
01224       return 5;
01225     }
01226 
01227   return 0;
01228 }
01229 
01230 /* Like parse_reg_without_prefix, but this version supports
01231    $-prefixed register names if enabled by the user.  */
01232 
01233 static unsigned int
01234 parse_reg (char *src, int *mode, int *reg)
01235 {
01236   unsigned int prefix;
01237   unsigned int consumed;
01238 
01239   if (src[0] == '$')
01240     {
01241       if (allow_dollar_register_prefix)
01242        {
01243          src ++;
01244          prefix = 1;
01245        }
01246       else
01247        return 0;
01248     }
01249   else
01250     prefix = 0;
01251   
01252   consumed = parse_reg_without_prefix (src, mode, reg);
01253 
01254   if (consumed == 0)
01255     return 0;
01256 
01257   return consumed + prefix;
01258 }
01259 
01260 static char *
01261 parse_exp (char *s, sh_operand_info *op)
01262 {
01263   char *save;
01264   char *new;
01265 
01266   save = input_line_pointer;
01267   input_line_pointer = s;
01268   expression (&op->immediate);
01269   if (op->immediate.X_op == O_absent)
01270     as_bad (_("missing operand"));
01271 #ifdef OBJ_ELF
01272   else if (op->immediate.X_op == O_PIC_reloc
01273           || sh_PIC_related_p (op->immediate.X_add_symbol)
01274           || sh_PIC_related_p (op->immediate.X_op_symbol))
01275     as_bad (_("misplaced PIC operand"));
01276 #endif
01277   new = input_line_pointer;
01278   input_line_pointer = save;
01279   return new;
01280 }
01281 
01282 /* The many forms of operand:
01283 
01284    Rn                   Register direct
01285    @Rn                  Register indirect
01286    @Rn+                 Autoincrement
01287    @-Rn                 Autodecrement
01288    @(disp:4,Rn)
01289    @(disp:8,GBR)
01290    @(disp:8,PC)
01291 
01292    @(R0,Rn)
01293    @(R0,GBR)
01294 
01295    disp:8
01296    disp:12
01297    #imm8
01298    pr, gbr, vbr, macl, mach
01299  */
01300 
01301 static char *
01302 parse_at (char *src, sh_operand_info *op)
01303 {
01304   int len;
01305   int mode;
01306   src++;
01307   if (src[0] == '@')
01308     {
01309       src = parse_at (src, op);
01310       if (op->type == A_DISP_TBR)
01311        op->type = A_DISP2_TBR;
01312       else
01313        as_bad (_("illegal double indirection"));
01314     }
01315   else if (src[0] == '-')
01316     {
01317       /* Must be predecrement.  */
01318       src++;
01319 
01320       len = parse_reg (src, &mode, &(op->reg));
01321       if (mode != A_REG_N)
01322        as_bad (_("illegal register after @-"));
01323 
01324       op->type = A_DEC_N;
01325       src += len;
01326     }
01327   else if (src[0] == '(')
01328     {
01329       /* Could be @(disp, rn), @(disp, gbr), @(disp, pc),  @(r0, gbr) or
01330          @(r0, rn).  */
01331       src++;
01332       len = parse_reg (src, &mode, &(op->reg));
01333       if (len && mode == A_REG_N)
01334        {
01335          src += len;
01336          if (op->reg != 0)
01337            {
01338              as_bad (_("must be @(r0,...)"));
01339            }
01340          if (src[0] == ',')
01341            {
01342              src++;
01343              /* Now can be rn or gbr.  */
01344              len = parse_reg (src, &mode, &(op->reg));
01345            }
01346          else
01347            {
01348              len = 0;
01349            }
01350          if (len)
01351            {
01352              if (mode == A_GBR)
01353               {
01354                 op->type = A_R0_GBR;
01355               }
01356              else if (mode == A_REG_N)
01357               {
01358                 op->type = A_IND_R0_REG_N;
01359               }
01360              else
01361               {
01362                 as_bad (_("syntax error in @(r0,...)"));
01363               }
01364            }
01365          else
01366            {
01367              as_bad (_("syntax error in @(r0...)"));
01368            }
01369        }
01370       else
01371        {
01372          /* Must be an @(disp,.. thing).  */
01373          src = parse_exp (src, op);
01374          if (src[0] == ',')
01375            src++;
01376          /* Now can be rn, gbr or pc.  */
01377          len = parse_reg (src, &mode, &op->reg);
01378          if (len)
01379            {
01380              if (mode == A_REG_N)
01381               {
01382                 op->type = A_DISP_REG_N;
01383               }
01384              else if (mode == A_GBR)
01385               {
01386                 op->type = A_DISP_GBR;
01387               }
01388              else if (mode == A_TBR)
01389               {
01390                 op->type = A_DISP_TBR;
01391               }
01392              else if (mode == A_PC)
01393               {
01394                 /* We want @(expr, pc) to uniformly address . + expr,
01395                    no matter if expr is a constant, or a more complex
01396                    expression, e.g. sym-. or sym1-sym2.
01397                    However, we also used to accept @(sym,pc)
01398                    as addressing sym, i.e. meaning the same as plain sym.
01399                    Some existing code does use the @(sym,pc) syntax, so
01400                    we give it the old semantics for now, but warn about
01401                    its use, so that users have some time to fix their code.
01402 
01403                    Note that due to this backward compatibility hack,
01404                    we'll get unexpected results when @(offset, pc) is used,
01405                    and offset is a symbol that is set later to an an address
01406                    difference, or an external symbol that is set to an
01407                    address difference in another source file, so we want to
01408                    eventually remove it.  */
01409                 if (op->immediate.X_op == O_symbol)
01410                   {
01411                     op->type = A_DISP_PC;
01412                     as_warn (_("Deprecated syntax."));
01413                   }
01414                 else
01415                   {
01416                     op->type = A_DISP_PC_ABS;
01417                     /* Such operands don't get corrected for PC==.+4, so
01418                       make the correction here.  */
01419                     op->immediate.X_add_number -= 4;
01420                   }
01421               }
01422              else
01423               {
01424                 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
01425               }
01426            }
01427          else
01428            {
01429              as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
01430            }
01431        }
01432       src += len;
01433       if (src[0] != ')')
01434        as_bad (_("expecting )"));
01435       else
01436        src++;
01437     }
01438   else
01439     {
01440       src += parse_reg (src, &mode, &(op->reg));
01441       if (mode != A_REG_N)
01442        as_bad (_("illegal register after @"));
01443 
01444       if (src[0] == '+')
01445        {
01446          char l0, l1;
01447 
01448          src++;
01449          l0 = TOLOWER (src[0]);
01450          l1 = TOLOWER (src[1]);
01451 
01452          if ((l0 == 'r' && l1 == '8')
01453              || (l0 == 'i' && (l1 == 'x' || l1 == 's')))
01454            {
01455              src += 2;
01456              op->type = AX_PMOD_N;
01457            }
01458          else if (   (l0 == 'r' && l1 == '9')
01459                  || (l0 == 'i' && l1 == 'y'))
01460            {
01461              src += 2;
01462              op->type = AY_PMOD_N;
01463            }
01464          else
01465            op->type = A_INC_N;
01466        }
01467       else
01468        op->type = A_IND_N;
01469     }
01470   return src;
01471 }
01472 
01473 static void
01474 get_operand (char **ptr, sh_operand_info *op)
01475 {
01476   char *src = *ptr;
01477   int mode = -1;
01478   unsigned int len;
01479 
01480   if (src[0] == '#')
01481     {
01482       src++;
01483       *ptr = parse_exp (src, op);
01484       op->type = A_IMM;
01485       return;
01486     }
01487 
01488   else if (src[0] == '@')
01489     {
01490       *ptr = parse_at (src, op);
01491       return;
01492     }
01493   len = parse_reg (src, &mode, &(op->reg));
01494   if (len)
01495     {
01496       *ptr = src + len;
01497       op->type = mode;
01498       return;
01499     }
01500   else
01501     {
01502       /* Not a reg, the only thing left is a displacement.  */
01503       *ptr = parse_exp (src, op);
01504       op->type = A_DISP_PC;
01505       return;
01506     }
01507 }
01508 
01509 static char *
01510 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand)
01511 {
01512   char *ptr = args;
01513   if (info->arg[0])
01514     {
01515       /* The pre-processor will eliminate whitespace in front of '@'
01516         after the first argument; we may be called multiple times
01517         from assemble_ppi, so don't insist on finding whitespace here.  */
01518       if (*ptr == ' ')
01519        ptr++;
01520 
01521       get_operand (&ptr, operand + 0);
01522       if (info->arg[1])
01523        {
01524          if (*ptr == ',')
01525            {
01526              ptr++;
01527            }
01528          get_operand (&ptr, operand + 1);
01529          /* ??? Hack: psha/pshl have a varying operand number depending on
01530             the type of the first operand.  We handle this by having the
01531             three-operand version first and reducing the number of operands
01532             parsed to two if we see that the first operand is an immediate.
01533              This works because no insn with three operands has an immediate
01534             as first operand.  */
01535          if (info->arg[2] && operand[0].type != A_IMM)
01536            {
01537              if (*ptr == ',')
01538               {
01539                 ptr++;
01540               }
01541              get_operand (&ptr, operand + 2);
01542            }
01543          else
01544            {
01545              operand[2].type = 0;
01546            }
01547        }
01548       else
01549        {
01550          operand[1].type = 0;
01551          operand[2].type = 0;
01552        }
01553     }
01554   else
01555     {
01556       operand[0].type = 0;
01557       operand[1].type = 0;
01558       operand[2].type = 0;
01559     }
01560   return ptr;
01561 }
01562 
01563 /* Passed a pointer to a list of opcodes which use different
01564    addressing modes, return the opcode which matches the opcodes
01565    provided.  */
01566 
01567 static sh_opcode_info *
01568 get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
01569 {
01570   sh_opcode_info *this_try = opcode;
01571   char *name = opcode->name;
01572   int n = 0;
01573 
01574   while (opcode->name)
01575     {
01576       this_try = opcode++;
01577       if ((this_try->name != name) && (strcmp (this_try->name, name) != 0))
01578        {
01579          /* We've looked so far down the table that we've run out of
01580             opcodes with the same name.  */
01581          return 0;
01582        }
01583 
01584       /* Look at both operands needed by the opcodes and provided by
01585          the user - since an arg test will often fail on the same arg
01586          again and again, we'll try and test the last failing arg the
01587          first on each opcode try.  */
01588       for (n = 0; this_try->arg[n]; n++)
01589        {
01590          sh_operand_info *user = operands + n;
01591          sh_arg_type arg = this_try->arg[n];
01592 
01593          if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
01594              && (   arg == A_DISP_REG_M
01595                 || arg == A_DISP_REG_N))
01596            {
01597              /* Check a few key IMM* fields for overflow.  */
01598              int opf;
01599              long val = user->immediate.X_add_number;
01600 
01601              for (opf = 0; opf < 4; opf ++)
01602               switch (this_try->nibbles[opf])
01603                 {
01604                 case IMM0_4:
01605                 case IMM1_4:
01606                   if (val < 0 || val > 15)
01607                     goto fail;
01608                   break;
01609                 case IMM0_4BY2:
01610                 case IMM1_4BY2:
01611                   if (val < 0 || val > 15 * 2)
01612                     goto fail;
01613                   break;
01614                 case IMM0_4BY4:
01615                 case IMM1_4BY4:
01616                   if (val < 0 || val > 15 * 4)
01617                     goto fail;
01618                   break;
01619                 default:
01620                   break;
01621                 }
01622            }
01623          switch (arg)
01624            {
01625            case A_DISP_PC:
01626              if (user->type == A_DISP_PC_ABS)
01627               break;
01628              /* Fall through.  */
01629            case A_IMM:
01630            case A_BDISP12:
01631            case A_BDISP8:
01632            case A_DISP_GBR:
01633            case A_DISP2_TBR:
01634            case A_MACH:
01635            case A_PR:
01636            case A_MACL:
01637              if (user->type != arg)
01638               goto fail;
01639              break;
01640            case A_R0:
01641              /* opcode needs r0 */
01642              if (user->type != A_REG_N || user->reg != 0)
01643               goto fail;
01644              break;
01645            case A_R0_GBR:
01646              if (user->type != A_R0_GBR || user->reg != 0)
01647               goto fail;
01648              break;
01649            case F_FR0:
01650              if (user->type != F_REG_N || user->reg != 0)
01651               goto fail;
01652              break;
01653 
01654            case A_REG_N:
01655            case A_INC_N:
01656            case A_DEC_N:
01657            case A_IND_N:
01658            case A_IND_R0_REG_N:
01659            case A_DISP_REG_N:
01660            case F_REG_N:
01661            case D_REG_N:
01662            case X_REG_N:
01663            case V_REG_N:
01664            case FPUL_N:
01665            case FPSCR_N:
01666            case DSP_REG_N:
01667              /* Opcode needs rn */
01668              if (user->type != arg)
01669               goto fail;
01670              reg_n = user->reg;
01671              break;
01672            case DX_REG_N:
01673              if (user->type != D_REG_N && user->type != X_REG_N)
01674               goto fail;
01675              reg_n = user->reg;
01676              break;
01677            case A_GBR:
01678            case A_TBR:
01679            case A_SR:
01680            case A_VBR:
01681            case A_DSR:
01682            case A_MOD:
01683            case A_RE:
01684            case A_RS:
01685            case A_SSR:
01686            case A_SPC:
01687            case A_SGR:
01688            case A_DBR:
01689              if (user->type != arg)
01690               goto fail;
01691              break;
01692 
01693            case A_REG_B:
01694              if (user->type != arg)
01695               goto fail;
01696              reg_b = user->reg;
01697              break;
01698 
01699            case A_INC_R15:
01700              if (user->type != A_INC_N)
01701               goto fail;
01702              if (user->reg != 15)
01703               goto fail;
01704              reg_n = user->reg;
01705              break;
01706 
01707            case A_DEC_R15:
01708              if (user->type != A_DEC_N)
01709               goto fail;
01710              if (user->reg != 15)
01711               goto fail;
01712              reg_n = user->reg;
01713              break;
01714 
01715            case A_REG_M:
01716            case A_INC_M:
01717            case A_DEC_M:
01718            case A_IND_M:
01719            case A_IND_R0_REG_M:
01720            case A_DISP_REG_M:
01721            case DSP_REG_M:
01722              /* Opcode needs rn */
01723              if (user->type != arg - A_REG_M + A_REG_N)
01724               goto fail;
01725              reg_m = user->reg;
01726              break;
01727 
01728            case AS_DEC_N:
01729              if (user->type != A_DEC_N)
01730               goto fail;
01731              if (user->reg < 2 || user->reg > 5)
01732               goto fail;
01733              reg_n = user->reg;
01734              break;
01735 
01736            case AS_INC_N:
01737              if (user->type != A_INC_N)
01738               goto fail;
01739              if (user->reg < 2 || user->reg > 5)
01740               goto fail;
01741              reg_n = user->reg;
01742              break;
01743 
01744            case AS_IND_N:
01745              if (user->type != A_IND_N)
01746               goto fail;
01747              if (user->reg < 2 || user->reg > 5)
01748               goto fail;
01749              reg_n = user->reg;
01750              break;
01751 
01752            case AS_PMOD_N:
01753              if (user->type != AX_PMOD_N)
01754               goto fail;
01755              if (user->reg < 2 || user->reg > 5)
01756               goto fail;
01757              reg_n = user->reg;
01758              break;
01759 
01760            case AX_INC_N:
01761              if (user->type != A_INC_N)
01762               goto fail;
01763              if (user->reg < 4 || user->reg > 5)
01764               goto fail;
01765              reg_n = user->reg;
01766              break;
01767 
01768            case AX_IND_N:
01769              if (user->type != A_IND_N)
01770               goto fail;
01771              if (user->reg < 4 || user->reg > 5)
01772               goto fail;
01773              reg_n = user->reg;
01774              break;
01775 
01776            case AX_PMOD_N:
01777              if (user->type != AX_PMOD_N)
01778               goto fail;
01779              if (user->reg < 4 || user->reg > 5)
01780               goto fail;
01781              reg_n = user->reg;
01782              break;
01783 
01784            case AXY_INC_N:
01785              if (user->type != A_INC_N)
01786               goto fail;
01787              if ((user->reg < 4 || user->reg > 5)
01788                 && (user->reg < 0 || user->reg > 1))
01789               goto fail;
01790              reg_n = user->reg;
01791              break;
01792 
01793            case AXY_IND_N:
01794              if (user->type != A_IND_N)
01795               goto fail;
01796              if ((user->reg < 4 || user->reg > 5)
01797                 && (user->reg < 0 || user->reg > 1))
01798               goto fail;
01799              reg_n = user->reg;
01800              break;
01801 
01802            case AXY_PMOD_N:
01803              if (user->type != AX_PMOD_N)
01804               goto fail;
01805              if ((user->reg < 4 || user->reg > 5)
01806                 && (user->reg < 0 || user->reg > 1))
01807               goto fail;
01808              reg_n = user->reg;
01809              break;
01810 
01811            case AY_INC_N:
01812              if (user->type != A_INC_N)
01813               goto fail;
01814              if (user->reg < 6 || user->reg > 7)
01815               goto fail;
01816              reg_n = user->reg;
01817              break;
01818 
01819            case AY_IND_N:
01820              if (user->type != A_IND_N)
01821               goto fail;
01822              if (user->reg < 6 || user->reg > 7)
01823               goto fail;
01824              reg_n = user->reg;
01825              break;
01826 
01827            case AY_PMOD_N:
01828              if (user->type != AY_PMOD_N)
01829               goto fail;
01830              if (user->reg < 6 || user->reg > 7)
01831               goto fail;
01832              reg_n = user->reg;
01833              break;
01834 
01835            case AYX_INC_N:
01836              if (user->type != A_INC_N)
01837               goto fail;
01838              if ((user->reg < 6 || user->reg > 7)
01839                 && (user->reg < 2 || user->reg > 3))
01840               goto fail;
01841              reg_n = user->reg;
01842              break;
01843 
01844            case AYX_IND_N:
01845              if (user->type != A_IND_N)
01846               goto fail;
01847              if ((user->reg < 6 || user->reg > 7)
01848                 && (user->reg < 2 || user->reg > 3))
01849               goto fail;
01850              reg_n = user->reg;
01851              break;
01852 
01853            case AYX_PMOD_N:
01854              if (user->type != AY_PMOD_N)
01855               goto fail;
01856              if ((user->reg < 6 || user->reg > 7)
01857                 && (user->reg < 2 || user->reg > 3))
01858               goto fail;
01859              reg_n = user->reg;
01860              break;
01861 
01862            case DSP_REG_A_M:
01863              if (user->type != DSP_REG_N)
01864               goto fail;
01865              if (user->reg != A_A0_NUM
01866                 && user->reg != A_A1_NUM)
01867               goto fail;
01868              reg_m = user->reg;
01869              break;
01870 
01871            case DSP_REG_AX:
01872              if (user->type != DSP_REG_N)
01873               goto fail;
01874              switch (user->reg)
01875               {
01876               case A_A0_NUM:
01877                 reg_x = 0;
01878                 break;
01879               case A_A1_NUM:
01880                 reg_x = 2;
01881                 break;
01882               case A_X0_NUM:
01883                 reg_x = 1;
01884                 break;
01885               case A_X1_NUM:
01886                 reg_x = 3;
01887                 break;
01888               default:
01889                 goto fail;
01890               }
01891              break;
01892 
01893            case DSP_REG_XY:
01894              if (user->type != DSP_REG_N)
01895               goto fail;
01896              switch (user->reg)
01897               {
01898               case A_X0_NUM:
01899                 reg_x = 0;
01900                 break;
01901               case A_X1_NUM:
01902                 reg_x = 2;
01903                 break;
01904               case A_Y0_NUM:
01905                 reg_x = 1;
01906                 break;
01907               case A_Y1_NUM:
01908                 reg_x = 3;
01909                 break;
01910               default:
01911                 goto fail;
01912               }
01913              break;
01914 
01915            case DSP_REG_AY:
01916              if (user->type != DSP_REG_N)
01917               goto fail;
01918              switch (user->reg)
01919               {
01920               case A_A0_NUM:
01921                 reg_y = 0;
01922                 break;
01923               case A_A1_NUM:
01924                 reg_y = 1;
01925                 break;
01926               case A_Y0_NUM:
01927                 reg_y = 2;
01928                 break;
01929               case A_Y1_NUM:
01930                 reg_y = 3;
01931                 break;
01932               default:
01933                 goto fail;
01934               }
01935              break;
01936 
01937            case DSP_REG_YX:
01938              if (user->type != DSP_REG_N)
01939               goto fail;
01940              switch (user->reg)
01941               {
01942               case A_Y0_NUM:
01943                 reg_y = 0;
01944                 break;
01945               case A_Y1_NUM:
01946                 reg_y = 1;
01947                 break;
01948               case A_X0_NUM:
01949                 reg_y = 2;
01950                 break;
01951               case A_X1_NUM:
01952                 reg_y = 3;
01953                 break;
01954               default:
01955                 goto fail;
01956               }
01957              break;
01958 
01959            case DSP_REG_X:
01960              if (user->type != DSP_REG_N)
01961               goto fail;
01962              switch (user->reg)
01963               {
01964               case A_X0_NUM:
01965                 reg_x = 0;
01966                 break;
01967               case A_X1_NUM:
01968                 reg_x = 1;
01969                 break;
01970               case A_A0_NUM:
01971                 reg_x = 2;
01972                 break;
01973               case A_A1_NUM:
01974                 reg_x = 3;
01975                 break;
01976               default:
01977                 goto fail;
01978               }
01979              break;
01980 
01981            case DSP_REG_Y:
01982              if (user->type != DSP_REG_N)
01983               goto fail;
01984              switch (user->reg)
01985               {
01986               case A_Y0_NUM:
01987                 reg_y = 0;
01988                 break;
01989               case A_Y1_NUM:
01990                 reg_y = 1;
01991                 break;
01992               case A_M0_NUM:
01993                 reg_y = 2;
01994                 break;
01995               case A_M1_NUM:
01996                 reg_y = 3;
01997                 break;
01998               default:
01999                 goto fail;
02000               }
02001              break;
02002 
02003            case DSP_REG_E:
02004              if (user->type != DSP_REG_N)
02005               goto fail;
02006              switch (user->reg)
02007               {
02008               case A_X0_NUM:
02009                 reg_efg = 0 << 10;
02010                 break;
02011               case A_X1_NUM:
02012                 reg_efg = 1 << 10;
02013                 break;
02014               case A_Y0_NUM:
02015                 reg_efg = 2 << 10;
02016                 break;
02017               case A_A1_NUM:
02018                 reg_efg = 3 << 10;
02019                 break;
02020               default:
02021                 goto fail;
02022               }
02023              break;
02024 
02025            case DSP_REG_F:
02026              if (user->type != DSP_REG_N)
02027               goto fail;
02028              switch (user->reg)
02029               {
02030               case A_Y0_NUM:
02031                 reg_efg |= 0 << 8;
02032                 break;
02033               case A_Y1_NUM:
02034                 reg_efg |= 1 << 8;
02035                 break;
02036               case A_X0_NUM:
02037                 reg_efg |= 2 << 8;
02038                 break;
02039               case A_A1_NUM:
02040                 reg_efg |= 3 << 8;
02041                 break;
02042               default:
02043                 goto fail;
02044               }
02045              break;
02046 
02047            case DSP_REG_G:
02048              if (user->type != DSP_REG_N)
02049               goto fail;
02050              switch (user->reg)
02051               {
02052               case A_M0_NUM:
02053                 reg_efg |= 0 << 2;
02054                 break;
02055               case A_M1_NUM:
02056                 reg_efg |= 1 << 2;
02057                 break;
02058               case A_A0_NUM:
02059                 reg_efg |= 2 << 2;
02060                 break;
02061               case A_A1_NUM:
02062                 reg_efg |= 3 << 2;
02063                 break;
02064               default:
02065                 goto fail;
02066               }
02067              break;
02068 
02069            case A_A0:
02070              if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
02071               goto fail;
02072              break;
02073            case A_X0:
02074              if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
02075               goto fail;
02076              break;
02077            case A_X1:
02078              if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
02079               goto fail;
02080              break;
02081            case A_Y0:
02082              if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
02083               goto fail;
02084              break;
02085            case A_Y1:
02086              if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
02087               goto fail;
02088              break;
02089 
02090            case F_REG_M:
02091            case D_REG_M:
02092            case X_REG_M:
02093            case V_REG_M:
02094            case FPUL_M:
02095            case FPSCR_M:
02096              /* Opcode needs rn */
02097              if (user->type != arg - F_REG_M + F_REG_N)
02098               goto fail;
02099              reg_m = user->reg;
02100              break;
02101            case DX_REG_M:
02102              if (user->type != D_REG_N && user->type != X_REG_N)
02103               goto fail;
02104              reg_m = user->reg;
02105              break;
02106            case XMTRX_M4:
02107              if (user->type != XMTRX_M4)
02108               goto fail;
02109              reg_m = 4;
02110              break;
02111 
02112            default:
02113              printf (_("unhandled %d\n"), arg);
02114              goto fail;
02115            }
02116        }
02117       if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch))
02118        goto fail;
02119       valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch);
02120       return this_try;
02121     fail:
02122       ;
02123     }
02124 
02125   return 0;
02126 }
02127 
02128 static void
02129 insert (char *where, int how, int pcrel, sh_operand_info *op)
02130 {
02131   fix_new_exp (frag_now,
02132               where - frag_now->fr_literal,
02133               2,
02134               &op->immediate,
02135               pcrel,
02136               how);
02137 }
02138 
02139 static void
02140 insert4 (char * where, int how, int pcrel, sh_operand_info * op)
02141 {
02142   fix_new_exp (frag_now,
02143               where - frag_now->fr_literal,
02144               4,
02145               & op->immediate,
02146               pcrel,
02147               how);
02148 }
02149 static void
02150 build_relax (sh_opcode_info *opcode, sh_operand_info *op)
02151 {
02152   int high_byte = target_big_endian ? 0 : 1;
02153   char *p;
02154 
02155   if (opcode->arg[0] == A_BDISP8)
02156     {
02157       int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
02158       p = frag_var (rs_machine_dependent,
02159                   md_relax_table[C (what, COND32)].rlx_length,
02160                   md_relax_table[C (what, COND8)].rlx_length,
02161                   C (what, 0),
02162                   op->immediate.X_add_symbol,
02163                   op->immediate.X_add_number,
02164                   0);
02165       p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
02166     }
02167   else if (opcode->arg[0] == A_BDISP12)
02168     {
02169       p = frag_var (rs_machine_dependent,
02170                   md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
02171                   md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
02172                   C (UNCOND_JUMP, 0),
02173                   op->immediate.X_add_symbol,
02174                   op->immediate.X_add_number,
02175                   0);
02176       p[high_byte] = (opcode->nibbles[0] << 4);
02177     }
02178 
02179 }
02180 
02181 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize.  */
02182 
02183 static char *
02184 insert_loop_bounds (char *output, sh_operand_info *operand)
02185 {
02186   char *name;
02187   symbolS *end_sym;
02188 
02189   /* Since the low byte of the opcode will be overwritten by the reloc, we
02190      can just stash the high byte into both bytes and ignore endianness.  */
02191   output[0] = 0x8c;
02192   output[1] = 0x8c;
02193   insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
02194   insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
02195 
02196   if (sh_relax)
02197     {
02198       static int count = 0;
02199 
02200       /* If the last loop insn is a two-byte-insn, it is in danger of being
02201         swapped with the insn after it.  To prevent this, create a new
02202         symbol - complete with SH_LABEL reloc - after the last loop insn.
02203         If the last loop insn is four bytes long, the symbol will be
02204         right in the middle, but four byte insns are not swapped anyways.  */
02205       /* A REPEAT takes 6 bytes.  The SH has a 32 bit address space.
02206         Hence a 9 digit number should be enough to count all REPEATs.  */
02207       name = alloca (11);
02208       sprintf (name, "_R%x", count++ & 0x3fffffff);
02209       end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
02210       /* Make this a local symbol.  */
02211 #ifdef OBJ_COFF
02212       SF_SET_LOCAL (end_sym);
02213 #endif /* OBJ_COFF */
02214       symbol_table_insert (end_sym);
02215       end_sym->sy_value = operand[1].immediate;
02216       end_sym->sy_value.X_add_number += 2;
02217       fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
02218     }
02219 
02220   output = frag_more (2);
02221   output[0] = 0x8e;
02222   output[1] = 0x8e;
02223   insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
02224   insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
02225 
02226   return frag_more (2);
02227 }
02228 
02229 /* Now we know what sort of opcodes it is, let's build the bytes.  */
02230 
02231 static unsigned int
02232 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
02233 {
02234   int index;
02235   char nbuf[8];
02236   char *output;
02237   unsigned int size = 2;
02238   int low_byte = target_big_endian ? 1 : 0;
02239   int max_index = 4;
02240 
02241   nbuf[0] = 0;
02242   nbuf[1] = 0;
02243   nbuf[2] = 0;
02244   nbuf[3] = 0;
02245   nbuf[4] = 0;
02246   nbuf[5] = 0;
02247   nbuf[6] = 0;
02248   nbuf[7] = 0;
02249 
02250   if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
02251     {
02252       output = frag_more (4);
02253       size = 4;
02254       max_index = 8;
02255     }
02256   else
02257     output = frag_more (2);
02258 
02259   for (index = 0; index < max_index; index++)
02260     {
02261       sh_nibble_type i = opcode->nibbles[index];
02262       if (i < 16)
02263        {
02264          nbuf[index] = i;
02265        }
02266       else
02267        {
02268          switch (i)
02269            {
02270            case REG_N:
02271            case REG_N_D:
02272              nbuf[index] = reg_n;
02273              break;
02274            case REG_M:
02275              nbuf[index] = reg_m;
02276              break;
02277            case SDT_REG_N:
02278              if (reg_n < 2 || reg_n > 5)
02279               as_bad (_("Invalid register: 'r%d'"), reg_n);
02280              nbuf[index] = (reg_n & 3) | 4;
02281              break;
02282            case REG_NM:
02283              nbuf[index] = reg_n | (reg_m >> 2);
02284              break;
02285            case REG_B:
02286              nbuf[index] = reg_b | 0x08;
02287              break;
02288            case REG_N_B01:
02289              nbuf[index] = reg_n | 0x01;
02290              break;
02291            case IMM0_3s:
02292              nbuf[index] |= 0x08;
02293            case IMM0_3c:
02294              insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
02295              break;
02296            case IMM0_3Us:
02297              nbuf[index] |= 0x80;
02298            case IMM0_3Uc:
02299              insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
02300              break;
02301            case DISP0_12:
02302              insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand);
02303              break;
02304            case DISP0_12BY2:
02305              insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand);
02306              break;
02307            case DISP0_12BY4:
02308              insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand);
02309              break;
02310            case DISP0_12BY8:
02311              insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand);
02312              break;
02313            case DISP1_12:
02314              insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1);
02315              break;
02316            case DISP1_12BY2:
02317              insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1);
02318              break;
02319            case DISP1_12BY4:
02320              insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1);
02321              break;
02322            case DISP1_12BY8:
02323              insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1);
02324              break;
02325            case IMM0_20_4:
02326              break;
02327            case IMM0_20:
02328              insert4 (output, BFD_RELOC_SH_DISP20, 0, operand);
02329              break;
02330            case IMM0_20BY8:
02331              insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand);
02332              break;
02333            case IMM0_4BY4:
02334              insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
02335              break;
02336            case IMM0_4BY2:
02337              insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
02338              break;
02339            case IMM0_4:
02340              insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
02341              break;
02342            case IMM1_4BY4:
02343              insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
02344              break;
02345            case IMM1_4BY2:
02346              insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
02347              break;
02348            case IMM1_4:
02349              insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
02350              break;
02351            case IMM0_8BY4:
02352              insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
02353              break;
02354            case IMM0_8BY2:
02355              insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
02356              break;
02357            case IMM0_8:
02358              insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
02359              break;
02360            case IMM1_8BY4:
02361              insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
02362              break;
02363            case IMM1_8BY2:
02364              insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
02365              break;
02366            case IMM1_8:
02367              insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
02368              break;
02369            case PCRELIMM_8BY4:
02370              insert (output, BFD_RELOC_SH_PCRELIMM8BY4,
02371                     operand->type != A_DISP_PC_ABS, operand);
02372              break;
02373            case PCRELIMM_8BY2:
02374              insert (output, BFD_RELOC_SH_PCRELIMM8BY2,
02375                     operand->type != A_DISP_PC_ABS, operand);
02376              break;
02377            case REPEAT:
02378              output = insert_loop_bounds (output, operand);
02379              nbuf[index] = opcode->nibbles[3];
02380              operand += 2;
02381              break;
02382            default:
02383              printf (_("failed for %d\n"), i);
02384            }
02385        }
02386     }
02387   if (!target_big_endian)
02388     {
02389       output[1] = (nbuf[0] << 4) | (nbuf[1]);
02390       output[0] = (nbuf[2] << 4) | (nbuf[3]);
02391     }
02392   else
02393     {
02394       output[0] = (nbuf[0] << 4) | (nbuf[1]);
02395       output[1] = (nbuf[2] << 4) | (nbuf[3]);
02396     }
02397   if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
02398     {
02399       if (!target_big_endian)
02400        {
02401          output[3] = (nbuf[4] << 4) | (nbuf[5]);
02402          output[2] = (nbuf[6] << 4) | (nbuf[7]);
02403        }
02404       else
02405        {
02406          output[2] = (nbuf[4] << 4) | (nbuf[5]);
02407          output[3] = (nbuf[6] << 4) | (nbuf[7]);
02408        }
02409     }
02410   return size;
02411 }
02412 
02413 /* Find an opcode at the start of *STR_P in the hash table, and set
02414    *STR_P to the first character after the last one read.  */
02415 
02416 static sh_opcode_info *
02417 find_cooked_opcode (char **str_p)
02418 {
02419   char *str = *str_p;
02420   unsigned char *op_start;
02421   unsigned char *op_end;
02422   char name[20];
02423   int nlen = 0;
02424 
02425   /* Drop leading whitespace.  */
02426   while (*str == ' ')
02427     str++;
02428 
02429   /* Find the op code end.
02430      The pre-processor will eliminate whitespace in front of
02431      any '@' after the first argument; we may be called from
02432      assemble_ppi, so the opcode might be terminated by an '@'.  */
02433   for (op_start = op_end = (unsigned char *) str;
02434        *op_end
02435        && nlen < 20
02436        && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
02437        op_end++)
02438     {
02439       unsigned char c = op_start[nlen];
02440 
02441       /* The machine independent code will convert CMP/EQ into cmp/EQ
02442         because it thinks the '/' is the end of the symbol.  Moreover,
02443         all but the first sub-insn is a parallel processing insn won't
02444         be capitalized.  Instead of hacking up the machine independent
02445         code, we just deal with it here.  */
02446       c = TOLOWER (c);
02447       name[nlen] = c;
02448       nlen++;
02449     }
02450 
02451   name[nlen] = 0;
02452   *str_p = (char *) op_end;
02453 
02454   if (nlen == 0)
02455     as_bad (_("can't find opcode "));
02456 
02457   return (sh_opcode_info *) hash_find (opcode_hash_control, name);
02458 }
02459 
02460 /* Assemble a parallel processing insn.  */
02461 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
02462 
02463 static unsigned int
02464 assemble_ppi (char *op_end, sh_opcode_info *opcode)
02465 {
02466   int movx = 0;
02467   int movy = 0;
02468   int cond = 0;
02469   int field_b = 0;
02470   char *output;
02471   int move_code;
02472   unsigned int size;
02473 
02474   for (;;)
02475     {
02476       sh_operand_info operand[3];
02477 
02478       /* Some insn ignore one or more register fields, e.g. psts machl,a0.
02479         Make sure we encode a defined insn pattern.  */
02480       reg_x = 0;
02481       reg_y = 0;
02482       reg_n = 0;
02483 
02484       if (opcode->arg[0] != A_END)
02485        op_end = get_operands (opcode, op_end, operand);
02486     try_another_opcode:
02487       opcode = get_specific (opcode, operand);
02488       if (opcode == 0)
02489        {
02490          /* Couldn't find an opcode which matched the operands.  */
02491          char *where = frag_more (2);
02492          size = 2;
02493 
02494          where[0] = 0x0;
02495          where[1] = 0x0;
02496          as_bad (_("invalid operands for opcode"));
02497          return size;
02498        }
02499 
02500       if (opcode->nibbles[0] != PPI)
02501        as_bad (_("insn can't be combined with parallel processing insn"));
02502 
02503       switch (opcode->nibbles[1])
02504        {
02505 
02506        case NOPX:
02507          if (movx)
02508            as_bad (_("multiple movx specifications"));
02509          movx = DDT_BASE;
02510          break;
02511        case NOPY:
02512          if (movy)
02513            as_bad (_("multiple movy specifications"));
02514          movy = DDT_BASE;
02515          break;
02516 
02517        case MOVX_NOPY:
02518          if (movx)
02519            as_bad (_("multiple movx specifications"));
02520          if ((reg_n < 4 || reg_n > 5)
02521              && (reg_n < 0 || reg_n > 1))
02522            as_bad (_("invalid movx address register"));
02523          if (movy && movy != DDT_BASE)
02524            as_bad (_("insn cannot be combined with non-nopy"));
02525          movx = ((((reg_n & 1) != 0) << 9)
02526                 + (((reg_n & 4) == 0) << 8)
02527                 + (reg_x << 6)
02528                 + (opcode->nibbles[2] << 4)
02529                 + opcode->nibbles[3]
02530                 + DDT_BASE);
02531          break;
02532 
02533        case MOVY_NOPX:
02534          if (movy)
02535            as_bad (_("multiple movy specifications"));
02536          if ((reg_n < 6 || reg_n > 7)
02537              && (reg_n < 2 || reg_n > 3))
02538            as_bad (_("invalid movy address register"));
02539          if (movx && movx != DDT_BASE)
02540            as_bad (_("insn cannot be combined with non-nopx"));
02541          movy = ((((reg_n & 1) != 0) << 8)
02542                 + (((reg_n & 4) == 0) << 9)
02543                 + (reg_y << 6)
02544                 + (opcode->nibbles[2] << 4)
02545                 + opcode->nibbles[3]
02546                 + DDT_BASE);
02547          break;
02548 
02549        case MOVX:
02550          if (movx)
02551            as_bad (_("multiple movx specifications"));
02552          if (movy & 0x2ac)
02553            as_bad (_("previous movy requires nopx"));
02554          if (reg_n < 4 || reg_n > 5)
02555            as_bad (_("invalid movx address register"));
02556          if (opcode->nibbles[2] & 8)
02557            {
02558              if (reg_m == A_A1_NUM)
02559               movx = 1 << 7;
02560              else if (reg_m != A_A0_NUM)
02561               as_bad (_("invalid movx dsp register"));
02562            }
02563          else
02564            {
02565              if (reg_x > 1)
02566               as_bad (_("invalid movx dsp register"));
02567              movx = reg_x << 7;
02568            }
02569          movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
02570          break;
02571 
02572        case MOVY:
02573          if (movy)
02574            as_bad (_("multiple movy specifications"));
02575          if (movx & 0x153)
02576            as_bad (_("previous movx requires nopy"));
02577          if (opcode->nibbles[2] & 8)
02578            {
02579              /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
02580                so add 8 more.  */
02581              movy = 8;
02582              if (reg_m == A_A1_NUM)
02583               movy += 1 << 6;
02584              else if (reg_m != A_A0_NUM)
02585               as_bad (_("invalid movy dsp register"));
02586            }
02587          else
02588            {
02589              if (reg_y > 1)
02590               as_bad (_("invalid movy dsp register"));
02591              movy = reg_y << 6;
02592            }
02593          if (reg_n < 6 || reg_n > 7)
02594            as_bad (_("invalid movy address register"));
02595          movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
02596          break;
02597 
02598        case PSH:
02599          if (operand[0].immediate.X_op != O_constant)
02600            as_bad (_("dsp immediate shift value not constant"));
02601          field_b = ((opcode->nibbles[2] << 12)
02602                    | (operand[0].immediate.X_add_number & 127) << 4
02603                    | reg_n);
02604          break;
02605        case PPI3NC:
02606          if (cond)
02607            {
02608              opcode++;
02609              goto try_another_opcode;
02610            }
02611          /* Fall through.  */
02612        case PPI3:
02613          if (field_b)
02614            as_bad (_("multiple parallel processing specifications"));
02615          field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
02616                    + (reg_x << 6) + (reg_y << 4) + reg_n);
02617          switch (opcode->nibbles[4])
02618            {
02619            case HEX_0:
02620            case HEX_XX00:
02621            case HEX_00YY:
02622              break;
02623            case HEX_1:
02624            case HEX_4:
02625              field_b += opcode->nibbles[4] << 4;
02626              break;
02627            default:
02628              abort ();
02629            }
02630          break;
02631        case PDC:
02632          if (cond)
02633            as_bad (_("multiple condition specifications"));
02634          cond = opcode->nibbles[2] << 8;
02635          if (*op_end)
02636            goto skip_cond_check;
02637          break;
02638        case PPIC:
02639          if (field_b)
02640            as_bad (_("multiple parallel processing specifications"));
02641          field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
02642                    + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
02643          cond = 0;
02644          switch (opcode->nibbles[4])
02645            {
02646            case HEX_0:
02647            case HEX_XX00:
02648            case HEX_00YY:
02649              break;
02650            case HEX_1:
02651            case HEX_4:
02652              field_b += opcode->nibbles[4] << 4;
02653              break;
02654            default:
02655              abort ();
02656            }
02657          break;
02658        case PMUL:
02659          if (field_b)
02660            {
02661              if ((field_b & 0xef00) == 0xa100)
02662               field_b -= 0x8100;
02663              /* pclr Dz pmuls Se,Sf,Dg */
02664              else if ((field_b & 0xff00) == 0x8d00
02665                      && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up)))
02666               {
02667                 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up);
02668                 field_b -= 0x8cf0;
02669               }
02670              else
02671               as_bad (_("insn cannot be combined with pmuls"));
02672              switch (field_b & 0xf)
02673               {
02674               case A_X0_NUM:
02675                 field_b += 0 - A_X0_NUM;
02676                 break;
02677               case A_Y0_NUM:
02678                 field_b += 1 - A_Y0_NUM;
02679                 break;
02680               case A_A0_NUM:
02681                 field_b += 2 - A_A0_NUM;
02682                 break;
02683               case A_A1_NUM:
02684                 field_b += 3 - A_A1_NUM;
02685                 break;
02686               default:
02687                 as_bad (_("bad combined pmuls output operand"));
02688               }
02689               /* Generate warning if the destination register for padd / psub
02690                  and pmuls is the same ( only for A0 or A1 ).
02691                  If the last nibble is 1010 then A0 is used in both
02692                  padd / psub and pmuls. If it is 1111 then A1 is used
02693                  as destination register in both padd / psub and pmuls.  */
02694 
02695               if ((((field_b | reg_efg) & 0x000F) == 0x000A)
02696                   || (((field_b | reg_efg) & 0x000F) == 0x000F))
02697                 as_warn (_("destination register is same for parallel insns"));
02698            }
02699          field_b += 0x4000 + reg_efg;
02700          break;
02701        default:
02702          abort ();
02703        }
02704       if (cond)
02705        {
02706          as_bad (_("condition not followed by conditionalizable insn"));
02707          cond = 0;
02708        }
02709       if (! *op_end)
02710        break;
02711     skip_cond_check:
02712       opcode = find_cooked_opcode (&op_end);
02713       if (opcode == NULL)
02714        {
02715          (as_bad
02716           (_("unrecognized characters at end of parallel processing insn")));
02717          break;
02718        }
02719     }
02720 
02721   move_code = movx | movy;
02722   if (field_b)
02723     {
02724       /* Parallel processing insn.  */
02725       unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
02726 
02727       output = frag_more (4);
02728       size = 4;
02729       if (! target_big_endian)
02730        {
02731          output[3] = ppi_code >> 8;
02732          output[2] = ppi_code;
02733        }
02734       else
02735        {
02736          output[2] = ppi_code >> 8;
02737          output[3] = ppi_code;
02738        }
02739       move_code |= 0xf800;
02740     }
02741   else
02742     {
02743       /* Just a double data transfer.  */
02744       output = frag_more (2);
02745       size = 2;
02746     }
02747   if (! target_big_endian)
02748     {
02749       output[1] = move_code >> 8;
02750       output[0] = move_code;
02751     }
02752   else
02753     {
02754       output[0] = move_code >> 8;
02755       output[1] = move_code;
02756     }
02757   return size;
02758 }
02759 
02760 /* This is the guts of the machine-dependent assembler.  STR points to a
02761    machine dependent instruction.  This function is supposed to emit
02762    the frags/bytes it assembles to.  */
02763 
02764 void
02765 md_assemble (char *str)
02766 {
02767   char *op_end;
02768   sh_operand_info operand[3];
02769   sh_opcode_info *opcode;
02770   unsigned int size = 0;
02771   char *initial_str = str;
02772 
02773 #ifdef HAVE_SH64
02774   if (sh64_isa_mode == sh64_isa_shmedia)
02775     {
02776       shmedia_md_assemble (str);
02777       return;
02778     }
02779   else
02780     {
02781       /* If we've seen pseudo-directives, make sure any emitted data or
02782         frags are marked as data.  */
02783       if (!seen_insn)
02784        {
02785          sh64_update_contents_mark (TRUE);
02786          sh64_set_contents_type (CRT_SH5_ISA16);
02787        }
02788 
02789       seen_insn = TRUE;
02790     }
02791 #endif /* HAVE_SH64 */
02792 
02793   opcode = find_cooked_opcode (&str);
02794   op_end = str;
02795 
02796   if (opcode == NULL)
02797     {
02798       /* The opcode is not in the hash table.
02799         This means we definitely have an assembly failure,
02800         but the instruction may be valid in another CPU variant.
02801         In this case emit something better than 'unknown opcode'.
02802         Search the full table in sh-opc.h to check. */
02803 
02804       char *name = initial_str;
02805       int name_length = 0;
02806       const sh_opcode_info *op;
02807       int found = 0;
02808 
02809       /* identify opcode in string */
02810       while (ISSPACE (*name))
02811        {
02812          name++;
02813        }
02814       while (!ISSPACE (name[name_length]))
02815        {
02816          name_length++;
02817        }
02818 
02819       /* search for opcode in full list */
02820       for (op = sh_table; op->name; op++)
02821        {
02822          if (strncasecmp (op->name, name, name_length) == 0
02823              && op->name[name_length] == '\0')
02824            {
02825              found = 1;
02826              break;
02827            }
02828        }
02829 
02830       if ( found )
02831        {
02832          as_bad (_("opcode not valid for this cpu variant"));
02833        }
02834       else
02835        {
02836          as_bad (_("unknown opcode"));
02837        }
02838       return;
02839     }
02840 
02841   if (sh_relax
02842       && ! seg_info (now_seg)->tc_segment_info_data.in_code)
02843     {
02844       /* Output a CODE reloc to tell the linker that the following
02845          bytes are instructions, not data.  */
02846       fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
02847               BFD_RELOC_SH_CODE);
02848       seg_info (now_seg)->tc_segment_info_data.in_code = 1;
02849     }
02850 
02851   if (opcode->nibbles[0] == PPI)
02852     {
02853       size = assemble_ppi (op_end, opcode);
02854     }
02855   else
02856     {
02857       if (opcode->arg[0] == A_BDISP12
02858          || opcode->arg[0] == A_BDISP8)
02859        {
02860          /* Since we skip get_specific here, we have to check & update
02861             valid_arch now.  */
02862          if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch))
02863            valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch);
02864          else
02865            as_bad (_("Delayed branches not available on SH1"));
02866          parse_exp (op_end + 1, &operand[0]);
02867          build_relax (opcode, &operand[0]);
02868 
02869          /* All branches are currently 16 bit.  */
02870          size = 2;
02871        }
02872       else
02873        {
02874          if (opcode->arg[0] == A_END)
02875            {
02876              /* Ignore trailing whitespace.  If there is any, it has already
02877                been compressed to a single space.  */
02878              if (*op_end == ' ')
02879               op_end++;
02880            }
02881          else
02882            {
02883              op_end = get_operands (opcode, op_end, operand);
02884            }
02885          opcode = get_specific (opcode, operand);
02886 
02887          if (opcode == 0)
02888            {
02889              /* Couldn't find an opcode which matched the operands.  */
02890              char *where = frag_more (2);
02891              size = 2;
02892 
02893              where[0] = 0x0;
02894              where[1] = 0x0;
02895              as_bad (_("invalid operands for opcode"));
02896            }
02897          else
02898            {
02899              if (*op_end)
02900               as_bad (_("excess operands: '%s'"), op_end);
02901 
02902              size = build_Mytes (opcode, operand);
02903            }
02904        }
02905     }
02906 
02907   dwarf2_emit_insn (size);
02908 }
02909 
02910 /* This routine is called each time a label definition is seen.  It
02911    emits a BFD_RELOC_SH_LABEL reloc if necessary.  */
02912 
02913 void
02914 sh_frob_label (symbolS *sym)
02915 {
02916   static fragS *last_label_frag;
02917   static int last_label_offset;
02918 
02919   if (sh_relax
02920       && seg_info (now_seg)->tc_segment_info_data.in_code)
02921     {
02922       int offset;
02923 
02924       offset = frag_now_fix ();
02925       if (frag_now != last_label_frag
02926          || offset != last_label_offset)
02927        {
02928          fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
02929          last_label_frag = frag_now;
02930          last_label_offset = offset;
02931        }
02932     }
02933 
02934   dwarf2_emit_label (sym);
02935 }
02936 
02937 /* This routine is called when the assembler is about to output some
02938    data.  It emits a BFD_RELOC_SH_DATA reloc if necessary.  */
02939 
02940 void
02941 sh_flush_pending_output (void)
02942 {
02943   if (sh_relax
02944       && seg_info (now_seg)->tc_segment_info_data.in_code)
02945     {
02946       fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
02947               BFD_RELOC_SH_DATA);
02948       seg_info (now_seg)->tc_segment_info_data.in_code = 0;
02949     }
02950 }
02951 
02952 symbolS *
02953 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
02954 {
02955   return 0;
02956 }
02957 
02958 /* Various routines to kill one day.  */
02959 /* Equal to MAX_PRECISION in atof-ieee.c.  */
02960 #define MAX_LITTLENUMS 6
02961 
02962 /* Turn a string in input_line_pointer into a floating point constant
02963    of type TYPE, and store the appropriate bytes in *LITP.  The number
02964    of LITTLENUMS emitted is stored in *SIZEP .  An error message is
02965    returned, or NULL on OK.  */
02966 
02967 char *
02968 md_atof (int type, char *litP, int *sizeP)
02969 {
02970   int prec;
02971   LITTLENUM_TYPE words[4];
02972   char *t;
02973   int i;
02974 
02975   switch (type)
02976     {
02977     case 'f':
02978       prec = 2;
02979       break;
02980 
02981     case 'd':
02982       prec = 4;
02983       break;
02984 
02985     default:
02986       *sizeP = 0;
02987       return _("bad call to md_atof");
02988     }
02989 
02990   t = atof_ieee (input_line_pointer, type, words);
02991   if (t)
02992     input_line_pointer = t;
02993 
02994   *sizeP = prec * 2;
02995 
02996   if (! target_big_endian)
02997     {
02998       for (i = prec - 1; i >= 0; i--)
02999        {
03000          md_number_to_chars (litP, (valueT) words[i], 2);
03001          litP += 2;
03002        }
03003     }
03004   else
03005     {
03006       for (i = 0; i < prec; i++)
03007        {
03008          md_number_to_chars (litP, (valueT) words[i], 2);
03009          litP += 2;
03010        }
03011     }
03012 
03013   return NULL;
03014 }
03015 
03016 /* Handle the .uses pseudo-op.  This pseudo-op is used just before a
03017    call instruction.  It refers to a label of the instruction which
03018    loads the register which the call uses.  We use it to generate a
03019    special reloc for the linker.  */
03020 
03021 static void
03022 s_uses (int ignore ATTRIBUTE_UNUSED)
03023 {
03024   expressionS ex;
03025 
03026   if (! sh_relax)
03027     as_warn (_(".uses pseudo-op seen when not relaxing"));
03028 
03029   expression (&ex);
03030 
03031   if (ex.X_op != O_symbol || ex.X_add_number != 0)
03032     {
03033       as_bad (_("bad .uses format"));
03034       ignore_rest_of_line ();
03035       return;
03036     }
03037 
03038   fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
03039 
03040   demand_empty_rest_of_line ();
03041 }
03042 
03043 enum options
03044 {
03045   OPTION_RELAX = OPTION_MD_BASE,
03046   OPTION_BIG,
03047   OPTION_LITTLE,
03048   OPTION_SMALL,
03049   OPTION_DSP,
03050   OPTION_ISA,
03051   OPTION_RENESAS,
03052   OPTION_ALLOW_REG_PREFIX,
03053 #ifdef HAVE_SH64
03054   OPTION_ABI,
03055   OPTION_NO_MIX,
03056   OPTION_SHCOMPACT_CONST_CRANGE,
03057   OPTION_NO_EXPAND,
03058   OPTION_PT32,
03059 #endif
03060   OPTION_DUMMY  /* Not used.  This is just here to make it easy to add and subtract options from this enum.  */
03061 };
03062 
03063 const char *md_shortopts = "";
03064 struct option md_longopts[] =
03065 {
03066   {"relax", no_argument, NULL, OPTION_RELAX},
03067   {"big", no_argument, NULL, OPTION_BIG},
03068   {"little", no_argument, NULL, OPTION_LITTLE},
03069   /* The next two switches are here because the
03070      generic parts of the linker testsuite uses them.  */
03071   {"EB", no_argument, NULL, OPTION_BIG},
03072   {"EL", no_argument, NULL, OPTION_LITTLE},
03073   {"small", no_argument, NULL, OPTION_SMALL},
03074   {"dsp", no_argument, NULL, OPTION_DSP},
03075   {"isa", required_argument, NULL, OPTION_ISA},
03076   {"renesas", no_argument, NULL, OPTION_RENESAS},
03077   {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX},
03078 
03079 #ifdef HAVE_SH64
03080   {"abi",                    required_argument, NULL, OPTION_ABI},
03081   {"no-mix",                 no_argument, NULL, OPTION_NO_MIX},
03082   {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
03083   {"no-expand",              no_argument, NULL, OPTION_NO_EXPAND},
03084   {"expand-pt32",            no_argument, NULL, OPTION_PT32},
03085 #endif /* HAVE_SH64 */
03086 
03087   {NULL, no_argument, NULL, 0}
03088 };
03089 size_t md_longopts_size = sizeof (md_longopts);
03090 
03091 int
03092 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
03093 {
03094   switch (c)
03095     {
03096     case OPTION_RELAX:
03097       sh_relax = 1;
03098       break;
03099 
03100     case OPTION_BIG:
03101       target_big_endian = 1;
03102       break;
03103 
03104     case OPTION_LITTLE:
03105       target_big_endian = 0;
03106       break;
03107 
03108     case OPTION_SMALL:
03109       sh_small = 1;
03110       break;
03111 
03112     case OPTION_DSP:
03113       preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
03114       break;
03115 
03116     case OPTION_RENESAS:
03117       dont_adjust_reloc_32 = 1;
03118       break;
03119 
03120     case OPTION_ALLOW_REG_PREFIX:
03121       allow_dollar_register_prefix = 1;
03122       break;
03123 
03124     case OPTION_ISA:
03125       if (strcasecmp (arg, "dsp") == 0)
03126        preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
03127       else if (strcasecmp (arg, "fp") == 0)
03128        preset_target_arch = arch_sh_up & ~arch_sh_has_dsp;
03129       else if (strcasecmp (arg, "any") == 0)
03130        preset_target_arch = arch_sh_up;
03131 #ifdef HAVE_SH64
03132       else if (strcasecmp (arg, "shmedia") == 0)
03133        {
03134          if (sh64_isa_mode == sh64_isa_shcompact)
03135            as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
03136          sh64_isa_mode = sh64_isa_shmedia;
03137        }
03138       else if (strcasecmp (arg, "shcompact") == 0)
03139        {
03140          if (sh64_isa_mode == sh64_isa_shmedia)
03141            as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
03142          if (sh64_abi == sh64_abi_64)
03143            as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
03144          sh64_isa_mode = sh64_isa_shcompact;
03145        }
03146 #endif /* HAVE_SH64 */
03147       else
03148        {
03149          extern const bfd_arch_info_type bfd_sh_arch;
03150          bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
03151 
03152          preset_target_arch = 0;
03153          for (; bfd_arch; bfd_arch=bfd_arch->next)
03154            {
03155              int len = strlen(bfd_arch->printable_name);
03156              
03157              if (bfd_arch->mach == bfd_mach_sh5)
03158               continue;
03159              
03160              if (strncasecmp (bfd_arch->printable_name, arg, len) != 0)
03161               continue;
03162 
03163              if (arg[len] == '\0')
03164               preset_target_arch =
03165                 sh_get_arch_from_bfd_mach (bfd_arch->mach);
03166              else if (strcasecmp(&arg[len], "-up") == 0)
03167               preset_target_arch =
03168                 sh_get_arch_up_from_bfd_mach (bfd_arch->mach);
03169              else
03170               continue;
03171              break;
03172            }
03173          
03174          if (!preset_target_arch)
03175            as_bad ("Invalid argument to --isa option: %s", arg);
03176        }
03177       break;
03178 
03179 #ifdef HAVE_SH64
03180     case OPTION_ABI:
03181       if (strcmp (arg, "32") == 0)
03182        {
03183          if (sh64_abi == sh64_abi_64)
03184            as_bad (_("Invalid combination: --abi=32 with --abi=64"));
03185          sh64_abi = sh64_abi_32;
03186        }
03187       else if (strcmp (arg, "64") == 0)
03188        {
03189          if (sh64_abi == sh64_abi_32)
03190            as_bad (_("Invalid combination: --abi=64 with --abi=32"));
03191          if (sh64_isa_mode == sh64_isa_shcompact)
03192            as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
03193          sh64_abi = sh64_abi_64;
03194        }
03195       else
03196        as_bad ("Invalid argument to --abi option: %s", arg);
03197       break;
03198 
03199     case OPTION_NO_MIX:
03200       sh64_mix = FALSE;
03201       break;
03202 
03203     case OPTION_SHCOMPACT_CONST_CRANGE:
03204       sh64_shcompact_const_crange = TRUE;
03205       break;
03206 
03207     case OPTION_NO_EXPAND:
03208       sh64_expand = FALSE;
03209       break;
03210 
03211     case OPTION_PT32:
03212       sh64_pt32 = TRUE;
03213       break;
03214 #endif /* HAVE_SH64 */
03215 
03216     default:
03217       return 0;
03218     }
03219 
03220   return 1;
03221 }
03222 
03223 void
03224 md_show_usage (FILE *stream)
03225 {
03226   fprintf (stream, _("\
03227 SH options:\n\
03228 --little             generate little endian code\n\
03229 --big                generate big endian code\n\
03230 --relax                     alter jump instructions for long displacements\n\
03231 --renesas            disable optimization with section symbol for\n\
03232                      compatibility with Renesas assembler.\n\
03233 --small                     align sections to 4 byte boundaries, not 16\n\
03234 --dsp                enable sh-dsp insns, and disable floating-point ISAs.\n\
03235 --allow-reg-prefix   allow '$' as a register name prefix.\n\
03236 --isa=[any           use most appropriate isa\n\
03237     | dsp               same as '-dsp'\n\
03238     | fp"));
03239   {
03240     extern const bfd_arch_info_type bfd_sh_arch;
03241     bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
03242 
03243     for (; bfd_arch; bfd_arch=bfd_arch->next)
03244       if (bfd_arch->mach != bfd_mach_sh5)
03245        {
03246          fprintf (stream, "\n    | %s", bfd_arch->printable_name);
03247          fprintf (stream, "\n    | %s-up", bfd_arch->printable_name);
03248        }
03249   }
03250   fprintf (stream, "]\n");
03251 #ifdef HAVE_SH64
03252   fprintf (stream, _("\
03253 --isa=[shmedia              set as the default instruction set for SH64\n\
03254     | SHmedia\n\
03255     | shcompact\n\
03256     | SHcompact]\n"));
03257   fprintf (stream, _("\
03258 --abi=[32|64]        set size of expanded SHmedia operands and object\n\
03259                      file type\n\
03260 --shcompact-const-crange  emit code-range descriptors for constants in\n\
03261                      SHcompact code sections\n\
03262 --no-mix             disallow SHmedia code in the same section as\n\
03263                      constants and SHcompact code\n\
03264 --no-expand          do not expand MOVI, PT, PTA or PTB instructions\n\
03265 --expand-pt32        with -abi=64, expand PT, PTA and PTB instructions\n\
03266                      to 32 bits only\n"));
03267 #endif /* HAVE_SH64 */
03268 }
03269 
03270 /* This struct is used to pass arguments to sh_count_relocs through
03271    bfd_map_over_sections.  */
03272 
03273 struct sh_count_relocs
03274 {
03275   /* Symbol we are looking for.  */
03276   symbolS *sym;
03277   /* Count of relocs found.  */
03278   int count;
03279 };
03280 
03281 /* Count the number of fixups in a section which refer to a particular
03282    symbol.  This is called via bfd_map_over_sections.  */
03283 
03284 static void
03285 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data)
03286 {
03287   struct sh_count_relocs *info = (struct sh_count_relocs *) data;
03288   segment_info_type *seginfo;
03289   symbolS *sym;
03290   fixS *fix;
03291 
03292   seginfo = seg_info (sec);
03293   if (seginfo == NULL)
03294     return;
03295 
03296   sym = info->sym;
03297   for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
03298     {
03299       if (fix->fx_addsy == sym)
03300        {
03301          ++info->count;
03302          fix->fx_tcbit = 1;
03303        }
03304     }
03305 }
03306 
03307 /* Handle the count relocs for a particular section.
03308    This is called via bfd_map_over_sections.  */
03309 
03310 static void
03311 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec,
03312                void *ignore ATTRIBUTE_UNUSED)
03313 {
03314   segment_info_type *seginfo;
03315   fixS *fix;
03316 
03317   seginfo = seg_info (sec);
03318   if (seginfo == NULL)
03319     return;
03320 
03321   for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
03322     {
03323       symbolS *sym;
03324 
03325       sym = fix->fx_addsy;
03326       /* Check for a local_symbol.  */
03327       if (sym && sym->bsym == NULL)
03328        {
03329          struct local_symbol *ls = (struct local_symbol *)sym;
03330          /* See if it's been converted.  If so, canonicalize.  */
03331          if (local_symbol_converted_p (ls))
03332            fix->fx_addsy = local_symbol_get_real_symbol (ls);
03333        }
03334     }
03335 
03336   for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
03337     {
03338       symbolS *sym;
03339       bfd_vma val;
03340       fixS *fscan;
03341       struct sh_count_relocs info;
03342 
03343       if (fix->fx_r_type != BFD_RELOC_SH_USES)
03344        continue;
03345 
03346       /* The BFD_RELOC_SH_USES reloc should refer to a defined local
03347         symbol in the same section.  */
03348       sym = fix->fx_addsy;
03349       if (sym == NULL
03350          || fix->fx_subsy != NULL
03351          || fix->fx_addnumber != 0
03352          || S_GET_SEGMENT (sym) != sec
03353          || S_IS_EXTERNAL (sym))
03354        {
03355          as_warn_where (fix->fx_file, fix->fx_line,
03356                       _(".uses does not refer to a local symbol in the same section"));
03357          continue;
03358        }
03359 
03360       /* Look through the fixups again, this time looking for one
03361         at the same location as sym.  */
03362       val = S_GET_VALUE (sym);
03363       for (fscan = seginfo->fix_root;
03364           fscan != NULL;
03365           fscan = fscan->fx_next)
03366        if (val == fscan->fx_frag->fr_address + fscan->fx_where
03367            && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
03368            && fscan->fx_r_type != BFD_RELOC_SH_CODE
03369            && fscan->fx_r_type != BFD_RELOC_SH_DATA
03370            && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
03371          break;
03372       if (fscan == NULL)
03373        {
03374          as_warn_where (fix->fx_file, fix->fx_line,
03375                       _("can't find fixup pointed to by .uses"));
03376          continue;
03377        }
03378 
03379       if (fscan->fx_tcbit)
03380        {
03381          /* We've already done this one.  */
03382          continue;
03383        }
03384 
03385       /* The variable fscan should also be a fixup to a local symbol
03386         in the same section.  */
03387       sym = fscan->fx_addsy;
03388       if (sym == NULL
03389          || fscan->fx_subsy != NULL
03390          || fscan->fx_addnumber != 0
03391          || S_GET_SEGMENT (sym) != sec
03392          || S_IS_EXTERNAL (sym))
03393        {
03394          as_warn_where (fix->fx_file, fix->fx_line,
03395                       _(".uses target does not refer to a local symbol in the same section"));
03396          continue;
03397        }
03398 
03399       /* Now we look through all the fixups of all the sections,
03400         counting the number of times we find a reference to sym.  */
03401       info.sym = sym;
03402       info.count = 0;
03403       bfd_map_over_sections (stdoutput, sh_count_relocs, &info);
03404 
03405       if (info.count < 1)
03406        abort ();
03407 
03408       /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
03409         We have already adjusted the value of sym to include the
03410         fragment address, so we undo that adjustment here.  */
03411       subseg_change (sec, 0);
03412       fix_new (fscan->fx_frag,
03413               S_GET_VALUE (sym) - fscan->fx_frag->fr_address,
03414               4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
03415     }
03416 }
03417 
03418 /* This function is called after the symbol table has been completed,
03419    but before the relocs or section contents have been written out.
03420    If we have seen any .uses pseudo-ops, they point to an instruction
03421    which loads a register with the address of a function.  We look
03422    through the fixups to find where the function address is being
03423    loaded from.  We then generate a COUNT reloc giving the number of
03424    times that function address is referred to.  The linker uses this
03425    information when doing relaxing, to decide when it can eliminate
03426    the stored function address entirely.  */
03427 
03428 void
03429 sh_frob_file (void)
03430 {
03431 #ifdef HAVE_SH64
03432   shmedia_frob_file_before_adjust ();
03433 #endif
03434 
03435   if (! sh_relax)
03436     return;
03437 
03438   bfd_map_over_sections (stdoutput, sh_frob_section, NULL);
03439 }
03440 
03441 /* Called after relaxing.  Set the correct sizes of the fragments, and
03442    create relocs so that md_apply_fix will fill in the correct values.  */
03443 
03444 void
03445 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP)
03446 {
03447   int donerelax = 0;
03448 
03449   switch (fragP->fr_subtype)
03450     {
03451     case C (COND_JUMP, COND8):
03452     case C (COND_JUMP_DELAY, COND8):
03453       subseg_change (seg, 0);
03454       fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
03455               1, BFD_RELOC_SH_PCDISP8BY2);
03456       fragP->fr_fix += 2;
03457       fragP->fr_var = 0;
03458       break;
03459 
03460     case C (UNCOND_JUMP, UNCOND12):
03461       subseg_change (seg, 0);
03462       fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
03463               1, BFD_RELOC_SH_PCDISP12BY2);
03464       fragP->fr_fix += 2;
03465       fragP->fr_var = 0;
03466       break;
03467 
03468     case C (UNCOND_JUMP, UNCOND32):
03469     case C (UNCOND_JUMP, UNDEF_WORD_DISP):
03470       if (fragP->fr_symbol == NULL)
03471        as_bad_where (fragP->fr_file, fragP->fr_line,
03472                     _("displacement overflows 12-bit field"));
03473       else if (S_IS_DEFINED (fragP->fr_symbol))
03474        as_bad_where (fragP->fr_file, fragP->fr_line,
03475                     _("displacement to defined symbol %s overflows 12-bit field"),
03476                     S_GET_NAME (fragP->fr_symbol));
03477       else
03478        as_bad_where (fragP->fr_file, fragP->fr_line,
03479                     _("displacement to undefined symbol %s overflows 12-bit field"),
03480                     S_GET_NAME (fragP->fr_symbol));
03481       /* Stabilize this frag, so we don't trip an assert.  */
03482       fragP->fr_fix += fragP->fr_var;
03483       fragP->fr_var = 0;
03484       break;
03485 
03486     case C (COND_JUMP, COND12):
03487     case C (COND_JUMP_DELAY, COND12):
03488       /* A bcond won't fit, so turn it into a b!cond; bra disp; nop.  */
03489       /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
03490         was due to gas incorrectly relaxing an out-of-range conditional
03491         branch with delay slot.  It turned:
03492                      bf.s    L6              (slot mov.l   r12,@(44,r0))
03493          into:
03494 
03495 2c:  8f 01 a0 8b     bf.s    32 <_main+32>   (slot bra       L6)
03496 30:  00 09           nop
03497 32:  10 cb           mov.l   r12,@(44,r0)
03498          Therefore, branches with delay slots have to be handled
03499         differently from ones without delay slots.  */
03500       {
03501        unsigned char *buffer =
03502          (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
03503        int highbyte = target_big_endian ? 0 : 1;
03504        int lowbyte = target_big_endian ? 1 : 0;
03505        int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
03506 
03507        /* Toggle the true/false bit of the bcond.  */
03508        buffer[highbyte] ^= 0x2;
03509 
03510        /* If this is a delayed branch, we may not put the bra in the
03511           slot.  So we change it to a non-delayed branch, like that:
03512           b! cond slot_label; bra disp; slot_label: slot_insn
03513           ??? We should try if swapping the conditional branch and
03514           its delay-slot insn already makes the branch reach.  */
03515 
03516        /* Build a relocation to six / four bytes farther on.  */
03517        subseg_change (seg, 0);
03518        fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg),
03519                fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
03520                1, BFD_RELOC_SH_PCDISP8BY2);
03521 
03522        /* Set up a jump instruction.  */
03523        buffer[highbyte + 2] = 0xa0;
03524        buffer[lowbyte + 2] = 0;
03525        fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
03526                fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
03527 
03528        if (delay)
03529          {
03530            buffer[highbyte] &= ~0x4; /* Removes delay slot from branch.  */
03531            fragP->fr_fix += 4;
03532          }
03533        else
03534          {
03535            /* Fill in a NOP instruction.  */
03536            buffer[highbyte + 4] = 0x0;
03537            buffer[lowbyte + 4] = 0x9;
03538 
03539            fragP->fr_fix += 6;
03540          }
03541        fragP->fr_var = 0;
03542        donerelax = 1;
03543       }
03544       break;
03545 
03546     case C (COND_JUMP, COND32):
03547     case C (COND_JUMP_DELAY, COND32):
03548     case C (COND_JUMP, UNDEF_WORD_DISP):
03549     case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
03550       if (fragP->fr_symbol == NULL)
03551        as_bad_where (fragP->fr_file, fragP->fr_line,
03552                     _("displacement overflows 8-bit field"));
03553       else if (S_IS_DEFINED (fragP->fr_symbol))
03554        as_bad_where (fragP->fr_file, fragP->fr_line,
03555                     _("displacement to defined symbol %s overflows 8-bit field"),
03556                     S_GET_NAME (fragP->fr_symbol));
03557       else
03558        as_bad_where (fragP->fr_file, fragP->fr_line,
03559                     _("displacement to undefined symbol %s overflows 8-bit field "),
03560                     S_GET_NAME (fragP->fr_symbol));
03561       /* Stabilize this frag, so we don't trip an assert.  */
03562       fragP->fr_fix += fragP->fr_var;
03563       fragP->fr_var = 0;
03564       break;
03565 
03566     default:
03567 #ifdef HAVE_SH64
03568       shmedia_md_convert_frag (headers, seg, fragP, TRUE);
03569 #else
03570       abort ();
03571 #endif
03572     }
03573 
03574   if (donerelax && !sh_relax)
03575     as_warn_where (fragP->fr_file, fragP->fr_line,
03576                  _("overflow in branch to %s; converted into longer instruction sequence"),
03577                  (fragP->fr_symbol != NULL
03578                   ? S_GET_NAME (fragP->fr_symbol)
03579                   : ""));
03580 }
03581 
03582 valueT
03583 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size)
03584 {
03585 #ifdef OBJ_ELF
03586   return size;
03587 #else /* ! OBJ_ELF */
03588   return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
03589          & (-1 << bfd_get_section_alignment (stdoutput, seg)));
03590 #endif /* ! OBJ_ELF */
03591 }
03592 
03593 /* This static variable is set by s_uacons to tell sh_cons_align that
03594    the expression does not need to be aligned.  */
03595 
03596 static int sh_no_align_cons = 0;
03597 
03598 /* This handles the unaligned space allocation pseudo-ops, such as
03599    .uaword.  .uaword is just like .word, but the value does not need
03600    to be aligned.  */
03601 
03602 static void
03603 s_uacons (int bytes)
03604 {
03605   /* Tell sh_cons_align not to align this value.  */
03606   sh_no_align_cons = 1;
03607   cons (bytes);
03608 }
03609 
03610 /* If a .word, et. al., pseud-op is seen, warn if the value is not
03611    aligned correctly.  Note that this can cause warnings to be issued
03612    when assembling initialized structured which were declared with the
03613    packed attribute.  FIXME: Perhaps we should require an option to
03614    enable this warning?  */
03615 
03616 void
03617 sh_cons_align (int nbytes)
03618 {
03619   int nalign;
03620   char *p;
03621 
03622   if (sh_no_align_cons)
03623     {
03624       /* This is an unaligned pseudo-op.  */
03625       sh_no_align_cons = 0;
03626       return;
03627     }
03628 
03629   nalign = 0;
03630   while ((nbytes & 1) == 0)
03631     {
03632       ++nalign;
03633       nbytes >>= 1;
03634     }
03635 
03636   if (nalign == 0)
03637     return;
03638 
03639   if (now_seg == absolute_section)
03640     {
03641       if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
03642        as_warn (_("misaligned data"));
03643       return;
03644     }
03645 
03646   p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
03647               (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
03648 
03649   record_alignment (now_seg, nalign);
03650 }
03651 
03652 /* When relaxing, we need to output a reloc for any .align directive
03653    that requests alignment to a four byte boundary or larger.  This is
03654    also where we check for misaligned data.  */
03655 
03656 void
03657 sh_handle_align (fragS *frag)
03658 {
03659   int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
03660 
03661   if (frag->fr_type == rs_align_code)
03662     {
03663       static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
03664       static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
03665 
03666       char *p = frag->fr_literal + frag->fr_fix;
03667 
03668       if (bytes & 1)
03669        {
03670          *p++ = 0;
03671          bytes--;
03672          frag->fr_fix += 1;
03673        }
03674 
03675       if (target_big_endian)
03676        {
03677          memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
03678          frag->fr_var = sizeof big_nop_pattern;
03679        }
03680       else
03681        {
03682          memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
03683          frag->fr_var = sizeof little_nop_pattern;
03684        }
03685     }
03686   else if (frag->fr_type == rs_align_test)
03687     {
03688       if (bytes != 0)
03689        as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
03690     }
03691 
03692   if (sh_relax
03693       && (frag->fr_type == rs_align
03694          || frag->fr_type == rs_align_code)
03695       && frag->fr_address + frag->fr_fix > 0
03696       && frag->fr_offset > 1
03697       && now_seg != bss_section)
03698     fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
03699             BFD_RELOC_SH_ALIGN);
03700 }
03701 
03702 /* See whether the relocation should be resolved locally.  */
03703 
03704 static bfd_boolean
03705 sh_local_pcrel (fixS *fix)
03706 {
03707   return (! sh_relax
03708          && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
03709              || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
03710              || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
03711              || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
03712              || fix->fx_r_type == BFD_RELOC_8_PCREL
03713              || fix->fx_r_type == BFD_RELOC_SH_SWITCH16
03714              || fix->fx_r_type == BFD_RELOC_SH_SWITCH32));
03715 }
03716 
03717 /* See whether we need to force a relocation into the output file.
03718    This is used to force out switch and PC relative relocations when
03719    relaxing.  */
03720 
03721 int
03722 sh_force_relocation (fixS *fix)
03723 {
03724   /* These relocations can't make it into a DSO, so no use forcing
03725      them for global symbols.  */
03726   if (sh_local_pcrel (fix))
03727     return 0;
03728 
03729   /* Make sure some relocations get emitted.  */
03730   if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START
03731       || fix->fx_r_type == BFD_RELOC_SH_LOOP_END
03732       || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32
03733       || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32
03734       || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32
03735       || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32
03736       || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32
03737       || generic_force_reloc (fix))
03738     return 1;
03739 
03740   if (! sh_relax)
03741     return 0;
03742 
03743   return (fix->fx_pcrel
03744          || SWITCH_TABLE (fix)
03745          || fix->fx_r_type == BFD_RELOC_SH_COUNT
03746          || fix->fx_r_type == BFD_RELOC_SH_ALIGN
03747          || fix->fx_r_type == BFD_RELOC_SH_CODE
03748          || fix->fx_r_type == BFD_RELOC_SH_DATA
03749 #ifdef HAVE_SH64
03750          || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE
03751 #endif
03752          || fix->fx_r_type == BFD_RELOC_SH_LABEL);
03753 }
03754 
03755 #ifdef OBJ_ELF
03756 bfd_boolean
03757 sh_fix_adjustable (fixS *fixP)
03758 {
03759   if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL
03760       || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
03761       || fixP->fx_r_type == BFD_RELOC_SH_GOTPC
03762       || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32)
03763       || fixP->fx_r_type == BFD_RELOC_RVA)
03764     return 0;
03765 
03766   /* We need the symbol name for the VTABLE entries */
03767   if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
03768       || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
03769     return 0;
03770 
03771   return 1;
03772 }
03773 
03774 void
03775 sh_elf_final_processing (void)
03776 {
03777   int val;
03778 
03779   /* Set file-specific flags to indicate if this code needs
03780      a processor with the sh-dsp / sh2e ISA to execute.  */
03781 #ifdef HAVE_SH64
03782   /* SH5 and above don't know about the valid_arch arch_sh* bits defined
03783      in sh-opc.h, so check SH64 mode before checking valid_arch.  */
03784   if (sh64_isa_mode != sh64_isa_unspecified)
03785     val = EF_SH5;
03786   else
03787 #elif defined TARGET_SYMBIAN
03788     if (1)
03789       {
03790        extern int sh_symbian_find_elf_flags (unsigned int);
03791 
03792        val = sh_symbian_find_elf_flags (valid_arch);
03793       }
03794     else
03795 #endif /* HAVE_SH64 */
03796     val = sh_find_elf_flags (valid_arch);
03797 
03798   elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
03799   elf_elfheader (stdoutput)->e_flags |= val;
03800 }
03801 #endif
03802 
03803 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
03804    assembly-time value.  If we're generating a reloc for FIXP,
03805    see whether the addend should be stored in-place or whether
03806    it should be in an ELF r_addend field.  */
03807 
03808 static void
03809 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size)
03810 {
03811   reloc_howto_type *howto;
03812 
03813   if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
03814     {
03815       howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
03816       if (howto && !howto->partial_inplace)
03817        {
03818          fixP->fx_addnumber = val;
03819          return;
03820        }
03821     }
03822   md_number_to_chars (buf, val, size);
03823 }
03824 
03825 /* Apply a fixup to the object file.  */
03826 
03827 void
03828 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
03829 {
03830   char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
03831   int lowbyte = target_big_endian ? 1 : 0;
03832   int highbyte = target_big_endian ? 0 : 1;
03833   long val = (long) *valP;
03834   long max, min;
03835   int shift;
03836 
03837   /* A difference between two symbols, the second of which is in the
03838      current section, is transformed in a PC-relative relocation to
03839      the other symbol.  We have to adjust the relocation type here.  */
03840   if (fixP->fx_pcrel)
03841     {
03842       switch (fixP->fx_r_type)
03843        {
03844        default:
03845          break;
03846 
03847        case BFD_RELOC_32:
03848          fixP->fx_r_type = BFD_RELOC_32_PCREL;
03849          break;
03850 
03851          /* Currently, we only support 32-bit PCREL relocations.
03852             We'd need a new reloc type to handle 16_PCREL, and
03853             8_PCREL is already taken for R_SH_SWITCH8, which
03854             apparently does something completely different than what
03855             we need.  FIXME.  */
03856        case BFD_RELOC_16:
03857          bfd_set_error (bfd_error_bad_value);
03858          return;
03859 
03860        case BFD_RELOC_8:
03861          bfd_set_error (bfd_error_bad_value);
03862          return;
03863        }
03864     }
03865 
03866   /* The function adjust_reloc_syms won't convert a reloc against a weak
03867      symbol into a reloc against a section, but bfd_install_relocation
03868      will screw up if the symbol is defined, so we have to adjust val here
03869      to avoid the screw up later.
03870 
03871      For ordinary relocs, this does not happen for ELF, since for ELF,
03872      bfd_install_relocation uses the "special function" field of the
03873      howto, and does not execute the code that needs to be undone, as long
03874      as the special function does not return bfd_reloc_continue.
03875      It can happen for GOT- and PLT-type relocs the way they are
03876      described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
03877      doesn't matter here since those relocs don't use VAL; see below.  */
03878   if (OUTPUT_FLAVOR != bfd_target_elf_flavour
03879       && fixP->fx_addsy != NULL
03880       && S_IS_WEAK (fixP->fx_addsy))
03881     val -= S_GET_VALUE  (fixP->fx_addsy);
03882 
03883   if (SWITCH_TABLE (fixP))
03884     val -= S_GET_VALUE  (fixP->fx_subsy);
03885 
03886   max = min = 0;
03887   shift = 0;
03888   switch (fixP->fx_r_type)
03889     {
03890     case BFD_RELOC_SH_IMM3:
03891       max = 0x7;
03892       * buf = (* buf & 0xf8) | (val & 0x7);
03893       break;
03894     case BFD_RELOC_SH_IMM3U:
03895       max = 0x7;
03896       * buf = (* buf & 0x8f) | ((val & 0x7) << 4);
03897       break;
03898     case BFD_RELOC_SH_DISP12:
03899       max = 0xfff;
03900       buf[lowbyte] = val & 0xff;
03901       buf[highbyte] |= (val >> 8) & 0x0f;
03902       break;
03903     case BFD_RELOC_SH_DISP12BY2:
03904       max = 0xfff;
03905       shift = 1;
03906       buf[lowbyte] = (val >> 1) & 0xff;
03907       buf[highbyte] |= (val >> 9) & 0x0f;
03908       break;
03909     case BFD_RELOC_SH_DISP12BY4:
03910       max = 0xfff;
03911       shift = 2;
03912       buf[lowbyte] = (val >> 2) & 0xff;
03913       buf[highbyte] |= (val >> 10) & 0x0f;
03914       break;
03915     case BFD_RELOC_SH_DISP12BY8:
03916       max = 0xfff;
03917       shift = 3;
03918       buf[lowbyte] = (val >> 3) & 0xff;
03919       buf[highbyte] |= (val >> 11) & 0x0f;
03920       break;
03921     case BFD_RELOC_SH_DISP20:
03922       if (! target_big_endian)
03923        abort();
03924       max = 0x7ffff;
03925       min = -0x80000;
03926       buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0);
03927       buf[2] = (val >> 8) & 0xff;
03928       buf[3] = val & 0xff;
03929       break;
03930     case BFD_RELOC_SH_DISP20BY8:
03931       if (!target_big_endian)
03932        abort();
03933       max = 0x7ffff;
03934       min = -0x80000;
03935       shift = 8;
03936       buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0);
03937       buf[2] = (val >> 16) & 0xff;
03938       buf[3] = (val >> 8) & 0xff;
03939       break;
03940 
03941     case BFD_RELOC_SH_IMM4:
03942       max = 0xf;
03943       *buf = (*buf & 0xf0) | (val & 0xf);
03944       break;
03945 
03946     case BFD_RELOC_SH_IMM4BY2:
03947       max = 0xf;
03948       shift = 1;
03949       *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
03950       break;
03951 
03952     case BFD_RELOC_SH_IMM4BY4:
03953       max = 0xf;
03954       shift = 2;
03955       *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
03956       break;
03957 
03958     case BFD_RELOC_SH_IMM8BY2:
03959       max = 0xff;
03960       shift = 1;
03961       *buf = val >> 1;
03962       break;
03963 
03964     case BFD_RELOC_SH_IMM8BY4:
03965       max = 0xff;
03966       shift = 2;
03967       *buf = val >> 2;
03968       break;
03969 
03970     case BFD_RELOC_8:
03971     case BFD_RELOC_SH_IMM8:
03972       /* Sometimes the 8 bit value is sign extended (e.g., add) and
03973          sometimes it is not (e.g., and).  We permit any 8 bit value.
03974          Note that adding further restrictions may invalidate
03975          reasonable looking assembly code, such as ``and -0x1,r0''.  */
03976       max = 0xff;
03977       min = -0xff;
03978       *buf++ = val;
03979       break;
03980 
03981     case BFD_RELOC_SH_PCRELIMM8BY4:
03982       /* The lower two bits of the PC are cleared before the
03983          displacement is added in.  We can assume that the destination
03984          is on a 4 byte boundary.  If this instruction is also on a 4
03985          byte boundary, then we want
03986           (target - here) / 4
03987         and target - here is a multiple of 4.
03988         Otherwise, we are on a 2 byte boundary, and we want
03989           (target - (here - 2)) / 4
03990         and target - here is not a multiple of 4.  Computing
03991           (target - (here - 2)) / 4 == (target - here + 2) / 4
03992         works for both cases, since in the first case the addition of
03993         2 will be removed by the division.  target - here is in the
03994         variable val.  */
03995       val = (val + 2) / 4;
03996       if (val & ~0xff)
03997        as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
03998       buf[lowbyte] = val;
03999       break;
04000 
04001     case BFD_RELOC_SH_PCRELIMM8BY2:
04002       val /= 2;
04003       if (val & ~0xff)
04004        as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
04005       buf[lowbyte] = val;
04006       break;
04007 
04008     case BFD_RELOC_SH_PCDISP8BY2:
04009       val /= 2;
04010       if (val < -0x80 || val > 0x7f)
04011        as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
04012       buf[lowbyte] = val;
04013       break;
04014 
04015     case BFD_RELOC_SH_PCDISP12BY2:
04016       val /= 2;
04017       if (val < -0x800 || val > 0x7ff)
04018        as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
04019       buf[lowbyte] = val & 0xff;
04020       buf[highbyte] |= (val >> 8) & 0xf;
04021       break;
04022 
04023     case BFD_RELOC_32:
04024     case BFD_RELOC_32_PCREL:
04025       apply_full_field_fix (fixP, buf, val, 4);
04026       break;
04027 
04028     case BFD_RELOC_16:
04029       apply_full_field_fix (fixP, buf, val, 2);
04030       break;
04031 
04032     case BFD_RELOC_SH_USES:
04033       /* Pass the value into sh_reloc().  */
04034       fixP->fx_addnumber = val;
04035       break;
04036 
04037     case BFD_RELOC_SH_COUNT:
04038     case BFD_RELOC_SH_ALIGN:
04039     case BFD_RELOC_SH_CODE:
04040     case BFD_RELOC_SH_DATA:
04041     case BFD_RELOC_SH_LABEL:
04042       /* Nothing to do here.  */
04043       break;
04044 
04045     case BFD_RELOC_SH_LOOP_START:
04046     case BFD_RELOC_SH_LOOP_END:
04047 
04048     case BFD_RELOC_VTABLE_INHERIT:
04049     case BFD_RELOC_VTABLE_ENTRY:
04050       fixP->fx_done = 0;
04051       return;
04052 
04053 #ifdef OBJ_ELF
04054     case BFD_RELOC_32_PLT_PCREL:
04055       /* Make the jump instruction point to the address of the operand.  At
04056         runtime we merely add the offset to the actual PLT entry.  */
04057       * valP = 0xfffffffc;
04058       val = fixP->fx_offset;
04059       if (fixP->fx_subsy)
04060        val -= S_GET_VALUE (fixP->fx_subsy);
04061       apply_full_field_fix (fixP, buf, val, 4);
04062       break;
04063 
04064     case BFD_RELOC_SH_GOTPC:
04065       /* This is tough to explain.  We end up with this one if we have
04066          operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
04067          The goal here is to obtain the absolute address of the GOT,
04068          and it is strongly preferable from a performance point of
04069          view to avoid using a runtime relocation for this.  There are
04070          cases where you have something like:
04071 
04072          .long       _GLOBAL_OFFSET_TABLE_+[.-.L66]
04073 
04074          and here no correction would be required.  Internally in the
04075          assembler we treat operands of this form as not being pcrel
04076          since the '.' is explicitly mentioned, and I wonder whether
04077          it would simplify matters to do it this way.  Who knows.  In
04078          earlier versions of the PIC patches, the pcrel_adjust field
04079          was used to store the correction, but since the expression is
04080          not pcrel, I felt it would be confusing to do it this way.  */
04081       * valP -= 1;
04082       apply_full_field_fix (fixP, buf, val, 4);
04083       break;
04084 
04085     case BFD_RELOC_SH_TLS_GD_32:
04086     case BFD_RELOC_SH_TLS_LD_32:
04087     case BFD_RELOC_SH_TLS_IE_32:
04088       S_SET_THREAD_LOCAL (fixP->fx_addsy);
04089       /* Fallthrough */
04090     case BFD_RELOC_32_GOT_PCREL:
04091     case BFD_RELOC_SH_GOTPLT32:
04092       * valP = 0; /* Fully resolved at runtime.  No addend.  */
04093       apply_full_field_fix (fixP, buf, 0, 4);
04094       break;
04095 
04096     case BFD_RELOC_SH_TLS_LDO_32:
04097     case BFD_RELOC_SH_TLS_LE_32:
04098       S_SET_THREAD_LOCAL (fixP->fx_addsy);
04099       /* Fallthrough */
04100     case BFD_RELOC_32_GOTOFF:
04101       apply_full_field_fix (fixP, buf, val, 4);
04102       break;
04103 #endif
04104 
04105     default:
04106 #ifdef HAVE_SH64
04107       shmedia_md_apply_fix (fixP, valP);
04108       return;
04109 #else
04110       abort ();
04111 #endif
04112     }
04113 
04114   if (shift != 0)
04115     {
04116       if ((val & ((1 << shift) - 1)) != 0)
04117        as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
04118       if (val >= 0)
04119        val >>= shift;
04120       else
04121        val = ((val >> shift)
04122               | ((long) -1 & ~ ((long) -1 >> shift)));
04123     }
04124   if (max != 0 && (val < min || val > max))
04125     as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
04126   else if (max != 0)
04127     /* Stop the generic code from trying to overlow check the value as well.
04128        It may not have the correct value anyway, as we do not store val back
04129        into *valP.  */
04130     fixP->fx_no_overflow = 1;
04131 
04132   if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
04133     fixP->fx_done = 1;
04134 }
04135 
04136 /* Called just before address relaxation.  Return the length
04137    by which a fragment must grow to reach it's destination.  */
04138 
04139 int
04140 md_estimate_size_before_relax (fragS *fragP, segT segment_type)
04141 {
04142   int what;
04143 
04144   switch (fragP->fr_subtype)
04145     {
04146     default:
04147 #ifdef HAVE_SH64
04148       return shmedia_md_estimate_size_before_relax (fragP, segment_type);
04149 #else
04150       abort ();
04151 #endif
04152 
04153 
04154     case C (UNCOND_JUMP, UNDEF_DISP):
04155       /* Used to be a branch to somewhere which was unknown.  */
04156       if (!fragP->fr_symbol)
04157        {
04158          fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
04159        }
04160       else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
04161        {
04162          fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
04163        }
04164       else
04165        {
04166          fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
04167        }
04168       break;
04169 
04170     case C (COND_JUMP, UNDEF_DISP):
04171     case C (COND_JUMP_DELAY, UNDEF_DISP):
04172       what = GET_WHAT (fragP->fr_subtype);
04173       /* Used to be a branch to somewhere which was unknown.  */
04174       if (fragP->fr_symbol
04175          && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
04176        {
04177          /* Got a symbol and it's defined in this segment, become byte
04178             sized - maybe it will fix up.  */
04179          fragP->fr_subtype = C (what, COND8);
04180        }
04181       else if (fragP->fr_symbol)
04182        {
04183          /* Its got a segment, but its not ours, so it will always be long.  */
04184          fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
04185        }
04186       else
04187        {
04188          /* We know the abs value.  */
04189          fragP->fr_subtype = C (what, COND8);
04190        }
04191       break;
04192 
04193     case C (UNCOND_JUMP, UNCOND12):
04194     case C (UNCOND_JUMP, UNCOND32):
04195     case C (UNCOND_JUMP, UNDEF_WORD_DISP):
04196     case C (COND_JUMP, COND8):
04197     case C (COND_JUMP, COND12):
04198     case C (COND_JUMP, COND32):
04199     case C (COND_JUMP, UNDEF_WORD_DISP):
04200     case C (COND_JUMP_DELAY, COND8):
04201     case C (COND_JUMP_DELAY, COND12):
04202     case C (COND_JUMP_DELAY, COND32):
04203     case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
04204       /* When relaxing a section for the second time, we don't need to
04205         do anything besides return the current size.  */
04206       break;
04207     }
04208 
04209   fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
04210   return fragP->fr_var;
04211 }
04212 
04213 /* Put number into target byte order.  */
04214 
04215 void
04216 md_number_to_chars (char *ptr, valueT use, int nbytes)
04217 {
04218 #ifdef HAVE_SH64
04219   /* We might need to set the contents type to data.  */
04220   sh64_flag_output ();
04221 #endif
04222 
04223   if (! target_big_endian)
04224     number_to_chars_littleendian (ptr, use, nbytes);
04225   else
04226     number_to_chars_bigendian (ptr, use, nbytes);
04227 }
04228 
04229 /* This version is used in obj-coff.c eg. for the sh-hms target.  */
04230 
04231 long
04232 md_pcrel_from (fixS *fixP)
04233 {
04234   return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
04235 }
04236 
04237 long
04238 md_pcrel_from_section (fixS *fixP, segT sec)
04239 {
04240   if (! sh_local_pcrel (fixP)
04241       && fixP->fx_addsy != (symbolS *) NULL
04242       && (generic_force_reloc (fixP)
04243          || S_GET_SEGMENT (fixP->fx_addsy) != sec))
04244     {
04245       /* The symbol is undefined (or is defined but not in this section,
04246         or we're not sure about it being the final definition).  Let the
04247         linker figure it out.  We need to adjust the subtraction of a
04248         symbol to the position of the relocated data, though.  */
04249       return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0;
04250     }
04251 
04252   return md_pcrel_from (fixP);
04253 }
04254 
04255 /* Create a reloc.  */
04256 
04257 arelent *
04258 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
04259 {
04260   arelent *rel;
04261   bfd_reloc_code_real_type r_type;
04262 
04263   rel = (arelent *) xmalloc (sizeof (arelent));
04264   rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
04265   *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
04266   rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
04267 
04268   r_type = fixp->fx_r_type;
04269 
04270   if (SWITCH_TABLE (fixp))
04271     {
04272       *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
04273       rel->addend = 0;
04274       if (r_type == BFD_RELOC_16)
04275        r_type = BFD_RELOC_SH_SWITCH16;
04276       else if (r_type == BFD_RELOC_8)
04277        r_type = BFD_RELOC_8_PCREL;
04278       else if (r_type == BFD_RELOC_32)
04279        r_type = BFD_RELOC_SH_SWITCH32;
04280       else
04281        abort ();
04282     }
04283   else if (r_type == BFD_RELOC_SH_USES)
04284     rel->addend = fixp->fx_addnumber;
04285   else if (r_type == BFD_RELOC_SH_COUNT)
04286     rel->addend = fixp->fx_offset;
04287   else if (r_type == BFD_RELOC_SH_ALIGN)
04288     rel->addend = fixp->fx_offset;
04289   else if (r_type == BFD_RELOC_VTABLE_INHERIT
04290            || r_type == BFD_RELOC_VTABLE_ENTRY)
04291     rel->addend = fixp->fx_offset;
04292   else if (r_type == BFD_RELOC_SH_LOOP_START
04293            || r_type == BFD_RELOC_SH_LOOP_END)
04294     rel->addend = fixp->fx_offset;
04295   else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
04296     {
04297       rel->addend = 0;
04298       rel->address = rel->addend = fixp->fx_offset;
04299     }
04300 #ifdef HAVE_SH64
04301   else if (shmedia_init_reloc (rel, fixp))
04302     ;
04303 #endif
04304   else
04305     rel->addend = fixp->fx_addnumber;
04306 
04307   rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
04308 
04309   if (rel->howto == NULL)
04310     {
04311       as_bad_where (fixp->fx_file, fixp->fx_line,
04312                   _("Cannot represent relocation type %s"),
04313                   bfd_get_reloc_code_name (r_type));
04314       /* Set howto to a garbage value so that we can keep going.  */
04315       rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
04316       assert (rel->howto != NULL);
04317     }
04318 #ifdef OBJ_ELF
04319   else if (rel->howto->type == R_SH_IND12W)
04320     rel->addend += fixp->fx_offset - 4;
04321 #endif
04322 
04323   return rel;
04324 }
04325 
04326 #ifdef OBJ_ELF
04327 inline static char *
04328 sh_end_of_match (char *cont, char *what)
04329 {
04330   int len = strlen (what);
04331 
04332   if (strncasecmp (cont, what, strlen (what)) == 0
04333       && ! is_part_of_name (cont[len]))
04334     return cont + len;
04335 
04336   return NULL;
04337 }
04338 
04339 int
04340 sh_parse_name (char const *name,
04341               expressionS *exprP,
04342               enum expr_mode mode,
04343               char *nextcharP)
04344 {
04345   char *next = input_line_pointer;
04346   char *next_end;
04347   int reloc_type;
04348   segT segment;
04349 
04350   exprP->X_op_symbol = NULL;
04351 
04352   if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
04353     {
04354       if (! GOT_symbol)
04355        GOT_symbol = symbol_find_or_make (name);
04356 
04357       exprP->X_add_symbol = GOT_symbol;
04358     no_suffix:
04359       /* If we have an absolute symbol or a reg, then we know its
04360         value now.  */
04361       segment = S_GET_SEGMENT (exprP->X_add_symbol);
04362       if (mode != expr_defer && segment == absolute_section)
04363        {
04364          exprP->X_op = O_constant;
04365          exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
04366          exprP->X_add_symbol = NULL;
04367        }
04368       else if (mode != expr_defer && segment == reg_section)
04369        {
04370          exprP->X_op = O_register;
04371          exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
04372          exprP->X_add_symbol = NULL;
04373        }
04374       else
04375        {
04376          exprP->X_op = O_symbol;
04377          exprP->X_add_number = 0;
04378        }
04379 
04380       return 1;
04381     }
04382 
04383   exprP->X_add_symbol = symbol_find_or_make (name);
04384 
04385   if (*nextcharP != '@')
04386     goto no_suffix;
04387   else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))
04388     reloc_type = BFD_RELOC_32_GOTOFF;
04389   else if ((next_end = sh_end_of_match (next + 1, "GOTPLT")))
04390     reloc_type = BFD_RELOC_SH_GOTPLT32;
04391   else if ((next_end = sh_end_of_match (next + 1, "GOT")))
04392     reloc_type = BFD_RELOC_32_GOT_PCREL;
04393   else if ((next_end = sh_end_of_match (next + 1, "PLT")))
04394     reloc_type = BFD_RELOC_32_PLT_PCREL;
04395   else if ((next_end = sh_end_of_match (next + 1, "TLSGD")))
04396     reloc_type = BFD_RELOC_SH_TLS_GD_32;
04397   else if ((next_end = sh_end_of_match (next + 1, "TLSLDM")))
04398     reloc_type = BFD_RELOC_SH_TLS_LD_32;
04399   else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF")))
04400     reloc_type = BFD_RELOC_SH_TLS_IE_32;
04401   else if ((next_end = sh_end_of_match (next + 1, "TPOFF")))
04402     reloc_type = BFD_RELOC_SH_TLS_LE_32;
04403   else if ((next_end = sh_end_of_match (next + 1, "DTPOFF")))
04404     reloc_type = BFD_RELOC_SH_TLS_LDO_32;
04405   else
04406     goto no_suffix;
04407 
04408   *input_line_pointer = *nextcharP;
04409   input_line_pointer = next_end;
04410   *nextcharP = *input_line_pointer;
04411   *input_line_pointer = '\0';
04412 
04413   exprP->X_op = O_PIC_reloc;
04414   exprP->X_add_number = 0;
04415   exprP->X_md = reloc_type;
04416 
04417   return 1;
04418 }
04419 
04420 void
04421 sh_cfi_frame_initial_instructions (void)
04422 {
04423   cfi_add_CFA_def_cfa (15, 0);
04424 }
04425 
04426 int
04427 sh_regname_to_dw2regnum (char *regname)
04428 {
04429   unsigned int regnum = -1;
04430   unsigned int i;
04431   const char *p;
04432   char *q;
04433   static struct { char *name; int dw2regnum; } regnames[] =
04434     {
04435       { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
04436       { "macl", 21 }, { "fpul", 23 }
04437     };
04438 
04439   for (i = 0; i < ARRAY_SIZE (regnames); ++i)
04440     if (strcmp (regnames[i].name, regname) == 0)
04441       return regnames[i].dw2regnum;
04442 
04443   if (regname[0] == 'r')
04444     {
04445       p = regname + 1;
04446       regnum = strtoul (p, &q, 10);
04447       if (p == q || *q || regnum >= 16)
04448        return -1;
04449     }
04450   else if (regname[0] == 'f' && regname[1] == 'r')
04451     {
04452       p = regname + 2;
04453       regnum = strtoul (p, &q, 10);
04454       if (p == q || *q || regnum >= 16)
04455        return -1;
04456       regnum += 25;
04457     }
04458   else if (regname[0] == 'x' && regname[1] == 'd')
04459     {
04460       p = regname + 2;
04461       regnum = strtoul (p, &q, 10);
04462       if (p == q || *q || regnum >= 8)
04463        return -1;
04464       regnum += 87;
04465     }
04466   return regnum;
04467 }
04468 #endif /* OBJ_ELF */