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cell-binutils  2.17cvs20070401
tc-mcore.c
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00001 /* tc-mcore.c -- Assemble code for M*Core
00002    Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007
00003    Free Software Foundation, Inc.
00004 
00005    This file is part of GAS, the GNU Assembler.
00006 
00007    GAS is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 2, or (at your option)
00010    any later version.
00011 
00012    GAS is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with GAS; see the file COPYING.  If not, write to the Free
00019    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
00020    02110-1301, USA.  */
00021 
00022 #include "as.h"
00023 #include "subsegs.h"
00024 #define DEFINE_TABLE
00025 #include "../opcodes/mcore-opc.h"
00026 #include "safe-ctype.h"
00027 
00028 #ifdef OBJ_ELF
00029 #include "elf/mcore.h"
00030 #endif
00031 
00032 #ifndef streq
00033 #define streq(a,b) (strcmp (a, b) == 0)
00034 #endif
00035 
00036 /* Forward declarations for dumb compilers.  */
00037 
00038 /* Several places in this file insert raw instructions into the
00039    object. They should use MCORE_INST_XXX macros to get the opcodes
00040    and then use these two macros to crack the MCORE_INST value into
00041    the appropriate byte values.  */
00042 #define       INST_BYTE0(x)  (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF))
00043 #define       INST_BYTE1(x)  (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF))
00044 
00045 const char comment_chars[] = "#/";
00046 const char line_separator_chars[] = ";";
00047 const char line_comment_chars[] = "#/";
00048 
00049 static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97.  */
00050 static int sifilter_mode = 0;
00051 
00052 const char EXP_CHARS[] = "eE";
00053 
00054 /* Chars that mean this number is a floating point constant
00055     As in 0f12.456
00056     or    0d1.2345e12  */
00057 const char FLT_CHARS[] = "rRsSfFdDxXpP";
00058 
00059 #define C(what,length) (((what) << 2) + (length))
00060 #define GET_WHAT(x)    ((x >> 2))
00061 
00062 /* These are the two types of relaxable instruction.  */
00063 #define COND_JUMP  1
00064 #define UNCD_JUMP  2
00065 
00066 #define UNDEF_DISP      0
00067 #define DISP12          1
00068 #define DISP32          2
00069 #define UNDEF_WORD_DISP 3
00070 
00071 #define C12_LEN              2
00072 #define C32_LEN             10     /* Allow for align.  */
00073 #define U12_LEN              2
00074 #define U32_LEN              8     /* Allow for align.  */
00075 
00076 typedef enum
00077 {
00078   M210,
00079   M340
00080 }
00081 cpu_type;
00082 
00083 cpu_type cpu = M340;
00084 
00085 /* Initialize the relax table.  */
00086 const relax_typeS md_relax_table[] =
00087 {
00088   {    0,     0, 0,    0 },
00089   {    0,     0, 0,    0 },
00090   {    0,     0, 0,    0 },
00091   {    0,     0, 0,    0 },
00092 
00093   /* COND_JUMP */
00094   {    0,     0, 0,    0 },                 /* UNDEF_DISP */
00095   { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */
00096   {    0,     0, C32_LEN, 0 },                     /* DISP32 */
00097   {    0,     0, C32_LEN, 0 },                     /* UNDEF_WORD_DISP */
00098 
00099   /* UNCD_JUMP */
00100   {    0,     0, 0,    0 },                 /* UNDEF_DISP */
00101   { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */
00102   {    0,     0, U32_LEN, 0 },                     /* DISP32 */
00103   {    0,     0, U32_LEN, 0 }                      /* UNDEF_WORD_DISP */
00104 
00105 };
00106 
00107 /* Literal pool data structures.  */
00108 struct literal
00109 {
00110   unsigned short  refcnt;
00111   unsigned char        ispcrel;
00112   unsigned char        unused;
00113   expressionS   e;
00114 };
00115 
00116 #define MAX_POOL_SIZE       (1024/4)
00117 static struct literal litpool [MAX_POOL_SIZE];
00118 static unsigned poolsize;
00119 static unsigned poolnumber;
00120 static unsigned long poolspan;
00121 
00122 /* SPANPANIC: the point at which we get too scared and force a dump
00123    of the literal pool, and perhaps put a branch in place.
00124    Calculated as:
00125                1024  span of lrw/jmpi/jsri insn (actually span+1)
00126               -2     possible alignment at the insn.
00127               -2     possible alignment to get the table aligned.
00128               -2     an inserted branch around the table.
00129             == 1018
00130    at 1018, we might be in trouble.
00131    -- so we have to be smaller than 1018 and since we deal with 2-byte
00132    instructions, the next good choice is 1016.
00133    -- Note we have a test case that fails when we've got 1018 here.  */
00134 #define SPANPANIC    (1016)        /* 1024 - 1 entry - 2 byte rounding.  */
00135 #define SPANCLOSE    (900)
00136 #define SPANEXIT     (600)
00137 static symbolS * poolsym;          /* Label for current pool.  */
00138 static char poolname[8];
00139 static struct hash_control * opcode_hash_control;       /* Opcode mnemonics.  */
00140 
00141 #define POOL_END_LABEL   ".LE"
00142 #define POOL_START_LABEL ".LS"
00143 
00144 static void
00145 make_name (char * s, char * p, int n)
00146 {
00147   static const char hex[] = "0123456789ABCDEF";
00148 
00149   s[0] = p[0];
00150   s[1] = p[1];
00151   s[2] = p[2];
00152   s[3] = hex[(n >> 12) & 0xF];
00153   s[4] = hex[(n >>  8) & 0xF];
00154   s[5] = hex[(n >>  4) & 0xF];
00155   s[6] = hex[(n)       & 0xF];
00156   s[7] = 0;
00157 }
00158 
00159 static void
00160 dump_literals (int isforce)
00161 {
00162   unsigned int i;
00163   struct literal * p;
00164   symbolS * brarsym = NULL;
00165 
00166   if (poolsize == 0)
00167     return;
00168 
00169   /* Must we branch around the literal table?  */
00170   if (isforce)
00171     {
00172       char * output;
00173       char brarname[8];
00174 
00175       make_name (brarname, POOL_END_LABEL, poolnumber);
00176 
00177       brarsym = symbol_make (brarname);
00178 
00179       symbol_table_insert (brarsym);
00180 
00181       output = frag_var (rs_machine_dependent,
00182                       md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length,
00183                       md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length,
00184                       C (UNCD_JUMP, 0), brarsym, 0, 0);
00185       output[0] = INST_BYTE0 (MCORE_INST_BR);    /* br .+xxx */
00186       output[1] = INST_BYTE1 (MCORE_INST_BR);
00187     }
00188 
00189   /* Make sure that the section is sufficiently aligned and that
00190      the literal table is aligned within it.  */
00191   record_alignment (now_seg, 2);
00192   frag_align (2, 0, 0);
00193 
00194   colon (S_GET_NAME (poolsym));
00195 
00196   for (i = 0, p = litpool; i < poolsize; i++, p++)
00197     emit_expr (& p->e, 4);
00198 
00199   if (brarsym != NULL)
00200     colon (S_GET_NAME (brarsym));
00201 
00202    poolsize = 0;
00203 }
00204 
00205 static void
00206 mcore_s_literals (int ignore ATTRIBUTE_UNUSED)
00207 {
00208   dump_literals (0);
00209   demand_empty_rest_of_line ();
00210 }
00211 
00212 /* Perform FUNC (ARG), and track number of bytes added to frag.  */
00213 
00214 static void
00215 mcore_pool_count (void (*func) (int), int arg)
00216 {
00217   const fragS *curr_frag = frag_now;
00218   offsetT added = -frag_now_fix_octets ();
00219 
00220   (*func) (arg);
00221 
00222   while (curr_frag != frag_now)
00223     {
00224       added += curr_frag->fr_fix;
00225       curr_frag = curr_frag->fr_next;
00226     }
00227 
00228   added += frag_now_fix_octets ();
00229   poolspan += added;
00230 }
00231 
00232 static void
00233 check_literals (int kind, int offset)
00234 {
00235   poolspan += offset;
00236 
00237   /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC.
00238      SPANPANIC means that we must dump now.
00239      kind == 0 is any old instruction.
00240      kind  > 0 means we just had a control transfer instruction.
00241      kind == 1 means within a function
00242      kind == 2 means we just left a function
00243 
00244      The dump_literals (1) call inserts a branch around the table, so
00245      we first look to see if its a situation where we won't have to
00246      insert a branch (e.g., the previous instruction was an unconditional
00247      branch).
00248 
00249      SPANPANIC is the point where we must dump a single-entry pool.
00250      it accounts for alignments and an inserted branch.
00251      the 'poolsize*2' accounts for the scenario where we do:
00252        lrw r1,lit1; lrw r2,lit2; lrw r3,lit3
00253      Note that the 'lit2' reference is 2 bytes further along
00254      but the literal it references will be 4 bytes further along,
00255      so we must consider the poolsize into this equation.
00256      This is slightly over-cautious, but guarantees that we won't
00257      panic because a relocation is too distant.  */
00258 
00259   if (poolspan > SPANCLOSE && kind > 0)
00260     dump_literals (0);
00261   else if (poolspan > SPANEXIT && kind > 1)
00262     dump_literals (0);
00263   else if (poolspan >= (SPANPANIC - poolsize * 2))
00264     dump_literals (1);
00265 }
00266 
00267 static void
00268 mcore_cons (int nbytes)
00269 {
00270   if (now_seg == text_section)
00271     mcore_pool_count (cons, nbytes);
00272   else
00273     cons (nbytes);
00274 
00275   /* In theory we ought to call check_literals (2,0) here in case
00276      we need to dump the literal table.  We cannot do this however,
00277      as the directives that we are intercepting may be being used
00278      to build a switch table, and we must not interfere with its
00279      contents.  Instead we cross our fingers and pray...  */
00280 }
00281 
00282 static void
00283 mcore_float_cons (int float_type)
00284 {
00285   if (now_seg == text_section)
00286     mcore_pool_count (float_cons, float_type);
00287   else
00288     float_cons (float_type);
00289 
00290   /* See the comment in mcore_cons () about calling check_literals.
00291      It is unlikely that a switch table will be constructed using
00292      floating point values, but it is still likely that an indexed
00293      table of floating point constants is being created by these
00294      directives, so again we must not interfere with their placement.  */
00295 }
00296 
00297 static void
00298 mcore_stringer (int append_zero)
00299 {
00300   if (now_seg == text_section)
00301     mcore_pool_count (stringer, append_zero);
00302   else
00303     stringer (append_zero);
00304 
00305   /* We call check_literals here in case a large number of strings are
00306      being placed into the text section with a sequence of stringer
00307      directives.  In theory we could be upsetting something if these
00308      strings are actually in an indexed table instead of referenced by
00309      individual labels.  Let us hope that that never happens.  */
00310   check_literals (2, 0);
00311 }
00312 
00313 static void
00314 mcore_fill (int unused)
00315 {
00316   if (now_seg == text_section)
00317     mcore_pool_count (s_fill, unused);
00318   else
00319     s_fill (unused);
00320 
00321   check_literals (2, 0);
00322 }
00323 
00324 /* Handle the section changing pseudo-ops.  These call through to the
00325    normal implementations, but they dump the literal pool first.  */
00326 
00327 static void
00328 mcore_s_text (int ignore)
00329 {
00330   dump_literals (0);
00331 
00332 #ifdef OBJ_ELF
00333   obj_elf_text (ignore);
00334 #else
00335   s_text (ignore);
00336 #endif
00337 }
00338 
00339 static void
00340 mcore_s_data (int ignore)
00341 {
00342   dump_literals (0);
00343 
00344 #ifdef OBJ_ELF
00345   obj_elf_data (ignore);
00346 #else
00347   s_data (ignore);
00348 #endif
00349 }
00350 
00351 static void
00352 mcore_s_section (int ignore)
00353 {
00354   /* Scan forwards to find the name of the section.  If the section
00355      being switched to is ".line" then this is a DWARF1 debug section
00356      which is arbitrarily placed inside generated code.  In this case
00357      do not dump the literal pool because it is a) inefficient and
00358      b) would require the generation of extra code to jump around the
00359      pool.  */
00360   char * ilp = input_line_pointer;
00361 
00362   while (*ilp != 0 && ISSPACE (*ilp))
00363     ++ ilp;
00364 
00365   if (strncmp (ilp, ".line", 5) == 0
00366       && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r'))
00367     ;
00368   else
00369     dump_literals (0);
00370 
00371 #ifdef OBJ_ELF
00372   obj_elf_section (ignore);
00373 #endif
00374 #ifdef OBJ_COFF
00375   obj_coff_section (ignore);
00376 #endif
00377 }
00378 
00379 static void
00380 mcore_s_bss (int needs_align)
00381 {
00382   dump_literals (0);
00383 
00384   s_lcomm_bytes (needs_align);
00385 }
00386 
00387 #ifdef OBJ_ELF
00388 static void
00389 mcore_s_comm (int needs_align)
00390 {
00391   dump_literals (0);
00392 
00393   obj_elf_common (needs_align);
00394 }
00395 #endif
00396 
00397 /* This table describes all the machine specific pseudo-ops the assembler
00398    has to support.  The fields are:
00399      Pseudo-op name without dot
00400      Function to call to execute this pseudo-op
00401      Integer arg to pass to the function.   */
00402 const pseudo_typeS md_pseudo_table[] =
00403 {
00404   { "export",   s_globl,          0 },
00405   { "import",   s_ignore,         0 },
00406   { "literals", mcore_s_literals, 0 },
00407   { "page",     listing_eject,    0 },
00408 
00409   /* The following are to intercept the placement of data into the text
00410      section (eg addresses for a switch table), so that the space they
00411      occupy can be taken into account when deciding whether or not to
00412      dump the current literal pool.
00413      XXX - currently we do not cope with the .space and .dcb.d directives.  */
00414   { "ascii",    mcore_stringer,       0 },
00415   { "asciz",    mcore_stringer,       1 },
00416   { "byte",     mcore_cons,           1 },
00417   { "dc",       mcore_cons,           2 },
00418   { "dc.b",     mcore_cons,           1 },
00419   { "dc.d",     mcore_float_cons,    'd'},
00420   { "dc.l",     mcore_cons,           4 },
00421   { "dc.s",     mcore_float_cons,    'f'},
00422   { "dc.w",     mcore_cons,           2 },
00423   { "dc.x",     mcore_float_cons,    'x'},
00424   { "double",   mcore_float_cons,    'd'},
00425   { "float",    mcore_float_cons,    'f'},
00426   { "hword",    mcore_cons,           2 },
00427   { "int",      mcore_cons,           4 },
00428   { "long",     mcore_cons,           4 },
00429   { "octa",     mcore_cons,          16 },
00430   { "quad",     mcore_cons,           8 },
00431   { "short",    mcore_cons,           2 },
00432   { "single",   mcore_float_cons,    'f'},
00433   { "string",   mcore_stringer,       1 },
00434   { "word",     mcore_cons,           2 },
00435   { "fill",     mcore_fill,           0 },
00436 
00437   /* Allow for the effect of section changes.  */
00438   { "text",      mcore_s_text,    0 },
00439   { "data",      mcore_s_data,    0 },
00440   { "bss",       mcore_s_bss,     1 },
00441 #ifdef OBJ_ELF
00442   { "comm",      mcore_s_comm,    0 },
00443 #endif
00444   { "section",   mcore_s_section, 0 },
00445   { "section.s", mcore_s_section, 0 },
00446   { "sect",      mcore_s_section, 0 },
00447   { "sect.s",    mcore_s_section, 0 },
00448 
00449   { 0,          0,                0 }
00450 };
00451 
00452 /* This function is called once, at assembler startup time.  This should
00453    set up all the tables, etc that the MD part of the assembler needs.  */
00454 
00455 void
00456 md_begin (void)
00457 {
00458   const mcore_opcode_info * opcode;
00459   char * prev_name = "";
00460 
00461   opcode_hash_control = hash_new ();
00462 
00463   /* Insert unique names into hash table.  */
00464   for (opcode = mcore_table; opcode->name; opcode ++)
00465     {
00466       if (! streq (prev_name, opcode->name))
00467        {
00468          prev_name = opcode->name;
00469          hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
00470        }
00471     }
00472 }
00473 
00474 /* Get a log2(val).  */
00475 
00476 static int
00477 mylog2 (unsigned int val)
00478 {
00479   int log = -1;
00480 
00481   while (val != 0)
00482       {
00483        log ++;
00484        val >>= 1;
00485       }
00486 
00487   return log;
00488 }
00489 
00490 /* Try to parse a reg name.  */
00491 
00492 static char *
00493 parse_reg (char * s, unsigned * reg)
00494 {
00495   /* Strip leading whitespace.  */
00496   while (ISSPACE (* s))
00497     ++ s;
00498 
00499   if (TOLOWER (s[0]) == 'r')
00500     {
00501       if (s[1] == '1' && s[2] >= '0' && s[2] <= '5')
00502        {
00503          *reg = 10 + s[2] - '0';
00504          return s + 3;
00505        }
00506 
00507       if (s[1] >= '0' && s[1] <= '9')
00508        {
00509          *reg = s[1] - '0';
00510          return s + 2;
00511        }
00512     }
00513   else if (   TOLOWER (s[0]) == 's'
00514           && TOLOWER (s[1]) == 'p'
00515           && ! ISALNUM (s[2]))
00516     {
00517       * reg = 0;
00518       return s + 2;
00519     }
00520 
00521   as_bad (_("register expected, but saw '%.6s'"), s);
00522   return s;
00523 }
00524 
00525 static struct Cregs
00526 {
00527   char * name;
00528   unsigned int crnum;
00529 }
00530 cregs[] =
00531 {
00532   { "psr",     0},
00533   { "vbr",     1},
00534   { "epsr",    2},
00535   { "fpsr",    3},
00536   { "epc",     4},
00537   { "fpc",     5},
00538   { "ss0",     6},
00539   { "ss1",     7},
00540   { "ss2",     8},
00541   { "ss3",     9},
00542   { "ss4",    10},
00543   { "gcr",    11},
00544   { "gsr",    12},
00545   { "",               0}
00546 };
00547 
00548 static char *
00549 parse_creg (char * s, unsigned * reg)
00550 {
00551   int i;
00552 
00553   /* Strip leading whitespace.  */
00554   while (ISSPACE (* s))
00555     ++s;
00556 
00557   if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r'))
00558     {
00559       if (s[2] == '3' && s[3] >= '0' && s[3] <= '1')
00560        {
00561          *reg = 30 + s[3] - '0';
00562          return s + 4;
00563        }
00564 
00565       if (s[2] == '2' && s[3] >= '0' && s[3] <= '9')
00566        {
00567          *reg = 20 + s[3] - '0';
00568          return s + 4;
00569        }
00570 
00571       if (s[2] == '1' && s[3] >= '0' && s[3] <= '9')
00572        {
00573          *reg = 10 + s[3] - '0';
00574          return s + 4;
00575        }
00576 
00577       if (s[2] >= '0' && s[2] <= '9')
00578        {
00579          *reg = s[2] - '0';
00580          return s + 3;
00581        }
00582     }
00583 
00584   /* Look at alternate creg names before giving error.  */
00585   for (i = 0; cregs[i].name[0] != '\0'; i++)
00586     {
00587       char buf [10];
00588       int  length;
00589       int  j;
00590 
00591       length = strlen (cregs[i].name);
00592 
00593       for (j = 0; j < length; j++)
00594        buf[j] = TOLOWER (s[j]);
00595 
00596       if (strncmp (cregs[i].name, buf, length) == 0)
00597        {
00598          *reg = cregs[i].crnum;
00599          return s + length;
00600        }
00601     }
00602 
00603   as_bad (_("control register expected, but saw '%.6s'"), s);
00604 
00605   return s;
00606 }
00607 
00608 static char *
00609 parse_psrmod (char * s, unsigned * reg)
00610 {
00611   int  i;
00612   char buf[10];
00613   static struct psrmods
00614   {
00615     char *       name;
00616     unsigned int value;
00617   }
00618   psrmods[] =
00619   {
00620     { "ie", 1 },
00621     { "fe", 2 },
00622     { "ee", 4 },
00623     { "af", 8 }      /* Really 0 and non-combinable.  */
00624   };
00625 
00626   for (i = 0; i < 2; i++)
00627     buf[i] = TOLOWER (s[i]);
00628 
00629   for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;)
00630     {
00631       if (! strncmp (psrmods[i].name, buf, 2))
00632        {
00633          * reg = psrmods[i].value;
00634 
00635          return s + 2;
00636        }
00637     }
00638 
00639   as_bad (_("bad/missing psr specifier"));
00640 
00641   * reg = 0;
00642 
00643   return s;
00644 }
00645 
00646 static char *
00647 parse_exp (char * s, expressionS * e)
00648 {
00649   char * save;
00650   char * new;
00651 
00652   /* Skip whitespace.  */
00653   while (ISSPACE (* s))
00654     ++ s;
00655 
00656   save = input_line_pointer;
00657   input_line_pointer = s;
00658 
00659   expression (e);
00660 
00661   if (e->X_op == O_absent)
00662     as_bad (_("missing operand"));
00663 
00664   new = input_line_pointer;
00665   input_line_pointer = save;
00666 
00667   return new;
00668 }
00669 
00670 static int
00671 enter_literal (expressionS * e, int ispcrel)
00672 {
00673   unsigned int i;
00674   struct literal * p;
00675 
00676   if (poolsize >= MAX_POOL_SIZE - 2)
00677     /* The literal pool is as full as we can handle. We have
00678        to be 2 entries shy of the 1024/4=256 entries because we
00679        have to allow for the branch (2 bytes) and the alignment
00680        (2 bytes before the first insn referencing the pool and
00681        2 bytes before the pool itself) == 6 bytes, rounds up
00682        to 2 entries.  */
00683     dump_literals (1);
00684 
00685   if (poolsize == 0)
00686     {
00687       /* Create new literal pool.  */
00688       if (++ poolnumber > 0xFFFF)
00689        as_fatal (_("more than 65K literal pools"));
00690 
00691       make_name (poolname, POOL_START_LABEL, poolnumber);
00692       poolsym = symbol_make (poolname);
00693       symbol_table_insert (poolsym);
00694       poolspan = 0;
00695     }
00696 
00697   /* Search pool for value so we don't have duplicates.  */
00698   for (p = litpool, i = 0; i < poolsize; i++, p++)
00699     {
00700       if (e->X_op == p->e.X_op
00701          && e->X_add_symbol == p->e.X_add_symbol
00702          && e->X_add_number == p->e.X_add_number
00703          && ispcrel == p->ispcrel)
00704        {
00705          p->refcnt ++;
00706          return i;
00707        }
00708     }
00709 
00710   p->refcnt  = 1;
00711   p->ispcrel = ispcrel;
00712   p->e       = * e;
00713 
00714   poolsize ++;
00715 
00716   return i;
00717 }
00718 
00719 /* Parse a literal specification. -- either new or old syntax.
00720    old syntax: the user supplies the label and places the literal.
00721    new syntax: we put it into the literal pool.  */
00722 
00723 static char *
00724 parse_rt (char * s,
00725          char ** outputp,
00726          int ispcrel,
00727          expressionS * ep)
00728 {
00729   expressionS e;
00730   int n;
00731 
00732   if (ep)
00733     /* Indicate nothing there.  */
00734     ep->X_op = O_absent;
00735 
00736   if (*s == '[')
00737     {
00738       s = parse_exp (s + 1, & e);
00739 
00740       if (*s == ']')
00741        s++;
00742       else
00743        as_bad (_("missing ']'"));
00744     }
00745   else
00746     {
00747       s = parse_exp (s, & e);
00748 
00749       n = enter_literal (& e, ispcrel);
00750 
00751       if (ep)
00752        *ep = e;
00753 
00754       /* Create a reference to pool entry.  */
00755       e.X_op         = O_symbol;
00756       e.X_add_symbol = poolsym;
00757       e.X_add_number = n << 2;
00758     }
00759 
00760   * outputp = frag_more (2);
00761 
00762   fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1,
00763               BFD_RELOC_MCORE_PCREL_IMM8BY4);
00764 
00765   return s;
00766 }
00767 
00768 static char *
00769 parse_imm (char * s,
00770           unsigned * val,
00771           unsigned min,
00772           unsigned max)
00773 {
00774   char * new;
00775   expressionS e;
00776 
00777   new = parse_exp (s, & e);
00778 
00779   if (e.X_op == O_absent)
00780     ; /* An error message has already been emitted.  */
00781   else if (e.X_op != O_constant)
00782     as_bad (_("operand must be a constant"));
00783   else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max)
00784     as_bad (_("operand must be absolute in range %u..%u, not %ld"),
00785            min, max, (long) e.X_add_number);
00786 
00787   * val = e.X_add_number;
00788 
00789   return new;
00790 }
00791 
00792 static char *
00793 parse_mem (char * s,
00794           unsigned * reg,
00795           unsigned * off,
00796           unsigned siz)
00797 {
00798   * off = 0;
00799 
00800   while (ISSPACE (* s))
00801     ++ s;
00802 
00803   if (* s == '(')
00804     {
00805       s = parse_reg (s + 1, reg);
00806 
00807       while (ISSPACE (* s))
00808        ++ s;
00809 
00810       if (* s == ',')
00811        {
00812          s = parse_imm (s + 1, off, 0, 63);
00813 
00814          if (siz > 1)
00815            {
00816              if (siz > 2)
00817               {
00818                 if (* off & 0x3)
00819                   as_bad (_("operand must be a multiple of 4"));
00820 
00821                 * off >>= 2;
00822               }
00823              else
00824               {
00825                 if (* off & 0x1)
00826                   as_bad (_("operand must be a multiple of 2"));
00827 
00828                 * off >>= 1;
00829               }
00830            }
00831        }
00832 
00833       while (ISSPACE (* s))
00834        ++ s;
00835 
00836       if (* s == ')')
00837        s ++;
00838     }
00839   else
00840     as_bad (_("base register expected"));
00841 
00842   return s;
00843 }
00844 
00845 /* This is the guts of the machine-dependent assembler.  STR points to a
00846    machine dependent instruction.  This function is supposed to emit
00847    the frags/bytes it assembles to.  */
00848 
00849 void
00850 md_assemble (char * str)
00851 {
00852   char * op_start;
00853   char * op_end;
00854   mcore_opcode_info * opcode;
00855   char * output;
00856   int nlen = 0;
00857   unsigned short inst;
00858   unsigned reg;
00859   unsigned off;
00860   unsigned isize;
00861   expressionS e;
00862   char name[20];
00863 
00864   /* Drop leading whitespace.  */
00865   while (ISSPACE (* str))
00866     str ++;
00867 
00868   /* Find the op code end.  */
00869   for (op_start = op_end = str;
00870        nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' ';
00871        op_end++)
00872     {
00873       name[nlen] = op_start[nlen];
00874       nlen++;
00875     }
00876 
00877   name [nlen] = 0;
00878 
00879   if (nlen == 0)
00880     {
00881       as_bad (_("can't find opcode "));
00882       return;
00883     }
00884 
00885   opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name);
00886   if (opcode == NULL)
00887     {
00888       as_bad (_("unknown opcode \"%s\""), name);
00889       return;
00890     }
00891 
00892   inst = opcode->inst;
00893   isize = 2;
00894 
00895   switch (opcode->opclass)
00896     {
00897     case O0:
00898       output = frag_more (2);
00899       break;
00900 
00901     case OT:
00902       op_end = parse_imm (op_end + 1, & reg, 0, 3);
00903       inst |= reg;
00904       output = frag_more (2);
00905       break;
00906 
00907     case O1:
00908       op_end = parse_reg (op_end + 1, & reg);
00909       inst |= reg;
00910       output = frag_more (2);
00911       break;
00912 
00913     case JMP:
00914       op_end = parse_reg (op_end + 1, & reg);
00915       inst |= reg;
00916       output = frag_more (2);
00917       /* In a sifilter mode, we emit this insn 2 times,
00918         fixes problem of an interrupt during a jmp..  */
00919       if (sifilter_mode)
00920        {
00921          output[0] = INST_BYTE0 (inst);
00922          output[1] = INST_BYTE1 (inst);
00923          output = frag_more (2);
00924        }
00925       break;
00926 
00927     case JSR:
00928       op_end = parse_reg (op_end + 1, & reg);
00929 
00930       if (reg == 15)
00931        as_bad (_("invalid register: r15 illegal"));
00932 
00933       inst |= reg;
00934       output = frag_more (2);
00935 
00936       if (sifilter_mode)
00937        {
00938          /* Replace with:  bsr .+2 ; addi r15,6; jmp rx ; jmp rx.  */
00939          inst = MCORE_INST_BSR;    /* With 0 displacement.  */
00940          output[0] = INST_BYTE0 (inst);
00941          output[1] = INST_BYTE1 (inst);
00942 
00943          output = frag_more (2);
00944          inst = MCORE_INST_ADDI;
00945          inst |= 15;               /* addi r15,6  */
00946          inst |= (6 - 1) << 4;            /* Over the jmp's.  */
00947          output[0] = INST_BYTE0 (inst);
00948          output[1] = INST_BYTE1 (inst);
00949 
00950          output = frag_more (2);
00951          inst = MCORE_INST_JMP | reg;
00952          output[0] = INST_BYTE0 (inst);
00953          output[1] = INST_BYTE1 (inst);
00954 
00955          /* 2nd emitted in fallthrough.  */
00956          output = frag_more (2);
00957        }
00958       break;
00959 
00960     case OC:
00961       op_end = parse_reg (op_end + 1, & reg);
00962       inst |= reg;
00963 
00964       /* Skip whitespace.  */
00965       while (ISSPACE (* op_end))
00966        ++ op_end;
00967 
00968       if (*op_end == ',')
00969        {
00970          op_end = parse_creg (op_end + 1, & reg);
00971          inst |= reg << 4;
00972        }
00973 
00974       output = frag_more (2);
00975       break;
00976 
00977     case MULSH:
00978       if (cpu == M210)
00979        {
00980          as_bad (_("M340 specific opcode used when assembling for M210"));
00981          break;
00982        }
00983       /* drop through...  */
00984     case O2:
00985       op_end = parse_reg (op_end + 1, & reg);
00986       inst |= reg;
00987 
00988       /* Skip whitespace.  */
00989       while (ISSPACE (* op_end))
00990        ++ op_end;
00991 
00992       if (* op_end == ',')
00993        {
00994          op_end = parse_reg (op_end + 1, & reg);
00995          inst |= reg << 4;
00996        }
00997       else
00998        as_bad (_("second operand missing"));
00999 
01000       output = frag_more (2);
01001       break;
01002 
01003     case X1:
01004       /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx.  */
01005       op_end = parse_reg (op_end + 1, & reg);
01006 
01007       /* Skip whitespace.  */
01008       while (ISSPACE (* op_end))
01009        ++ op_end;
01010 
01011       if (* op_end == ',')  /* xtrb- r1,rx.  */
01012        {
01013          if (reg != 1)
01014            as_bad (_("destination register must be r1"));
01015 
01016          op_end = parse_reg (op_end + 1, & reg);
01017        }
01018 
01019       inst |= reg;
01020       output = frag_more (2);
01021       break;
01022 
01023     case O1R1:  /* div- rx,r1.  */
01024       op_end = parse_reg (op_end + 1, & reg);
01025       inst |= reg;
01026 
01027       /* Skip whitespace.  */
01028       while (ISSPACE (* op_end))
01029        ++ op_end;
01030 
01031       if (* op_end == ',')
01032        {
01033          op_end = parse_reg (op_end + 1, & reg);
01034          if (reg != 1)
01035            as_bad (_("source register must be r1"));
01036        }
01037       else
01038        as_bad (_("second operand missing"));
01039 
01040       output = frag_more (2);
01041       break;
01042 
01043     case OI:
01044       op_end = parse_reg (op_end + 1, & reg);
01045       inst |= reg;
01046 
01047       /* Skip whitespace.  */
01048       while (ISSPACE (* op_end))
01049        ++ op_end;
01050 
01051       if (* op_end == ',')
01052        {
01053          op_end = parse_imm (op_end + 1, & reg, 1, 32);
01054          inst |= (reg - 1) << 4;
01055        }
01056       else
01057        as_bad (_("second operand missing"));
01058 
01059       output = frag_more (2);
01060       break;
01061 
01062     case OB:
01063       op_end = parse_reg (op_end + 1, & reg);
01064       inst |= reg;
01065 
01066       /* Skip whitespace.  */
01067       while (ISSPACE (* op_end))
01068        ++ op_end;
01069 
01070       if (* op_end == ',')
01071        {
01072          op_end = parse_imm (op_end + 1, & reg, 0, 31);
01073          inst |= reg << 4;
01074        }
01075       else
01076        as_bad (_("second operand missing"));
01077 
01078       output = frag_more (2);
01079       break;
01080 
01081     case OB2:
01082       /* Like OB, but arg is 2^n instead of n.  */
01083       op_end = parse_reg (op_end + 1, & reg);
01084       inst |= reg;
01085 
01086       /* Skip whitespace.  */
01087       while (ISSPACE (* op_end))
01088        ++ op_end;
01089 
01090       if (* op_end == ',')
01091        {
01092          op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31);
01093          /* Further restrict the immediate to a power of two.  */
01094          if ((reg & (reg - 1)) == 0)
01095            reg = mylog2 (reg);
01096          else
01097            {
01098              reg = 0;
01099              as_bad (_("immediate is not a power of two"));
01100            }
01101          inst |= (reg) << 4;
01102        }
01103       else
01104        as_bad (_("second operand missing"));
01105 
01106       output = frag_more (2);
01107       break;
01108 
01109     case OBRa:       /* Specific for bgeni: imm of 0->6 translate to movi.  */
01110     case OBRb:
01111     case OBRc:
01112       op_end = parse_reg (op_end + 1, & reg);
01113       inst |= reg;
01114 
01115       /* Skip whitespace.  */
01116       while (ISSPACE (* op_end))
01117        ++ op_end;
01118 
01119       if (* op_end == ',')
01120        {
01121          op_end = parse_imm (op_end + 1, & reg, 0, 31);
01122          /* Immediate values of 0 -> 6 translate to movi.  */
01123          if (reg <= 6)
01124            {
01125              inst = (inst & 0xF) | MCORE_INST_BGENI_ALT;
01126              reg = 0x1 << reg;
01127              as_warn (_("translating bgeni to movi"));
01128            }
01129          inst &= ~ 0x01f0;
01130          inst |= reg << 4;
01131        }
01132       else
01133        as_bad (_("second operand missing"));
01134 
01135       output = frag_more (2);
01136       break;
01137 
01138     case OBR2:       /* Like OBR, but arg is 2^n instead of n.  */
01139       op_end = parse_reg (op_end + 1, & reg);
01140       inst |= reg;
01141 
01142       /* Skip whitespace.  */
01143       while (ISSPACE (* op_end))
01144        ++ op_end;
01145 
01146       if (* op_end == ',')
01147        {
01148          op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31);
01149 
01150          /* Further restrict the immediate to a power of two.  */
01151          if ((reg & (reg - 1)) == 0)
01152            reg = mylog2 (reg);
01153          else
01154            {
01155              reg = 0;
01156              as_bad (_("immediate is not a power of two"));
01157            }
01158 
01159          /* Immediate values of 0 -> 6 translate to movi.  */
01160          if (reg <= 6)
01161            {
01162              inst = (inst & 0xF) | MCORE_INST_BGENI_ALT;
01163              reg = 0x1 << reg;
01164              as_warn (_("translating mgeni to movi"));
01165            }
01166 
01167          inst |= reg << 4;
01168        }
01169       else
01170        as_bad (_("second operand missing"));
01171 
01172       output = frag_more (2);
01173       break;
01174 
01175     case OMa: /* Specific for bmaski: imm 1->7 translate to movi.  */
01176     case OMb:
01177     case OMc:
01178       op_end = parse_reg (op_end + 1, & reg);
01179       inst |= reg;
01180 
01181       /* Skip whitespace.  */
01182       while (ISSPACE (* op_end))
01183        ++ op_end;
01184 
01185       if (* op_end == ',')
01186        {
01187          op_end = parse_imm (op_end + 1, & reg, 1, 32);
01188 
01189          /* Immediate values of 1 -> 7 translate to movi.  */
01190          if (reg <= 7)
01191            {
01192              inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT;
01193              reg = (0x1 << reg) - 1;
01194              inst |= reg << 4;
01195 
01196              as_warn (_("translating bmaski to movi"));
01197            }
01198          else
01199            {
01200              inst &= ~ 0x01F0;
01201              inst |= (reg & 0x1F) << 4;
01202            }
01203        }
01204       else
01205        as_bad (_("second operand missing"));
01206 
01207       output = frag_more (2);
01208       break;
01209 
01210     case SI:
01211       op_end = parse_reg (op_end + 1, & reg);
01212       inst |= reg;
01213 
01214       /* Skip whitespace.  */
01215       while (ISSPACE (* op_end))
01216        ++ op_end;
01217 
01218       if (* op_end == ',')
01219        {
01220          op_end = parse_imm (op_end + 1, & reg, 1, 31);
01221          inst |= reg << 4;
01222        }
01223       else
01224        as_bad (_("second operand missing"));
01225 
01226       output = frag_more (2);
01227       break;
01228 
01229     case I7:
01230       op_end = parse_reg (op_end + 1, & reg);
01231       inst |= reg;
01232 
01233       /* Skip whitespace.  */
01234       while (ISSPACE (* op_end))
01235        ++ op_end;
01236 
01237       if (* op_end == ',')
01238        {
01239          op_end = parse_imm (op_end + 1, & reg, 0, 0x7F);
01240          inst |= reg << 4;
01241        }
01242       else
01243        as_bad (_("second operand missing"));
01244 
01245       output = frag_more (2);
01246       break;
01247 
01248     case LS:
01249       op_end = parse_reg (op_end + 1, & reg);
01250       inst |= reg << 8;
01251 
01252       /* Skip whitespace.  */
01253       while (ISSPACE (* op_end))
01254        ++ op_end;
01255 
01256       if (* op_end == ',')
01257        {
01258          int size;
01259 
01260          if ((inst & 0x6000) == 0)
01261            size = 4;
01262          else if ((inst & 0x6000) == 0x4000)
01263            size = 2;
01264          else if ((inst & 0x6000) == 0x2000)
01265            size = 1;
01266          else
01267            abort ();
01268 
01269          op_end = parse_mem (op_end + 1, & reg, & off, size);
01270 
01271          if (off > 16)
01272            as_bad (_("displacement too large (%d)"), off);
01273          else
01274            inst |= (reg) | (off << 4);
01275        }
01276       else
01277        as_bad (_("second operand missing"));
01278 
01279       output = frag_more (2);
01280       break;
01281 
01282     case LR:
01283       op_end = parse_reg (op_end + 1, & reg);
01284 
01285       if (reg == 0 || reg == 15)
01286        as_bad (_("Invalid register: r0 and r15 illegal"));
01287 
01288       inst |= (reg << 8);
01289 
01290       /* Skip whitespace.  */
01291       while (ISSPACE (* op_end))
01292        ++ op_end;
01293 
01294       if (* op_end == ',')
01295        {
01296          /* parse_rt calls frag_more() for us.  */
01297          input_line_pointer = parse_rt (op_end + 1, & output, 0, 0);
01298          op_end = input_line_pointer;
01299        }
01300       else
01301        {
01302          as_bad (_("second operand missing"));
01303          output = frag_more (2);          /* save its space */
01304        }
01305       break;
01306 
01307     case LJ:
01308       input_line_pointer = parse_rt (op_end + 1, & output, 1, 0);
01309       /* parse_rt() calls frag_more() for us.  */
01310       op_end = input_line_pointer;
01311       break;
01312 
01313     case RM:
01314       op_end = parse_reg (op_end + 1, & reg);
01315 
01316       if (reg == 0 || reg == 15)
01317        as_bad (_("bad starting register: r0 and r15 invalid"));
01318 
01319       inst |= reg;
01320 
01321       /* Skip whitespace.  */
01322       while (ISSPACE (* op_end))
01323        ++ op_end;
01324 
01325       if (* op_end == '-')
01326        {
01327          op_end = parse_reg (op_end + 1, & reg);
01328 
01329          if (reg != 15)
01330            as_bad (_("ending register must be r15"));
01331 
01332          /* Skip whitespace.  */
01333          while (ISSPACE (* op_end))
01334            ++ op_end;
01335        }
01336 
01337       if (* op_end == ',')
01338        {
01339          op_end ++;
01340 
01341          /* Skip whitespace.  */
01342          while (ISSPACE (* op_end))
01343            ++ op_end;
01344 
01345          if (* op_end == '(')
01346            {
01347              op_end = parse_reg (op_end + 1, & reg);
01348 
01349              if (reg != 0)
01350               as_bad (_("bad base register: must be r0"));
01351 
01352              if (* op_end == ')')
01353               op_end ++;
01354            }
01355          else
01356            as_bad (_("base register expected"));
01357        }
01358       else
01359        as_bad (_("second operand missing"));
01360 
01361       output = frag_more (2);
01362       break;
01363 
01364     case RQ:
01365       op_end = parse_reg (op_end + 1, & reg);
01366 
01367       if (reg != 4)
01368        as_fatal (_("first register must be r4"));
01369 
01370       /* Skip whitespace.  */
01371       while (ISSPACE (* op_end))
01372        ++ op_end;
01373 
01374       if (* op_end == '-')
01375        {
01376          op_end = parse_reg (op_end + 1, & reg);
01377 
01378          if (reg != 7)
01379            as_fatal (_("last register must be r7"));
01380 
01381          /* Skip whitespace.  */
01382          while (ISSPACE (* op_end))
01383            ++ op_end;
01384 
01385          if (* op_end == ',')
01386            {
01387              op_end ++;
01388 
01389              /* Skip whitespace.  */
01390              while (ISSPACE (* op_end))
01391               ++ op_end;
01392 
01393              if (* op_end == '(')
01394               {
01395                 op_end = parse_reg (op_end + 1, & reg);
01396 
01397                 if (reg >= 4 && reg <= 7)
01398                   as_fatal ("base register cannot be r4, r5, r6, or r7");
01399 
01400                 inst |= reg;
01401 
01402                 /* Skip whitespace.  */
01403                 while (ISSPACE (* op_end))
01404                   ++ op_end;
01405 
01406                 if (* op_end == ')')
01407                   op_end ++;
01408               }
01409              else
01410               as_bad (_("base register expected"));
01411            }
01412          else
01413            as_bad (_("second operand missing"));
01414        }
01415       else
01416        as_bad (_("reg-reg expected"));
01417 
01418       output = frag_more (2);
01419       break;
01420 
01421     case BR:
01422       input_line_pointer = parse_exp (op_end + 1, & e);
01423       op_end = input_line_pointer;
01424 
01425       output = frag_more (2);
01426 
01427       fix_new_exp (frag_now, output-frag_now->fr_literal,
01428                  2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2);
01429       break;
01430 
01431     case BL:
01432       op_end = parse_reg (op_end + 1, & reg);
01433       inst |= reg << 4;
01434 
01435       /* Skip whitespace.  */
01436       while (ISSPACE (* op_end))
01437        ++ op_end;
01438 
01439       if (* op_end == ',')
01440        {
01441          op_end = parse_exp (op_end + 1, & e);
01442          output = frag_more (2);
01443 
01444          fix_new_exp (frag_now, output-frag_now->fr_literal,
01445                      2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2);
01446        }
01447       else
01448        {
01449          as_bad (_("second operand missing"));
01450          output = frag_more (2);
01451        }
01452       break;
01453 
01454     case JC:
01455       input_line_pointer = parse_exp (op_end + 1, & e);
01456       op_end = input_line_pointer;
01457 
01458       output = frag_var (rs_machine_dependent,
01459                       md_relax_table[C (COND_JUMP, DISP32)].rlx_length,
01460                       md_relax_table[C (COND_JUMP, DISP12)].rlx_length,
01461                       C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0);
01462       isize = C32_LEN;
01463       break;
01464 
01465     case JU:
01466       input_line_pointer = parse_exp (op_end + 1, & e);
01467       op_end = input_line_pointer;
01468 
01469       output = frag_var (rs_machine_dependent,
01470                       md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length,
01471                       md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length,
01472                       C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0);
01473       isize = U32_LEN;
01474       break;
01475 
01476     case JL:
01477       inst = MCORE_INST_JSRI;             /* jsri */
01478       input_line_pointer = parse_rt (op_end + 1, & output, 1, & e);
01479       /* parse_rt() calls frag_more for us.  */
01480       op_end = input_line_pointer;
01481 
01482       /* Only do this if we know how to do it ...  */
01483       if (e.X_op != O_absent && do_jsri2bsr)
01484        {
01485          /* Look at adding the R_PCREL_JSRIMM11BY2.  */
01486          fix_new_exp (frag_now, output-frag_now->fr_literal,
01487                      2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2);
01488        }
01489       break;
01490 
01491     case RSI:
01492       /* SI, but imm becomes 32-imm.  */
01493       op_end = parse_reg (op_end + 1, & reg);
01494       inst |= reg;
01495 
01496       /* Skip whitespace.  */
01497       while (ISSPACE (* op_end))
01498        ++ op_end;
01499 
01500       if (* op_end == ',')
01501        {
01502          op_end = parse_imm (op_end + 1, & reg, 1, 31);
01503 
01504          reg = 32 - reg;
01505          inst |= reg << 4;
01506        }
01507       else
01508        as_bad (_("second operand missing"));
01509 
01510       output = frag_more (2);
01511       break;
01512 
01513     case DO21:                     /* O2, dup rd, lit must be 1 */
01514       op_end = parse_reg (op_end + 1, & reg);
01515       inst |= reg;
01516       inst |= reg << 4;
01517 
01518       /* Skip whitespace.  */
01519       while (ISSPACE (* op_end))
01520        ++ op_end;
01521 
01522       if (* op_end == ',')
01523        {
01524          op_end = parse_imm (op_end + 1, & reg, 1, 31);
01525 
01526          if (reg != 1)
01527            as_bad (_("second operand must be 1"));
01528        }
01529       else
01530        as_bad (_("second operand missing"));
01531 
01532       output = frag_more (2);
01533       break;
01534 
01535     case SIa:
01536       op_end = parse_reg (op_end + 1, & reg);
01537       inst |= reg;
01538 
01539       /* Skip whitespace.  */
01540       while (ISSPACE (* op_end))
01541        ++ op_end;
01542 
01543       if (* op_end == ',')
01544        {
01545          op_end = parse_imm (op_end + 1, & reg, 1, 31);
01546 
01547          if (reg == 0)
01548            as_bad (_("zero used as immediate value"));
01549 
01550          inst |= reg << 4;
01551        }
01552       else
01553        as_bad (_("second operand missing"));
01554 
01555       output = frag_more (2);
01556       break;
01557 
01558     case OPSR:
01559       if (cpu == M210)
01560        {
01561          as_bad (_("M340 specific opcode used when assembling for M210"));
01562          break;
01563        }
01564 
01565       op_end = parse_psrmod (op_end + 1, & reg);
01566 
01567       /* Look for further selectors.  */
01568       while (* op_end == ',')
01569        {
01570          unsigned value;
01571 
01572          op_end = parse_psrmod (op_end + 1, & value);
01573 
01574          if (value & reg)
01575            as_bad (_("duplicated psr bit specifier"));
01576 
01577          reg |= value;
01578        }
01579 
01580       if (reg > 8)
01581        as_bad (_("`af' must appear alone"));
01582 
01583       inst |= (reg & 0x7);
01584       output = frag_more (2);
01585       break;
01586 
01587     default:
01588       as_bad (_("unimplemented opcode \"%s\""), name);
01589     }
01590 
01591   /* Drop whitespace after all the operands have been parsed.  */
01592   while (ISSPACE (* op_end))
01593     op_end ++;
01594 
01595   /* Give warning message if the insn has more operands than required.  */
01596   if (strcmp (op_end, opcode->name) && strcmp (op_end, ""))
01597     as_warn (_("ignoring operands: %s "), op_end);
01598 
01599   output[0] = INST_BYTE0 (inst);
01600   output[1] = INST_BYTE1 (inst);
01601 
01602   check_literals (opcode->transfer, isize);
01603 }
01604 
01605 symbolS *
01606 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
01607 {
01608   return 0;
01609 }
01610 
01611 void
01612 md_mcore_end (void)
01613 {
01614   dump_literals (0);
01615   subseg_set (text_section, 0);
01616 }
01617 
01618 /* Various routines to kill one day.  */
01619 /* Equal to MAX_PRECISION in atof-ieee.c.  */
01620 #define MAX_LITTLENUMS 6
01621 
01622 /* Turn a string in input_line_pointer into a floating point constant of type
01623    type, and store the appropriate bytes in *litP.  The number of LITTLENUMS
01624    emitted is stored in *sizeP.  An error message is returned, or NULL on OK.  */
01625 
01626 char *
01627 md_atof (int type,  char * litP, int * sizeP)
01628 {
01629   int prec;
01630   LITTLENUM_TYPE words[MAX_LITTLENUMS];
01631   int    i;
01632   char * t;
01633 
01634   switch (type)
01635     {
01636     case 'f':
01637     case 'F':
01638     case 's':
01639     case 'S':
01640       prec = 2;
01641       break;
01642 
01643     case 'd':
01644     case 'D':
01645     case 'r':
01646     case 'R':
01647       prec = 4;
01648       break;
01649 
01650     case 'x':
01651     case 'X':
01652       prec = 6;
01653       break;
01654 
01655     case 'p':
01656     case 'P':
01657       prec = 6;
01658       break;
01659 
01660     default:
01661       *sizeP = 0;
01662       return _("Bad call to MD_NTOF()");
01663     }
01664 
01665   t = atof_ieee (input_line_pointer, type, words);
01666 
01667   if (t)
01668     input_line_pointer = t;
01669 
01670   *sizeP = prec * sizeof (LITTLENUM_TYPE);
01671 
01672   if (! target_big_endian)
01673     {
01674       for (i = prec - 1; i >= 0; i--)
01675        {
01676          md_number_to_chars (litP, (valueT) words[i],
01677                            sizeof (LITTLENUM_TYPE));
01678          litP += sizeof (LITTLENUM_TYPE);
01679        }
01680     }
01681   else
01682     for (i = 0; i < prec; i++)
01683       {
01684        md_number_to_chars (litP, (valueT) words[i],
01685                          sizeof (LITTLENUM_TYPE));
01686        litP += sizeof (LITTLENUM_TYPE);
01687       }
01688 
01689   return 0;
01690 }
01691 
01692 const char * md_shortopts = "";
01693 
01694 enum options
01695 {
01696   OPTION_JSRI2BSR_ON = OPTION_MD_BASE,
01697   OPTION_JSRI2BSR_OFF,
01698   OPTION_SIFILTER_ON,
01699   OPTION_SIFILTER_OFF,
01700   OPTION_CPU,
01701   OPTION_EB,
01702   OPTION_EL,
01703 };
01704 
01705 struct option md_longopts[] =
01706 {
01707   { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF},
01708   { "jsri2bsr",    no_argument, NULL, OPTION_JSRI2BSR_ON},
01709   { "sifilter",    no_argument, NULL, OPTION_SIFILTER_ON},
01710   { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF},
01711   { "cpu",         required_argument, NULL, OPTION_CPU},
01712   { "EB",          no_argument, NULL, OPTION_EB},
01713   { "EL",          no_argument, NULL, OPTION_EL},
01714   { NULL,          no_argument, NULL, 0}
01715 };
01716 
01717 size_t md_longopts_size = sizeof (md_longopts);
01718 
01719 int
01720 md_parse_option (int c, char * arg)
01721 {
01722   switch (c)
01723     {
01724     case OPTION_CPU:
01725       if (streq (arg, "210"))
01726        {
01727          cpu = M210;
01728          target_big_endian = 1;
01729        }
01730       else if (streq (arg, "340"))
01731        cpu = M340;
01732       else
01733        as_warn (_("unrecognised cpu type '%s'"), arg);
01734       break;
01735 
01736     case OPTION_EB: target_big_endian = 1; break;
01737     case OPTION_EL: target_big_endian = 0; cpu = M340; break;
01738     case OPTION_JSRI2BSR_ON:  do_jsri2bsr = 1;   break;
01739     case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0;   break;
01740     case OPTION_SIFILTER_ON:  sifilter_mode = 1; break;
01741     case OPTION_SIFILTER_OFF: sifilter_mode = 0; break;
01742     default:                  return 0;
01743     }
01744 
01745   return 1;
01746 }
01747 
01748 void
01749 md_show_usage (FILE * stream)
01750 {
01751   fprintf (stream, _("\
01752 MCORE specific options:\n\
01753   -{no-}jsri2bsr       {dis}able jsri to bsr transformation (def: dis)\n\
01754   -{no-}sifilter       {dis}able silicon filter behavior (def: dis)\n\
01755   -cpu=[210|340]          select CPU type\n\
01756   -EB                     assemble for a big endian system (default)\n\
01757   -EL                     assemble for a little endian system\n"));
01758 }
01759 
01760 int md_short_jump_size;
01761 
01762 void
01763 md_create_short_jump (char * ptr ATTRIBUTE_UNUSED,
01764                     addressT from_Nddr ATTRIBUTE_UNUSED,
01765                     addressT to_Nddr ATTRIBUTE_UNUSED,
01766                     fragS * frag ATTRIBUTE_UNUSED,
01767                     symbolS * to_symbol ATTRIBUTE_UNUSED)
01768 {
01769   as_fatal (_("failed sanity check: short_jump"));
01770 }
01771 
01772 void
01773 md_create_long_jump (char * ptr ATTRIBUTE_UNUSED,
01774                    addressT from_Nddr ATTRIBUTE_UNUSED,
01775                    addressT to_Nddr ATTRIBUTE_UNUSED,
01776                    fragS * frag ATTRIBUTE_UNUSED,
01777                    symbolS * to_symbol ATTRIBUTE_UNUSED)
01778 {
01779   as_fatal (_("failed sanity check: long_jump"));
01780 }
01781 
01782 /* Called after relaxing, change the frags so they know how big they are.  */
01783 
01784 void
01785 md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
01786                segT sec ATTRIBUTE_UNUSED,
01787                fragS * fragP)
01788 {
01789   char *buffer;
01790   int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
01791 
01792   buffer = fragP->fr_fix + fragP->fr_literal;
01793 
01794   switch (fragP->fr_subtype)
01795     {
01796     case C (COND_JUMP, DISP12):
01797     case C (UNCD_JUMP, DISP12):
01798       {
01799        /* Get the address of the end of the instruction.  */
01800        int next_inst = fragP->fr_fix + fragP->fr_address + 2;
01801        unsigned char t0;
01802        int disp = targ_addr - next_inst;
01803 
01804        if (disp & 1)
01805          as_bad (_("odd displacement at %x"), next_inst - 2);
01806 
01807        disp >>= 1;
01808 
01809        if (! target_big_endian)
01810          {
01811            t0 = buffer[1] & 0xF8;
01812 
01813            md_number_to_chars (buffer, disp, 2);
01814 
01815            buffer[1] = (buffer[1] & 0x07) | t0;
01816          }
01817        else
01818          {
01819            t0 = buffer[0] & 0xF8;
01820 
01821            md_number_to_chars (buffer, disp, 2);
01822 
01823            buffer[0] = (buffer[0] & 0x07) | t0;
01824          }
01825 
01826        fragP->fr_fix += 2;
01827       }
01828       break;
01829 
01830     case C (COND_JUMP, DISP32):
01831     case C (COND_JUMP, UNDEF_WORD_DISP):
01832       {
01833        /* A conditional branch wont fit into 12 bits so:
01834               b!cond 1f
01835               jmpi   0f
01836               .align 2
01837           0:  .long disp
01838           1:
01839          
01840           If the b!cond is 4 byte aligned, the literal which would
01841           go at x+4 will also be aligned.  */
01842        int first_inst = fragP->fr_fix + fragP->fr_address;
01843        int needpad = (first_inst & 3);
01844 
01845        if (! target_big_endian)
01846          buffer[1] ^= 0x08;
01847        else
01848          buffer[0] ^= 0x08; /* Toggle T/F bit.  */
01849 
01850        buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi.  */
01851        buffer[3] = INST_BYTE1 (MCORE_INST_JMPI);
01852 
01853        if (needpad)
01854          {
01855            if (! target_big_endian)
01856              {
01857               buffer[0] = 4;       /* Branch over jmpi, pad, and ptr.  */
01858               buffer[2] = 1;       /* Jmpi offset of 1 gets the pointer.  */
01859              }
01860            else
01861              {
01862               buffer[1] = 4;       /* Branch over jmpi, pad, and ptr.  */
01863               buffer[3] = 1;       /* Jmpi offset of 1 gets the pointer.  */
01864              }
01865 
01866            buffer[4] = 0;   /* Alignment/pad.  */
01867            buffer[5] = 0;
01868            buffer[6] = 0;   /* Space for 32 bit address.  */
01869            buffer[7] = 0;
01870            buffer[8] = 0;
01871            buffer[9] = 0;
01872 
01873            /* Make reloc for the long disp.  */
01874            fix_new (fragP, fragP->fr_fix + 6, 4,
01875                    fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
01876 
01877            fragP->fr_fix += C32_LEN;
01878          }
01879        else
01880          {
01881            /* See comment below about this given gas' limitations for
01882               shrinking the fragment. '3' is the amount of code that
01883               we inserted here, but '4' is right for the space we reserved
01884               for this fragment.  */
01885            if (! target_big_endian)
01886              {
01887               buffer[0] = 3;       /* Branch over jmpi, and ptr.  */
01888               buffer[2] = 0;       /* Jmpi offset of 0 gets the pointer.  */
01889              }
01890            else
01891              {
01892               buffer[1] = 3;       /* Branch over jmpi, and ptr.  */
01893               buffer[3] = 0;       /* Jmpi offset of 0 gets the pointer.  */
01894              }
01895 
01896            buffer[4] = 0;   /* Space for 32 bit address.  */
01897            buffer[5] = 0;
01898            buffer[6] = 0;
01899            buffer[7] = 0;
01900 
01901            /* Make reloc for the long disp.  */
01902            fix_new (fragP, fragP->fr_fix + 4, 4,
01903                    fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
01904            fragP->fr_fix += C32_LEN;
01905 
01906            /* Frag is actually shorter (see the other side of this ifdef)
01907               but gas isn't prepared for that.  We have to re-adjust
01908               the branch displacement so that it goes beyond the
01909               full length of the fragment, not just what we actually
01910               filled in.  */
01911            if (! target_big_endian)
01912              buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'.  */
01913            else
01914              buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'.  */
01915          }
01916       }
01917       break;
01918 
01919     case C (UNCD_JUMP, DISP32):
01920     case C (UNCD_JUMP, UNDEF_WORD_DISP):
01921       {
01922        /* An unconditional branch will not fit in 12 bits, make code which
01923           looks like:
01924               jmpi   0f
01925               .align 2
01926             0:       .long disp
01927           we need a pad if "first_inst" is 4 byte aligned.
01928           [because the natural literal place is x + 2].  */
01929        int first_inst = fragP->fr_fix + fragP->fr_address;
01930        int needpad = !(first_inst & 3);
01931 
01932        buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi.  */
01933        buffer[1] = INST_BYTE1 (MCORE_INST_JMPI);
01934 
01935        if (needpad)
01936          {
01937            if (! target_big_endian)
01938              buffer[0] = 1; /* Jmpi offset of 1 since padded.  */
01939            else
01940              buffer[1] = 1; /* Jmpi offset of 1 since padded.  */
01941            buffer[2] = 0;   /* Alignment.  */
01942            buffer[3] = 0;
01943            buffer[4] = 0;   /* Space for 32 bit address.  */
01944            buffer[5] = 0;
01945            buffer[6] = 0;
01946            buffer[7] = 0;
01947 
01948            /* Make reloc for the long disp.  */
01949            fix_new (fragP, fragP->fr_fix + 4, 4,
01950                    fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
01951 
01952            fragP->fr_fix += U32_LEN;
01953          }
01954        else
01955          {
01956            if (! target_big_endian)
01957              buffer[0] = 0; /* Jmpi offset of 0 if no pad.  */
01958            else
01959              buffer[1] = 0; /* Jmpi offset of 0 if no pad.  */
01960            buffer[2] = 0;   /* Space for 32 bit address.  */
01961            buffer[3] = 0;
01962            buffer[4] = 0;
01963            buffer[5] = 0;
01964 
01965            /* Make reloc for the long disp.  */
01966            fix_new (fragP, fragP->fr_fix + 2, 4,
01967                    fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32);
01968            fragP->fr_fix += U32_LEN;
01969          }
01970       }
01971       break;
01972 
01973     default:
01974       abort ();
01975     }
01976 }
01977 
01978 /* Applies the desired value to the specified location.
01979    Also sets up addends for 'rela' type relocations.  */
01980 
01981 void
01982 md_apply_fix (fixS *   fixP,
01983               valueT * valP,
01984               segT     segment ATTRIBUTE_UNUSED)
01985 {
01986   char *       buf  = fixP->fx_where + fixP->fx_frag->fr_literal;
01987   char *       file = fixP->fx_file ? fixP->fx_file : _("unknown");
01988   const char * symname;
01989   /* Note: use offsetT because it is signed, valueT is unsigned.  */
01990   offsetT      val  = *valP;
01991 
01992   symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
01993   /* Save this for the addend in the relocation record.  */
01994   fixP->fx_addnumber = val;
01995 
01996   if (fixP->fx_addsy != NULL)
01997     {
01998 #ifdef OBJ_ELF
01999       /* For ELF we can just return and let the reloc that will be generated
02000         take care of everything.  For COFF we still have to insert 'val'
02001         into the insn since the addend field will be ignored.  */
02002       return;
02003 #endif
02004     }
02005   else
02006     fixP->fx_done = 1;
02007 
02008   switch (fixP->fx_r_type)
02009     {
02010       /* Second byte of 2 byte opcode.  */
02011     case BFD_RELOC_MCORE_PCREL_IMM11BY2:
02012       if ((val & 1) != 0)
02013        as_bad_where (file, fixP->fx_line,
02014                     _("odd distance branch (0x%lx bytes)"), (long) val);
02015       val /= 2;
02016       if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1))
02017        as_bad_where (file, fixP->fx_line,
02018                     _("pcrel for branch to %s too far (0x%lx)"),
02019                     symname, (long) val);
02020       if (target_big_endian)
02021        {
02022          buf[0] |= ((val >> 8) & 0x7);
02023          buf[1] |= (val & 0xff);
02024        }
02025       else
02026        {
02027          buf[1] |= ((val >> 8) & 0x7);
02028          buf[0] |= (val & 0xff);
02029        }
02030       break;
02031 
02032       /* Lower 8 bits of 2 byte opcode.  */
02033     case BFD_RELOC_MCORE_PCREL_IMM8BY4:
02034       val += 3;
02035       val /= 4;
02036       if (val & ~0xff)
02037        as_bad_where (file, fixP->fx_line,
02038                     _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"),
02039                     symname, (long) val);
02040       else if (! target_big_endian)
02041        buf[0] |= (val & 0xff);
02042       else
02043        buf[1] |= (val & 0xff);
02044       break;
02045 
02046       /* Loopt instruction.  */
02047     case BFD_RELOC_MCORE_PCREL_IMM4BY2:
02048       if ((val < -32) || (val > -2))
02049        as_bad_where (file, fixP->fx_line,
02050                     _("pcrel for loopt too far (0x%lx)"), (long) val);
02051       val /= 2;
02052       if (! target_big_endian)
02053        buf[0] |= (val & 0xf);
02054       else
02055        buf[1] |= (val & 0xf);
02056       break;
02057 
02058     case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2:
02059       /* Conditional linker map jsri to bsr.  */
02060       /* If its a local target and close enough, fix it.
02061         NB: >= -2k for backwards bsr; < 2k for forwards...  */
02062       if (fixP->fx_addsy == 0 && val >= -2048  && val < 2048)
02063        {
02064          long nval = (val / 2) & 0x7ff;
02065          nval |= MCORE_INST_BSR;
02066 
02067          /* REPLACE the instruction, don't just modify it.  */
02068          buf[0] = INST_BYTE0 (nval);
02069          buf[1] = INST_BYTE1 (nval);
02070        }
02071       else
02072        fixP->fx_done = 0;
02073       break;
02074 
02075     case BFD_RELOC_MCORE_PCREL_32:
02076     case BFD_RELOC_VTABLE_INHERIT:
02077     case BFD_RELOC_VTABLE_ENTRY:
02078       fixP->fx_done = 0;
02079       break;
02080 
02081     default:
02082       if (fixP->fx_addsy != NULL)
02083        {
02084          /* If the fix is an absolute reloc based on a symbol's
02085             address, then it cannot be resolved until the final link.  */
02086          fixP->fx_done = 0;
02087        }
02088 #ifdef OBJ_ELF
02089       else
02090 #endif
02091        {
02092          if (fixP->fx_size == 4)
02093            ;
02094          else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767)
02095            ;
02096          else if (fixP->fx_size == 1 && val >= -256 && val <= 255)
02097            ;
02098          else
02099            abort ();
02100          md_number_to_chars (buf, val, fixP->fx_size);
02101        }
02102       break;
02103     }
02104 }
02105 
02106 void
02107 md_operand (expressionS * expressionP)
02108 {
02109   /* Ignore leading hash symbol, if poresent.  */
02110   if (* input_line_pointer == '#')
02111     {
02112       input_line_pointer ++;
02113       expression (expressionP);
02114     }
02115 }
02116 
02117 int md_long_jump_size;
02118 
02119 /* Called just before address relaxation, return the length
02120    by which a fragment must grow to reach it's destination.  */
02121 int
02122 md_estimate_size_before_relax (fragS * fragP, segT segment_type)
02123 {
02124   switch (fragP->fr_subtype)
02125     {
02126     default:
02127       abort ();
02128 
02129     case C (UNCD_JUMP, UNDEF_DISP):
02130       /* Used to be a branch to somewhere which was unknown.  */
02131       if (!fragP->fr_symbol)
02132        fragP->fr_subtype = C (UNCD_JUMP, DISP12);
02133       else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
02134        fragP->fr_subtype = C (UNCD_JUMP, DISP12);
02135       else
02136        fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP);
02137       break;
02138 
02139     case C (COND_JUMP, UNDEF_DISP):
02140       /* Used to be a branch to somewhere which was unknown.  */
02141       if (fragP->fr_symbol
02142          && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
02143        /* Got a symbol and it's defined in this segment, become byte
02144           sized - maybe it will fix up */
02145        fragP->fr_subtype = C (COND_JUMP, DISP12);
02146       else if (fragP->fr_symbol)
02147        /* Its got a segment, but its not ours, so it will always be long.  */
02148        fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP);
02149       else
02150        /* We know the abs value.  */
02151        fragP->fr_subtype = C (COND_JUMP, DISP12);
02152       break;
02153 
02154     case C (UNCD_JUMP, DISP12):
02155     case C (UNCD_JUMP, DISP32):
02156     case C (UNCD_JUMP, UNDEF_WORD_DISP):
02157     case C (COND_JUMP, DISP12):
02158     case C (COND_JUMP, DISP32):
02159     case C (COND_JUMP, UNDEF_WORD_DISP):
02160       /* When relaxing a section for the second time, we don't need to
02161         do anything besides return the current size.  */
02162       break;
02163     }
02164 
02165   return md_relax_table[fragP->fr_subtype].rlx_length;
02166 }
02167 
02168 /* Put number into target byte order.  */
02169 
02170 void
02171 md_number_to_chars (char * ptr, valueT use, int nbytes)
02172 {
02173   if (target_big_endian)
02174     number_to_chars_bigendian (ptr, use, nbytes);
02175   else
02176     number_to_chars_littleendian (ptr, use, nbytes);
02177 }
02178 
02179 /* Round up a section size to the appropriate boundary.  */
02180 
02181 valueT
02182 md_section_align (segT segment ATTRIBUTE_UNUSED,
02183                 valueT size)
02184 {
02185   /* Byte alignment is fine.  */
02186   return size;
02187 }
02188 
02189 /* The location from which a PC relative jump should be calculated,
02190    given a PC relative reloc.  */
02191 
02192 long
02193 md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
02194 {
02195 #ifdef OBJ_ELF
02196   /* If the symbol is undefined or defined in another section
02197      we leave the add number alone for the linker to fix it later.
02198      Only account for the PC pre-bump (which is 2 bytes on the MCore).  */
02199   if (fixp->fx_addsy != (symbolS *) NULL
02200       && (! S_IS_DEFINED (fixp->fx_addsy)
02201          || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
02202 
02203   {
02204     assert (fixp->fx_size == 2);   /* must be an insn */
02205     return fixp->fx_size;
02206   }
02207 #endif
02208 
02209   /* The case where we are going to resolve things...  */
02210   return  fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address;
02211 }
02212 
02213 #define F(SZ,PCREL)         (((SZ) << 1) + (PCREL))
02214 #define MAP(SZ,PCREL,TYPE)  case F (SZ, PCREL): code = (TYPE); break
02215 
02216 arelent *
02217 tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
02218 {
02219   arelent * rel;
02220   bfd_reloc_code_real_type code;
02221 
02222   switch (fixp->fx_r_type)
02223     {
02224       /* These confuse the size/pcrel macro approach.  */
02225     case BFD_RELOC_VTABLE_INHERIT:
02226     case BFD_RELOC_VTABLE_ENTRY:
02227     case BFD_RELOC_MCORE_PCREL_IMM4BY2:
02228     case BFD_RELOC_MCORE_PCREL_IMM8BY4:
02229     case BFD_RELOC_MCORE_PCREL_IMM11BY2:
02230     case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2:
02231     case BFD_RELOC_RVA:
02232       code = fixp->fx_r_type;
02233       break;
02234 
02235     default:
02236       switch (F (fixp->fx_size, fixp->fx_pcrel))
02237        {
02238          MAP (1, 0, BFD_RELOC_8);
02239          MAP (2, 0, BFD_RELOC_16);
02240          MAP (4, 0, BFD_RELOC_32);
02241          MAP (1, 1, BFD_RELOC_8_PCREL);
02242          MAP (2, 1, BFD_RELOC_16_PCREL);
02243          MAP (4, 1, BFD_RELOC_32_PCREL);
02244        default:
02245          code = fixp->fx_r_type;
02246          as_bad (_("Can not do %d byte %srelocation"),
02247                 fixp->fx_size,
02248                 fixp->fx_pcrel ? _("pc-relative") : "");
02249        }
02250       break;
02251   }
02252 
02253   rel = xmalloc (sizeof (arelent));
02254   rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
02255   *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
02256   rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
02257   /* Always pass the addend along!  */
02258   rel->addend = fixp->fx_addnumber;
02259 
02260   rel->howto = bfd_reloc_type_lookup (stdoutput, code);
02261 
02262   if (rel->howto == NULL)
02263     {
02264       as_bad_where (fixp->fx_file, fixp->fx_line,
02265                   _("Cannot represent relocation type %s"),
02266                   bfd_get_reloc_code_name (code));
02267 
02268       /* Set howto to a garbage value so that we can keep going.  */
02269       rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
02270       assert (rel->howto != NULL);
02271     }
02272 
02273   return rel;
02274 }
02275 
02276 #ifdef OBJ_ELF
02277 /* See whether we need to force a relocation into the output file.
02278    This is used to force out switch and PC relative relocations when
02279    relaxing.  */
02280 int
02281 mcore_force_relocation (fixS * fix)
02282 {
02283   if (fix->fx_r_type == BFD_RELOC_RVA)
02284     return 1;
02285 
02286   return generic_force_reloc (fix);
02287 }
02288 
02289 /* Return true if the fix can be handled by GAS, false if it must
02290    be passed through to the linker.  */
02291 
02292 bfd_boolean
02293 mcore_fix_adjustable (fixS * fixP)
02294 {
02295   /* We need the symbol name for the VTABLE entries.  */
02296   if (   fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
02297       || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
02298     return 0;
02299 
02300   return 1;
02301 }
02302 #endif /* OBJ_ELF */