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cell-binutils  2.17cvs20070401
tc-h8300.c
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00001 /* tc-h8300.c -- Assemble code for the Renesas H8/300
00002    Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
00003    2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
00004 
00005    This file is part of GAS, the GNU Assembler.
00006 
00007    GAS is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 2, or (at your option)
00010    any later version.
00011 
00012    GAS is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with GAS; see the file COPYING.  If not, write to the Free
00019    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
00020    02110-1301, USA.  */
00021 
00022 /* Written By Steve Chamberlain <sac@cygnus.com>.  */
00023 
00024 #include "as.h"
00025 #include "subsegs.h"
00026 #include "dwarf2dbg.h"
00027 
00028 #define DEFINE_TABLE
00029 #define h8_opcodes ops
00030 #include "opcode/h8300.h"
00031 #include "safe-ctype.h"
00032 
00033 #ifdef OBJ_ELF
00034 #include "elf/h8.h"
00035 #endif
00036 
00037 const char comment_chars[] = ";";
00038 const char line_comment_chars[] = "#";
00039 const char line_separator_chars[] = "";
00040 
00041 static void sbranch (int);
00042 static void h8300hmode (int);
00043 static void h8300smode (int);
00044 static void h8300hnmode (int);
00045 static void h8300snmode (int);
00046 static void h8300sxmode (int);
00047 static void h8300sxnmode (int);
00048 static void pint (int);
00049 
00050 int Hmode;
00051 int Smode;
00052 int Nmode;
00053 int SXmode;
00054 
00055 #define PSIZE (Hmode && !Nmode ? L_32 : L_16)
00056 
00057 static int bsize = L_8;            /* Default branch displacement.  */
00058 
00059 struct h8_instruction
00060 {
00061   int length;
00062   int noperands;
00063   int idx;
00064   int size;
00065   const struct h8_opcode *opcode;
00066 };
00067 
00068 static struct h8_instruction *h8_instructions;
00069 
00070 static void
00071 h8300hmode (int arg ATTRIBUTE_UNUSED)
00072 {
00073   Hmode = 1;
00074   Smode = 0;
00075   if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h))
00076     as_warn (_("could not set architecture and machine"));
00077 }
00078 
00079 static void
00080 h8300smode (int arg ATTRIBUTE_UNUSED)
00081 {
00082   Smode = 1;
00083   Hmode = 1;
00084   if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s))
00085     as_warn (_("could not set architecture and machine"));
00086 }
00087 
00088 static void
00089 h8300hnmode (int arg ATTRIBUTE_UNUSED)
00090 {
00091   Hmode = 1;
00092   Smode = 0;
00093   Nmode = 1;
00094   if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300hn))
00095     as_warn (_("could not set architecture and machine"));
00096 }
00097 
00098 static void
00099 h8300snmode (int arg ATTRIBUTE_UNUSED)
00100 {
00101   Smode = 1;
00102   Hmode = 1;
00103   Nmode = 1;
00104   if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sn))
00105     as_warn (_("could not set architecture and machine"));
00106 }
00107 
00108 static void
00109 h8300sxmode (int arg ATTRIBUTE_UNUSED)
00110 {
00111   Smode = 1;
00112   Hmode = 1;
00113   SXmode = 1;
00114   if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sx))
00115     as_warn (_("could not set architecture and machine"));
00116 }
00117 
00118 static void
00119 h8300sxnmode (int arg ATTRIBUTE_UNUSED)
00120 {
00121   Smode = 1;
00122   Hmode = 1;
00123   SXmode = 1;
00124   Nmode = 1;
00125   if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sxn))
00126     as_warn (_("could not set architecture and machine"));
00127 }
00128 
00129 static void
00130 sbranch (int size)
00131 {
00132   bsize = size;
00133 }
00134 
00135 static void
00136 pint (int arg ATTRIBUTE_UNUSED)
00137 {
00138   cons (Hmode ? 4 : 2);
00139 }
00140 
00141 /* This table describes all the machine specific pseudo-ops the assembler
00142    has to support.  The fields are:
00143    pseudo-op name without dot
00144    function to call to execute this pseudo-op
00145    Integer arg to pass to the function.  */
00146 
00147 const pseudo_typeS md_pseudo_table[] =
00148 {
00149   {"h8300h",  h8300hmode,  0},
00150   {"h8300hn", h8300hnmode, 0},
00151   {"h8300s",  h8300smode,  0},
00152   {"h8300sn", h8300snmode, 0},
00153   {"h8300sx", h8300sxmode, 0},
00154   {"h8300sxn", h8300sxnmode, 0},
00155   {"sbranch", sbranch, L_8},
00156   {"lbranch", sbranch, L_16},
00157 
00158   {"int", pint, 0},
00159   {"data.b", cons, 1},
00160   {"data.w", cons, 2},
00161   {"data.l", cons, 4},
00162   {"form", listing_psize, 0},
00163   {"heading", listing_title, 0},
00164   {"import",  s_ignore, 0},
00165   {"page",    listing_eject, 0},
00166   {"program", s_ignore, 0},
00167   {0, 0, 0}
00168 };
00169 
00170 const char EXP_CHARS[] = "eE";
00171 
00172 /* Chars that mean this number is a floating point constant
00173    As in 0f12.456
00174    or    0d1.2345e12.  */
00175 const char FLT_CHARS[] = "rRsSfFdDxXpP";
00176 
00177 static struct hash_control *opcode_hash_control; /* Opcode mnemonics.  */
00178 
00179 /* This function is called once, at assembler startup time.  This
00180    should set up all the tables, etc. that the MD part of the assembler
00181    needs.  */
00182 
00183 void
00184 md_begin (void)
00185 {
00186   unsigned int nopcodes;
00187   struct h8_opcode *p, *p1;
00188   struct h8_instruction *pi;
00189   char prev_buffer[100];
00190   int idx = 0;
00191 
00192   if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300))
00193     as_warn (_("could not set architecture and machine"));
00194 
00195   opcode_hash_control = hash_new ();
00196   prev_buffer[0] = 0;
00197 
00198   nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
00199   
00200   h8_instructions = (struct h8_instruction *)
00201     xmalloc (nopcodes * sizeof (struct h8_instruction));
00202 
00203   pi = h8_instructions;
00204   p1 = h8_opcodes;
00205   /* We do a minimum amount of sorting on the opcode table; this is to
00206      make it easy to describe the mova instructions without unnecessary
00207      code duplication.
00208      Sorting only takes place inside blocks of instructions of the form
00209      X/Y, so for example mova/b, mova/w and mova/l can be intermixed.  */
00210   while (p1)
00211     {
00212       struct h8_opcode *first_skipped = 0;
00213       int len, cmplen = 0;
00214       char *src = p1->name;
00215       char *dst, *buffer;
00216 
00217       if (p1->name == 0)
00218        break;
00219       /* Strip off any . part when inserting the opcode and only enter
00220         unique codes into the hash table.  */
00221       dst = buffer = malloc (strlen (src) + 1);
00222       while (*src)
00223        {
00224          if (*src == '.')
00225            {
00226              src++;
00227              break;
00228            }
00229          if (*src == '/')
00230            cmplen = src - p1->name + 1;
00231          *dst++ = *src++;
00232        }
00233       *dst = 0;
00234       len = dst - buffer;
00235       if (cmplen == 0)
00236        cmplen = len;
00237       hash_insert (opcode_hash_control, buffer, (char *) pi);
00238       strcpy (prev_buffer, buffer);
00239       idx++;
00240 
00241       for (p = p1; p->name; p++)
00242        {
00243          /* A negative TIME is used to indicate that we've added this opcode
00244             already.  */
00245          if (p->time == -1)
00246            continue;
00247          if (strncmp (p->name, buffer, cmplen) != 0
00248              || (p->name[cmplen] != '\0' && p->name[cmplen] != '.'
00249                 && p->name[cmplen - 1] != '/'))
00250            {
00251              if (first_skipped == 0)
00252               first_skipped = p;
00253              break;
00254            }
00255          if (strncmp (p->name, buffer, len) != 0)
00256            {
00257              if (first_skipped == 0)
00258               first_skipped = p;
00259              continue;
00260            }
00261 
00262          p->time = -1;
00263          pi->size = p->name[len] == '.' ? p->name[len + 1] : 0;
00264          pi->idx = idx;
00265 
00266          /* Find the number of operands.  */
00267          pi->noperands = 0;
00268          while (pi->noperands < 3 && p->args.nib[pi->noperands] != (op_type) E)
00269            pi->noperands++;
00270 
00271          /* Find the length of the opcode in bytes.  */
00272          pi->length = 0;
00273          while (p->data.nib[pi->length * 2] != (op_type) E)
00274            pi->length++;
00275 
00276          pi->opcode = p;
00277          pi++;
00278        }
00279       p1 = first_skipped;
00280     }
00281 
00282   /* Add entry for the NULL vector terminator.  */
00283   pi->length = 0;
00284   pi->noperands = 0;
00285   pi->idx = 0;
00286   pi->size = 0;
00287   pi->opcode = 0;
00288 
00289   linkrelax = 1;
00290 }
00291 
00292 struct h8_op
00293 {
00294   op_type mode;
00295   unsigned reg;
00296   expressionS exp;
00297 };
00298 
00299 static void clever_message (const struct h8_instruction *, struct h8_op *);
00300 static void fix_operand_size (struct h8_op *, int);
00301 static void build_bytes (const struct h8_instruction *, struct h8_op *);
00302 static void do_a_fix_imm (int, int, struct h8_op *, int);
00303 static void check_operand (struct h8_op *, unsigned int, char *);
00304 static const struct h8_instruction * get_specific (const struct h8_instruction *, struct h8_op *, int) ;
00305 static char *get_operands (unsigned, char *, struct h8_op *);
00306 static void get_operand (char **, struct h8_op *, int);
00307 static int parse_reg (char *, op_type *, unsigned *, int);
00308 static char *skip_colonthing (char *, int *);
00309 static char *parse_exp (char *, struct h8_op *);
00310 
00311 static int constant_fits_width_p (struct h8_op *, unsigned int);
00312 static int constant_fits_size_p (struct h8_op *, int, int);
00313 
00314 /*
00315   parse operands
00316   WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
00317   r0l,r0h,..r7l,r7h
00318   @WREG
00319   @WREG+
00320   @-WREG
00321   #const
00322   ccr
00323 */
00324 
00325 /* Try to parse a reg name.  Return the number of chars consumed.  */
00326 
00327 static int
00328 parse_reg (char *src, op_type *mode, unsigned int *reg, int direction)
00329 {
00330   char *end;
00331   int len;
00332 
00333   /* Cribbed from get_symbol_end.  */
00334   if (!is_name_beginner (*src) || *src == '\001')
00335     return 0;
00336   end = src + 1;
00337   while ((is_part_of_name (*end) && *end != '.') || *end == '\001')
00338     end++;
00339   len = end - src;
00340 
00341   if (len == 2 && TOLOWER (src[0]) == 's' && TOLOWER (src[1]) == 'p')
00342     {
00343       *mode = PSIZE | REG | direction;
00344       *reg = 7;
00345       return len;
00346     }
00347   if (len == 3 && 
00348       TOLOWER (src[0]) == 'c' && 
00349       TOLOWER (src[1]) == 'c' && 
00350       TOLOWER (src[2]) == 'r')
00351     {
00352       *mode = CCR;
00353       *reg = 0;
00354       return len;
00355     }
00356   if (len == 3 && 
00357       TOLOWER (src[0]) == 'e' && 
00358       TOLOWER (src[1]) == 'x' && 
00359       TOLOWER (src[2]) == 'r')
00360     {
00361       *mode = EXR;
00362       *reg = 1;
00363       return len;
00364     }
00365   if (len == 3 && 
00366       TOLOWER (src[0]) == 'v' && 
00367       TOLOWER (src[1]) == 'b' && 
00368       TOLOWER (src[2]) == 'r')
00369     {
00370       *mode = VBR;
00371       *reg = 6;
00372       return len;
00373     }
00374   if (len == 3 && 
00375       TOLOWER (src[0]) == 's' && 
00376       TOLOWER (src[1]) == 'b' && 
00377       TOLOWER (src[2]) == 'r')
00378     {
00379       *mode = SBR;
00380       *reg = 7;
00381       return len;
00382     }
00383   if (len == 2 && TOLOWER (src[0]) == 'f' && TOLOWER (src[1]) == 'p')
00384     {
00385       *mode = PSIZE | REG | direction;
00386       *reg = 6;
00387       return len;
00388     }
00389   if (len == 3 && TOLOWER (src[0]) == 'e' && TOLOWER (src[1]) == 'r' &&
00390       src[2] >= '0' && src[2] <= '7')
00391     {
00392       *mode = L_32 | REG | direction;
00393       *reg = src[2] - '0';
00394       if (!Hmode)
00395        as_warn (_("Reg not valid for H8/300"));
00396       return len;
00397     }
00398   if (len == 2 && TOLOWER (src[0]) == 'e' && src[1] >= '0' && src[1] <= '7')
00399     {
00400       *mode = L_16 | REG | direction;
00401       *reg = src[1] - '0' + 8;
00402       if (!Hmode)
00403        as_warn (_("Reg not valid for H8/300"));
00404       return len;
00405     }
00406 
00407   if (TOLOWER (src[0]) == 'r')
00408     {
00409       if (src[1] >= '0' && src[1] <= '7')
00410        {
00411          if (len == 3 && TOLOWER (src[2]) == 'l')
00412            {
00413              *mode = L_8 | REG | direction;
00414              *reg = (src[1] - '0') + 8;
00415              return len;
00416            }
00417          if (len == 3 && TOLOWER (src[2]) == 'h')
00418            {
00419              *mode = L_8 | REG | direction;
00420              *reg = (src[1] - '0');
00421              return len;
00422            }
00423          if (len == 2)
00424            {
00425              *mode = L_16 | REG | direction;
00426              *reg = (src[1] - '0');
00427              return len;
00428            }
00429        }
00430     }
00431 
00432   return 0;
00433 }
00434 
00435 
00436 /* Parse an immediate or address-related constant and store it in OP.
00437    If the user also specifies the operand's size, store that size
00438    in OP->MODE, otherwise leave it for later code to decide.  */
00439 
00440 static char *
00441 parse_exp (char *src, struct h8_op *op)
00442 {
00443   char *save;
00444 
00445   save = input_line_pointer;
00446   input_line_pointer = src;
00447   expression (&op->exp);
00448   if (op->exp.X_op == O_absent)
00449     as_bad (_("missing operand"));
00450   src = input_line_pointer;
00451   input_line_pointer = save;
00452 
00453   return skip_colonthing (src, &op->mode);
00454 }
00455 
00456 
00457 /* If SRC starts with an explicit operand size, skip it and store the size
00458    in *MODE.  Leave *MODE unchanged otherwise.  */
00459 
00460 static char *
00461 skip_colonthing (char *src, int *mode)
00462 {
00463   if (*src == ':')
00464     {
00465       src++;
00466       *mode &= ~SIZE;
00467       if (src[0] == '8' && !ISDIGIT (src[1]))
00468        *mode |= L_8;
00469       else if (src[0] == '2' && !ISDIGIT (src[1]))
00470        *mode |= L_2;
00471       else if (src[0] == '3' && !ISDIGIT (src[1]))
00472        *mode |= L_3;
00473       else if (src[0] == '4' && !ISDIGIT (src[1]))
00474        *mode |= L_4;
00475       else if (src[0] == '5' && !ISDIGIT (src[1]))
00476        *mode |= L_5;
00477       else if (src[0] == '2' && src[1] == '4' && !ISDIGIT (src[2]))
00478        *mode |= L_24;
00479       else if (src[0] == '3' && src[1] == '2' && !ISDIGIT (src[2]))
00480        *mode |= L_32;
00481       else if (src[0] == '1' && src[1] == '6' && !ISDIGIT (src[2]))
00482        *mode |= L_16;
00483       else
00484        as_bad (_("invalid operand size requested"));
00485 
00486       while (ISDIGIT (*src))
00487        src++;
00488     }
00489   return src;
00490 }
00491 
00492 /* The many forms of operand:
00493 
00494    Rn                Register direct
00495    @Rn               Register indirect
00496    @(exp[:16], Rn)   Register indirect with displacement
00497    @Rn+
00498    @-Rn
00499    @aa:8             absolute 8 bit
00500    @aa:16            absolute 16 bit
00501    @aa               absolute 16 bit
00502 
00503    #xx[:size]        immediate data
00504    @(exp:[8], pc)    pc rel
00505    @@aa[:8]          memory indirect.  */
00506 
00507 static int
00508 constant_fits_width_p (struct h8_op *operand, unsigned int width)
00509 {
00510   return ((operand->exp.X_add_number & ~width) == 0
00511          || (operand->exp.X_add_number | width) == (unsigned)(~0));
00512 }
00513 
00514 static int
00515 constant_fits_size_p (struct h8_op *operand, int size, int no_symbols)
00516 {
00517   offsetT num = operand->exp.X_add_number;
00518   if (no_symbols
00519       && (operand->exp.X_add_symbol != 0 || operand->exp.X_op_symbol != 0))
00520     return 0;
00521   switch (size)
00522     {
00523     case L_2:
00524       return (num & ~3) == 0;
00525     case L_3:
00526       return (num & ~7) == 0;
00527     case L_3NZ:
00528       return num >= 1 && num < 8;
00529     case L_4:
00530       return (num & ~15) == 0;
00531     case L_5:
00532       return num >= 1 && num < 32;
00533     case L_8:
00534       return (num & ~0xFF) == 0 || ((unsigned)num | 0x7F) == ~0u;
00535     case L_8U:
00536       return (num & ~0xFF) == 0;
00537     case L_16:
00538       return (num & ~0xFFFF) == 0 || ((unsigned)num | 0x7FFF) == ~0u;
00539     case L_16U:
00540       return (num & ~0xFFFF) == 0;
00541     case L_32:
00542       return 1;
00543     default:
00544       abort ();
00545     }
00546 }
00547 
00548 static void
00549 get_operand (char **ptr, struct h8_op *op, int direction)
00550 {
00551   char *src = *ptr;
00552   op_type mode;
00553   unsigned int num;
00554   unsigned int len;
00555 
00556   op->mode = 0;
00557 
00558   /* Check for '(' and ')' for instructions ldm and stm.  */
00559   if (src[0] == '(' && src[8] == ')')
00560     ++ src;
00561 
00562   /* Gross.  Gross.  ldm and stm have a format not easily handled
00563      by get_operand.  We deal with it explicitly here.  */
00564   if (TOLOWER (src[0]) == 'e' && TOLOWER (src[1]) == 'r' && 
00565       ISDIGIT (src[2]) && src[3] == '-' &&
00566       TOLOWER (src[4]) == 'e' && TOLOWER (src[5]) == 'r' && ISDIGIT (src[6]))
00567     {
00568       int low, high;
00569 
00570       low = src[2] - '0';
00571       high = src[6] - '0';
00572 
00573        /* Check register pair's validity as per tech note TN-H8*-193A/E
00574          from Renesas for H8S and H8SX hardware manual.  */
00575       if (   !(low == 0 && (high == 1 || high == 2 || high == 3))
00576           && !(low == 1 && (high == 2 || high == 3 || high == 4) && SXmode)
00577           && !(low == 2 && (high == 3 || ((high == 4 || high == 5) && SXmode)))
00578           && !(low == 3 && (high == 4 || high == 5 || high == 6) && SXmode)
00579           && !(low == 4 && (high == 5 || high == 6))
00580           && !(low == 4 && high == 7 && SXmode)
00581           && !(low == 5 && (high == 6 || high == 7) && SXmode)
00582           && !(low == 6 && high == 7 && SXmode))
00583        as_bad (_("Invalid register list for ldm/stm\n"));
00584 
00585       /* Even sicker.  We encode two registers into op->reg.  One
00586         for the low register to save, the other for the high
00587         register to save;  we also set the high bit in op->reg
00588         so we know this is "very special".  */
00589       op->reg = 0x80000000 | (high << 8) | low;
00590       op->mode = REG;
00591       if (src[7] == ')')
00592        *ptr = src + 8;
00593       else
00594        *ptr = src + 7;
00595       return;
00596     }
00597 
00598   len = parse_reg (src, &op->mode, &op->reg, direction);
00599   if (len)
00600     {
00601       src += len;
00602       if (*src == '.')
00603        {
00604          int size = op->mode & SIZE;
00605          switch (src[1])
00606            {
00607            case 'l': case 'L':
00608              if (size != L_32)
00609               as_warn (_("mismatch between register and suffix"));
00610              op->mode = (op->mode & ~MODE) | LOWREG;
00611              break;
00612            case 'w': case 'W':
00613              if (size != L_32 && size != L_16)
00614               as_warn (_("mismatch between register and suffix"));
00615              op->mode = (op->mode & ~MODE) | LOWREG;
00616              op->mode = (op->mode & ~SIZE) | L_16;
00617              break;
00618            case 'b': case 'B':
00619              op->mode = (op->mode & ~MODE) | LOWREG;
00620              if (size != L_32 && size != L_8)
00621               as_warn (_("mismatch between register and suffix"));
00622              op->mode = (op->mode & ~MODE) | LOWREG;
00623              op->mode = (op->mode & ~SIZE) | L_8;
00624              break;
00625            default:
00626              as_warn ("invalid suffix after register.");
00627              break;
00628            }
00629          src += 2;
00630        }
00631       *ptr = src;
00632       return;
00633     }
00634 
00635   if (*src == '@')
00636     {
00637       src++;
00638       if (*src == '@')
00639        {
00640          *ptr = parse_exp (src + 1, op);
00641          if (op->exp.X_add_number >= 0x100)
00642            {
00643              int divisor = 1;
00644 
00645              op->mode = VECIND;
00646              /* FIXME : 2?  or 4?  */
00647              if (op->exp.X_add_number >= 0x400)
00648               as_bad (_("address too high for vector table jmp/jsr"));
00649              else if (op->exp.X_add_number >= 0x200)
00650               divisor = 4;
00651              else
00652               divisor = 2;
00653 
00654              op->exp.X_add_number = op->exp.X_add_number / divisor - 0x80;
00655            }
00656          else
00657            op->mode = MEMIND;
00658          return;
00659        }
00660 
00661       if (*src == '-' || *src == '+')
00662        {
00663          len = parse_reg (src + 1, &mode, &num, direction);
00664          if (len == 0)
00665            {
00666              /* Oops, not a reg after all, must be ordinary exp.  */
00667              op->mode = ABS | direction;
00668              *ptr = parse_exp (src, op);
00669              return;
00670            }
00671 
00672          if (((mode & SIZE) != PSIZE)
00673              /* For Normal mode accept 16 bit and 32 bit pointer registers.  */
00674              && (!Nmode || ((mode & SIZE) != L_32)))
00675            as_bad (_("Wrong size pointer register for architecture."));
00676 
00677          op->mode = src[0] == '-' ? RDPREDEC : RDPREINC;
00678          op->reg = num;
00679          *ptr = src + 1 + len;
00680          return;
00681        }
00682       if (*src == '(')
00683        {
00684          src++;
00685 
00686          /* See if this is @(ERn.x, PC).  */
00687          len = parse_reg (src, &mode, &op->reg, direction);
00688          if (len != 0 && (mode & MODE) == REG && src[len] == '.')
00689            {
00690              switch (TOLOWER (src[len + 1]))
00691               {
00692               case 'b':
00693                 mode = PCIDXB | direction;
00694                 break;
00695               case 'w':
00696                 mode = PCIDXW | direction;
00697                 break;
00698               case 'l':
00699                 mode = PCIDXL | direction;
00700                 break;
00701               default:
00702                 mode = 0;
00703                 break;
00704               }
00705              if (mode
00706                 && src[len + 2] == ','
00707                 && TOLOWER (src[len + 3]) != 'p' 
00708                 && TOLOWER (src[len + 4]) != 'c'
00709                 && src[len + 5] != ')')
00710               {
00711                 *ptr = src + len + 6;
00712                 op->mode |= mode;
00713                 return;
00714               }
00715              /* Fall through into disp case - the grammar is somewhat
00716                ambiguous, so we should try whether it's a DISP operand
00717                after all ("ER3.L" might be a poorly named label...).  */
00718            }
00719 
00720          /* Disp.  */
00721 
00722          /* Start off assuming a 16 bit offset.  */
00723 
00724          src = parse_exp (src, op);
00725          if (*src == ')')
00726            {
00727              op->mode |= ABS | direction;
00728              *ptr = src + 1;
00729              return;
00730            }
00731 
00732          if (*src != ',')
00733            {
00734              as_bad (_("expected @(exp, reg16)"));
00735              return;
00736            }
00737          src++;
00738 
00739          len = parse_reg (src, &mode, &op->reg, direction);
00740          if (len == 0 || (mode & MODE) != REG)
00741            {
00742              as_bad (_("expected @(exp, reg16)"));
00743              return;
00744            }
00745          src += len;
00746          if (src[0] == '.')
00747            {
00748              switch (TOLOWER (src[1]))
00749               {
00750               case 'b':
00751                 op->mode |= INDEXB | direction;
00752                 break;
00753               case 'w':
00754                 op->mode |= INDEXW | direction;
00755                 break;
00756               case 'l':
00757                 op->mode |= INDEXL | direction;
00758                 break;
00759               default:
00760                 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
00761               }
00762              src += 2;
00763              op->reg &= 7;
00764            }
00765          else
00766            op->mode |= DISP | direction;
00767          src = skip_colonthing (src, &op->mode);
00768 
00769          if (*src != ')' && '(')
00770            {
00771              as_bad (_("expected @(exp, reg16)"));
00772              return;
00773            }
00774          *ptr = src + 1;
00775          return;
00776        }
00777       len = parse_reg (src, &mode, &num, direction);
00778 
00779       if (len)
00780        {
00781          src += len;
00782          if (*src == '+' || *src == '-')
00783            {
00784              if (((mode & SIZE) != PSIZE)
00785                 /* For Normal mode accept 16 bit and 32 bit pointer registers.  */
00786                 && (!Nmode || ((mode & SIZE) != L_32)))
00787               as_bad (_("Wrong size pointer register for architecture."));
00788              op->mode = *src == '+' ? RSPOSTINC : RSPOSTDEC;
00789              op->reg = num;
00790              src++;
00791              *ptr = src;
00792              return;
00793            }
00794          if (((mode & SIZE) != PSIZE)
00795              /* For Normal mode accept 16 bit and 32 bit pointer registers.  */
00796              && (!Nmode || ((mode & SIZE) != L_32)))
00797            as_bad (_("Wrong size pointer register for architecture."));
00798 
00799          op->mode = direction | IND | PSIZE;
00800          op->reg = num;
00801          *ptr = src;
00802 
00803          return;
00804        }
00805       else
00806        {
00807          /* must be a symbol */
00808 
00809          op->mode = ABS | direction;
00810          *ptr = parse_exp (src, op);
00811          return;
00812        }
00813     }
00814 
00815   if (*src == '#')
00816     {
00817       op->mode = IMM;
00818       *ptr = parse_exp (src + 1, op);
00819       return;
00820     }
00821   else if (strncmp (src, "mach", 4) == 0 || 
00822           strncmp (src, "macl", 4) == 0 ||
00823           strncmp (src, "MACH", 4) == 0 || 
00824           strncmp (src, "MACL", 4) == 0)
00825     {
00826       op->reg = TOLOWER (src[3]) == 'l';
00827       op->mode = MACREG;
00828       *ptr = src + 4;
00829       return;
00830     }
00831   else
00832     {
00833       op->mode = PCREL;
00834       *ptr = parse_exp (src, op);
00835     }
00836 }
00837 
00838 static char *
00839 get_operands (unsigned int noperands, char *op_end, struct h8_op *operand)
00840 {
00841   char *ptr = op_end;
00842 
00843   switch (noperands)
00844     {
00845     case 0:
00846       break;
00847 
00848     case 1:
00849       ptr++;
00850       get_operand (&ptr, operand + 0, SRC);
00851       if (*ptr == ',')
00852        {
00853          ptr++;
00854          get_operand (&ptr, operand + 1, DST);
00855        }
00856       break;
00857 
00858     case 2:
00859       ptr++;
00860       get_operand (&ptr, operand + 0, SRC);
00861       if (*ptr == ',')
00862        ptr++;
00863       get_operand (&ptr, operand + 1, DST);
00864       break;
00865 
00866     case 3:
00867       ptr++;
00868       get_operand (&ptr, operand + 0, SRC);
00869       if (*ptr == ',')
00870        ptr++;
00871       get_operand (&ptr, operand + 1, DST);
00872       if (*ptr == ',')
00873        ptr++;
00874       get_operand (&ptr, operand + 2, OP3);
00875       break;
00876 
00877     default:
00878       abort ();
00879     }
00880 
00881   return ptr;
00882 }
00883 
00884 /* MOVA has special requirements.  Rather than adding twice the amount of
00885    addressing modes, we simply special case it a bit.  */
00886 static void
00887 get_mova_operands (char *op_end, struct h8_op *operand)
00888 {
00889   char *ptr = op_end;
00890 
00891   if (ptr[1] != '@' || ptr[2] != '(')
00892     goto error;
00893   ptr += 3;
00894   operand[0].mode = 0;
00895   ptr = parse_exp (ptr, &operand[0]);
00896 
00897   if (*ptr !=',')
00898     goto error;
00899   ptr++;
00900   get_operand (&ptr, operand + 1, DST);
00901 
00902   if (*ptr =='.')
00903     {
00904       ptr++;
00905       switch (*ptr++)
00906        {
00907        case 'b': case 'B':
00908          operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
00909          break;
00910        case 'w': case 'W':
00911          operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
00912          break;
00913        case 'l': case 'L':
00914          operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
00915          break;
00916        default:
00917          goto error;
00918        }
00919     }
00920   else if ((operand[1].mode & MODE) == LOWREG)
00921     {
00922       switch (operand[1].mode & SIZE) 
00923        {
00924        case L_8:
00925          operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
00926          break;
00927        case L_16:
00928          operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
00929          break;
00930        case L_32:
00931          operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
00932          break;
00933        default:
00934          goto error;
00935        }
00936     }
00937   else
00938     goto error;
00939 
00940   if (*ptr++ != ')' || *ptr++ != ',')
00941     goto error;
00942   get_operand (&ptr, operand + 2, OP3);
00943   /* See if we can use the short form of MOVA.  */
00944   if (((operand[1].mode & MODE) == REG || (operand[1].mode & MODE) == LOWREG)
00945       && (operand[2].mode & MODE) == REG
00946       && (operand[1].reg & 7) == (operand[2].reg & 7))
00947     {
00948       operand[1].mode = operand[2].mode = 0;
00949       operand[0].reg = operand[2].reg & 7;
00950     }
00951   return;
00952 
00953  error:
00954   as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
00955 }
00956 
00957 static void
00958 get_rtsl_operands (char *ptr, struct h8_op *operand)
00959 {
00960   int mode, len, type = 0;
00961   unsigned int num, num2;
00962 
00963   ptr++;
00964   if (*ptr == '(')
00965     {
00966       ptr++;
00967       type = 1;
00968     }
00969   len = parse_reg (ptr, &mode, &num, SRC);
00970   if (len == 0 || (mode & MODE) != REG)
00971     {
00972       as_bad (_("expected register"));
00973       return;
00974     }
00975   ptr += len;
00976   if (*ptr == '-')
00977     {
00978       len = parse_reg (++ptr, &mode, &num2, SRC);
00979       if (len == 0 || (mode & MODE) != REG)
00980        {
00981          as_bad (_("expected register"));
00982          return;
00983        }
00984       ptr += len;
00985       /* CONST_xxx are used as placeholders in the opcode table.  */
00986       num = num2 - num;
00987       if (num > 3)
00988        {
00989          as_bad (_("invalid register list"));
00990          return;
00991        }
00992     }
00993   else
00994     num2 = num, num = 0;
00995   if (type == 1 && *ptr++ != ')')
00996     {
00997       as_bad (_("expected closing paren"));
00998       return;
00999     }
01000   operand[0].mode = RS32;
01001   operand[1].mode = RD32;
01002   operand[0].reg = num;
01003   operand[1].reg = num2;
01004 }
01005 
01006 /* Passed a pointer to a list of opcodes which use different
01007    addressing modes, return the opcode which matches the opcodes
01008    provided.  */
01009 
01010 static const struct h8_instruction *
01011 get_specific (const struct h8_instruction *instruction,
01012              struct h8_op *operands, int size)
01013 {
01014   const struct h8_instruction *this_try = instruction;
01015   const struct h8_instruction *found_other = 0, *found_mismatched = 0;
01016   int found = 0;
01017   int this_index = instruction->idx;
01018   int noperands = 0;
01019 
01020   /* There's only one ldm/stm and it's easier to just
01021      get out quick for them.  */
01022   if (OP_KIND (instruction->opcode->how) == O_LDM
01023       || OP_KIND (instruction->opcode->how) == O_STM)
01024     return this_try;
01025 
01026   while (noperands < 3 && operands[noperands].mode != 0)
01027     noperands++;
01028 
01029   while (this_index == instruction->idx && !found)
01030     {
01031       int this_size;
01032 
01033       found = 1;
01034       this_try = instruction++;
01035       this_size = this_try->opcode->how & SN;
01036 
01037       if (this_try->noperands != noperands)
01038        found = 0;
01039       else if (this_try->noperands > 0)
01040        {
01041          int i;
01042 
01043          for (i = 0; i < this_try->noperands && found; i++)
01044            {
01045              op_type op = this_try->opcode->args.nib[i];
01046              int op_mode = op & MODE;
01047              int op_size = op & SIZE;
01048              int x = operands[i].mode;
01049              int x_mode = x & MODE;
01050              int x_size = x & SIZE;
01051 
01052              if (op_mode == LOWREG && (x_mode == REG || x_mode == LOWREG))
01053               {
01054                 if ((x_size == L_8 && (operands[i].reg & 8) == 0)
01055                     || (x_size == L_16 && (operands[i].reg & 8) == 8))
01056                   as_warn (_("can't use high part of register in operand %d"), i);
01057 
01058                 if (x_size != op_size)
01059                   found = 0;
01060               }
01061              else if (op_mode == REG)
01062               {
01063                 if (x_mode == LOWREG)
01064                   x_mode = REG;
01065                 if (x_mode != REG)
01066                   found = 0;
01067 
01068                 if (x_size == L_P)
01069                   x_size = (Hmode ? L_32 : L_16);
01070                 if (op_size == L_P)
01071                   op_size = (Hmode ? L_32 : L_16);
01072 
01073                 /* The size of the reg is v important.  */
01074                 if (op_size != x_size)
01075                   found = 0;
01076               }
01077              else if (op_mode & CTRL)     /* control register */
01078               {
01079                 if (!(x_mode & CTRL))
01080                   found = 0;
01081 
01082                 switch (x_mode)
01083                   {
01084                   case CCR:
01085                     if (op_mode != CCR &&
01086                        op_mode != CCR_EXR &&
01087                        op_mode != CC_EX_VB_SB)
01088                      found = 0;
01089                     break;
01090                   case EXR:
01091                     if (op_mode != EXR &&
01092                        op_mode != CCR_EXR &&
01093                        op_mode != CC_EX_VB_SB)
01094                      found = 0;
01095                     break;
01096                   case MACH:
01097                     if (op_mode != MACH &&
01098                        op_mode != MACREG)
01099                      found = 0;
01100                     break;
01101                   case MACL:
01102                     if (op_mode != MACL &&
01103                        op_mode != MACREG)
01104                      found = 0;
01105                     break;
01106                   case VBR:
01107                     if (op_mode != VBR &&
01108                        op_mode != VBR_SBR &&
01109                        op_mode != CC_EX_VB_SB)
01110                      found = 0;
01111                     break;
01112                   case SBR:
01113                     if (op_mode != SBR &&
01114                        op_mode != VBR_SBR &&
01115                        op_mode != CC_EX_VB_SB)
01116                      found = 0;
01117                     break;
01118                   }
01119               }
01120              else if ((op & ABSJMP) && (x_mode == ABS || x_mode == PCREL))
01121               {
01122                 operands[i].mode &= ~MODE;
01123                 operands[i].mode |= ABSJMP;
01124                 /* But it may not be 24 bits long.  */
01125                 if (x_mode == ABS && !Hmode)
01126                   {
01127                     operands[i].mode &= ~SIZE;
01128                     operands[i].mode |= L_16;
01129                   }
01130                 if ((operands[i].mode & SIZE) == L_32
01131                     && (op_mode & SIZE) != L_32)
01132                  found = 0;
01133               }
01134              else if (x_mode == IMM && op_mode != IMM)
01135               {
01136                 offsetT num = operands[i].exp.X_add_number;
01137                 if (op_mode == KBIT || op_mode == DBIT)
01138                   /* This is ok if the immediate value is sensible.  */;
01139                 else if (op_mode == CONST_2)
01140                   found = num == 2;
01141                 else if (op_mode == CONST_4)
01142                   found = num == 4;
01143                 else if (op_mode == CONST_8)
01144                   found = num == 8;
01145                 else if (op_mode == CONST_16)
01146                   found = num == 16;
01147                 else
01148                   found = 0;
01149               }
01150              else if (op_mode == PCREL && op_mode == x_mode)
01151               {
01152                 /* movsd, bsr/bc and bsr/bs only come in PCREL16 flavour:
01153                    If x_size is L_8, promote it.  */
01154                 if (OP_KIND (this_try->opcode->how) == O_MOVSD
01155                     || OP_KIND (this_try->opcode->how) == O_BSRBC
01156                     || OP_KIND (this_try->opcode->how) == O_BSRBS)
01157                   if (x_size == L_8)
01158                     x_size = L_16;
01159 
01160                 /* The size of the displacement is important.  */
01161                 if (op_size != x_size)
01162                   found = 0;
01163               }
01164              else if ((op_mode == DISP || op_mode == IMM || op_mode == ABS
01165                      || op_mode == INDEXB || op_mode == INDEXW
01166                      || op_mode == INDEXL)
01167                      && op_mode == x_mode)
01168               {
01169                 /* Promote a L_24 to L_32 if it makes us match.  */
01170                 if (x_size == L_24 && op_size == L_32)
01171                   {
01172                     x &= ~SIZE;
01173                     x |= x_size = L_32;
01174                   }
01175 
01176                 if (((x_size == L_16 && op_size == L_16U)
01177                      || (x_size == L_8 && op_size == L_8U)
01178                      || (x_size == L_3 && op_size == L_3NZ))
01179                     /* We're deliberately more permissive for ABS modes.  */
01180                     && (op_mode == ABS
01181                        || constant_fits_size_p (operands + i, op_size,
01182                                              op & NO_SYMBOLS)))
01183                   x_size = op_size;
01184 
01185                 if (x_size != 0 && op_size != x_size)
01186                   found = 0;
01187                 else if (x_size == 0
01188                         && ! constant_fits_size_p (operands + i, op_size,
01189                                                 op & NO_SYMBOLS))
01190                   found = 0;
01191               }
01192              else if (op_mode != x_mode)
01193               {
01194                 found = 0;
01195               }
01196            }
01197        }
01198       if (found)
01199        {
01200          if ((this_try->opcode->available == AV_H8SX && ! SXmode)
01201              || (this_try->opcode->available == AV_H8S && ! Smode)
01202              || (this_try->opcode->available == AV_H8H && ! Hmode))
01203            found = 0, found_other = this_try;
01204          else if (this_size != size && (this_size != SN && size != SN))
01205            found_mismatched = this_try, found = 0;
01206 
01207        }
01208     }
01209   if (found)
01210     return this_try;
01211   if (found_other)
01212     {
01213       as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
01214               found_other->opcode->name,
01215               (! Hmode && ! Smode ? "H8/300"
01216               : SXmode ? "H8sx"
01217               : Smode ? "H8/300S"
01218               : "H8/300H"));
01219     }
01220   else if (found_mismatched)
01221     {
01222       as_warn (_("mismatch between opcode size and operand size"));
01223       return found_mismatched;
01224     }
01225   return 0;
01226 }
01227 
01228 static void
01229 check_operand (struct h8_op *operand, unsigned int width, char *string)
01230 {
01231   if (operand->exp.X_add_symbol == 0
01232       && operand->exp.X_op_symbol == 0)
01233     {
01234       /* No symbol involved, let's look at offset, it's dangerous if
01235         any of the high bits are not 0 or ff's, find out by oring or
01236         anding with the width and seeing if the answer is 0 or all
01237         fs.  */
01238 
01239       if (! constant_fits_width_p (operand, width))
01240        {
01241          if (width == 255
01242              && (operand->exp.X_add_number & 0xff00) == 0xff00)
01243            {
01244              /* Just ignore this one - which happens when trying to
01245                fit a 16 bit address truncated into an 8 bit address
01246                of something like bset.  */
01247            }
01248          else if (strcmp (string, "@") == 0
01249                  && width == 0xffff
01250                  && (operand->exp.X_add_number & 0xff8000) == 0xff8000)
01251            {
01252              /* Just ignore this one - which happens when trying to
01253                fit a 24 bit address truncated into a 16 bit address
01254                of something like mov.w.  */
01255            }
01256          else
01257            {
01258              as_warn (_("operand %s0x%lx out of range."), string,
01259                      (unsigned long) operand->exp.X_add_number);
01260            }
01261        }
01262     }
01263 }
01264 
01265 /* RELAXMODE has one of 3 values:
01266 
01267    0 Output a "normal" reloc, no relaxing possible for this insn/reloc
01268 
01269    1 Output a relaxable 24bit absolute mov.w address relocation
01270      (may relax into a 16bit absolute address).
01271 
01272    2 Output a relaxable 16/24 absolute mov.b address relocation
01273      (may relax into an 8bit absolute address).  */
01274 
01275 static void
01276 do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode)
01277 {
01278   int idx;
01279   int size;
01280   int where;
01281   char *bytes = frag_now->fr_literal + offset;
01282 
01283   char *t = ((operand->mode & MODE) == IMM) ? "#" : "@";
01284 
01285   if (operand->exp.X_add_symbol == 0)
01286     {
01287       switch (operand->mode & SIZE)
01288        {
01289        case L_2:
01290          check_operand (operand, 0x3, t);
01291          bytes[0] |= (operand->exp.X_add_number & 3) << (nibble ? 0 : 4);
01292          break;
01293        case L_3:
01294        case L_3NZ:
01295          check_operand (operand, 0x7, t);
01296          bytes[0] |= (operand->exp.X_add_number & 7) << (nibble ? 0 : 4);
01297          break;
01298        case L_4:
01299          check_operand (operand, 0xF, t);
01300          bytes[0] |= (operand->exp.X_add_number & 15) << (nibble ? 0 : 4);
01301          break;
01302        case L_5:
01303          check_operand (operand, 0x1F, t);
01304          bytes[0] |= operand->exp.X_add_number & 31;
01305          break;
01306        case L_8:
01307        case L_8U:
01308          check_operand (operand, 0xff, t);
01309          bytes[0] |= operand->exp.X_add_number;
01310          break;
01311        case L_16:
01312        case L_16U:
01313          check_operand (operand, 0xffff, t);
01314          bytes[0] |= operand->exp.X_add_number >> 8;
01315          bytes[1] |= operand->exp.X_add_number >> 0;
01316          break;
01317        case L_24:
01318          check_operand (operand, 0xffffff, t);
01319          bytes[0] |= operand->exp.X_add_number >> 16;
01320          bytes[1] |= operand->exp.X_add_number >> 8;
01321          bytes[2] |= operand->exp.X_add_number >> 0;
01322          break;
01323 
01324        case L_32:
01325          /* This should be done with bfd.  */
01326          bytes[0] |= operand->exp.X_add_number >> 24;
01327          bytes[1] |= operand->exp.X_add_number >> 16;
01328          bytes[2] |= operand->exp.X_add_number >> 8;
01329          bytes[3] |= operand->exp.X_add_number >> 0;
01330          if (relaxmode != 0)
01331            {
01332              idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
01333              fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
01334            }
01335          break;
01336        }
01337     }
01338   else
01339     {
01340       switch (operand->mode & SIZE)
01341        {
01342        case L_24:
01343        case L_32:
01344          size = 4;
01345          where = (operand->mode & SIZE) == L_24 ? -1 : 0;
01346          if (relaxmode == 2)
01347            idx = R_MOV24B1;
01348          else if (relaxmode == 1)
01349            idx = R_MOVL1;
01350          else
01351            idx = R_RELLONG;
01352          break;
01353        default:
01354          as_bad (_("Can't work out size of operand.\n"));
01355        case L_16:
01356        case L_16U:
01357          size = 2;
01358          where = 0;
01359          if (relaxmode == 2)
01360            idx = R_MOV16B1;
01361          else
01362            idx = R_RELWORD;
01363          operand->exp.X_add_number =
01364            ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
01365          operand->exp.X_add_number |= (bytes[0] << 8) | bytes[1];
01366          break;
01367        case L_8:
01368          size = 1;
01369          where = 0;
01370          idx = R_RELBYTE;
01371          operand->exp.X_add_number =
01372            ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
01373          operand->exp.X_add_number |= bytes[0];
01374        }
01375 
01376       fix_new_exp (frag_now,
01377                  offset + where,
01378                  size,
01379                  &operand->exp,
01380                  0,
01381                  idx);
01382     }
01383 }
01384 
01385 /* Now we know what sort of opcodes it is, let's build the bytes.  */
01386 
01387 static void
01388 build_bytes (const struct h8_instruction *this_try, struct h8_op *operand)
01389 {
01390   int i;
01391   char *output = frag_more (this_try->length);
01392   const op_type *nibble_ptr = this_try->opcode->data.nib;
01393   op_type c;
01394   unsigned int nibble_count = 0;
01395   int op_at[3];
01396   int nib = 0;
01397   int movb = 0;
01398   char asnibbles[100];
01399   char *p = asnibbles;
01400   int high, low;
01401 
01402   if (!Hmode && this_try->opcode->available != AV_H8)
01403     as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
01404             this_try->opcode->name);
01405   else if (!Smode 
01406           && this_try->opcode->available != AV_H8 
01407           && this_try->opcode->available != AV_H8H)
01408     as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
01409             this_try->opcode->name);
01410   else if (!SXmode 
01411           && this_try->opcode->available != AV_H8
01412           && this_try->opcode->available != AV_H8H
01413           && this_try->opcode->available != AV_H8S)
01414     as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
01415             this_try->opcode->name);
01416 
01417   while (*nibble_ptr != (op_type) E)
01418     {
01419       int d;
01420 
01421       nib = 0;
01422       c = *nibble_ptr++;
01423 
01424       d = (c & OP3) == OP3 ? 2 : (c & DST) == DST ? 1 : 0;
01425 
01426       if (c < 16)
01427        nib = c;
01428       else
01429        {
01430          int c2 = c & MODE;
01431 
01432          if (c2 == REG || c2 == LOWREG
01433              || c2 == IND || c2 == PREINC || c2 == PREDEC
01434              || c2 == POSTINC || c2 == POSTDEC)
01435            {
01436              nib = operand[d].reg;
01437              if (c2 == LOWREG)
01438               nib &= 7;
01439            }
01440 
01441          else if (c & CTRL) /* Control reg operand.  */
01442            nib = operand[d].reg;
01443 
01444          else if ((c & DISPREG) == (DISPREG))
01445            {
01446              nib = operand[d].reg;
01447            }
01448          else if (c2 == ABS)
01449            {
01450              operand[d].mode = c;
01451              op_at[d] = nibble_count;
01452              nib = 0;
01453            }
01454          else if (c2 == IMM || c2 == PCREL || c2 == ABS
01455                  || (c & ABSJMP) || c2 == DISP)
01456            {
01457              operand[d].mode = c;
01458              op_at[d] = nibble_count;
01459              nib = 0;
01460            }
01461          else if ((c & IGNORE) || (c & DATA))
01462            nib = 0;
01463 
01464          else if (c2 == DBIT)
01465            {
01466              switch (operand[0].exp.X_add_number)
01467               {
01468               case 1:
01469                 nib = c;
01470                 break;
01471               case 2:
01472                 nib = 0x8 | c;
01473                 break;
01474               default:
01475                 as_bad (_("Need #1 or #2 here"));
01476               }
01477            }
01478          else if (c2 == KBIT)
01479            {
01480              switch (operand[0].exp.X_add_number)
01481               {
01482               case 1:
01483                 nib = 0;
01484                 break;
01485               case 2:
01486                 nib = 8;
01487                 break;
01488               case 4:
01489                 if (!Hmode)
01490                   as_warn (_("#4 not valid on H8/300."));
01491                 nib = 9;
01492                 break;
01493 
01494               default:
01495                 as_bad (_("Need #1 or #2 here"));
01496                 break;
01497               }
01498              /* Stop it making a fix.  */
01499              operand[0].mode = 0;
01500            }
01501 
01502          if (c & MEMRELAX)
01503            operand[d].mode |= MEMRELAX;
01504 
01505          if (c & B31)
01506            nib |= 0x8;
01507 
01508          if (c & B21)
01509            nib |= 0x4;
01510 
01511          if (c & B11)
01512            nib |= 0x2;
01513 
01514          if (c & B01)
01515            nib |= 0x1;
01516 
01517          if (c2 == MACREG)
01518            {
01519              if (operand[0].mode == MACREG)
01520               /* stmac has mac[hl] as the first operand.  */
01521               nib = 2 + operand[0].reg;
01522              else
01523               /* ldmac has mac[hl] as the second operand.  */
01524               nib = 2 + operand[1].reg;
01525            }
01526        }
01527       nibble_count++;
01528 
01529       *p++ = nib;
01530     }
01531 
01532   /* Disgusting.  Why, oh why didn't someone ask us for advice
01533      on the assembler format.  */
01534   if (OP_KIND (this_try->opcode->how) == O_LDM)
01535     {
01536       high = (operand[1].reg >> 8) & 0xf;
01537       low  = (operand[1].reg) & 0xf;
01538       asnibbles[2] = high - low;
01539       asnibbles[7] = high;
01540     }
01541   else if (OP_KIND (this_try->opcode->how) == O_STM)
01542     {
01543       high = (operand[0].reg >> 8) & 0xf;
01544       low  = (operand[0].reg) & 0xf;
01545       asnibbles[2] = high - low;
01546       asnibbles[7] = low;
01547     }
01548 
01549   for (i = 0; i < this_try->length; i++)
01550     output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
01551 
01552   /* Note if this is a movb or a bit manipulation instruction
01553      there is a special relaxation which only applies.  */
01554   if (   this_try->opcode->how == O (O_MOV,   SB)
01555       || this_try->opcode->how == O (O_BCLR,  SB)
01556       || this_try->opcode->how == O (O_BAND,  SB)
01557       || this_try->opcode->how == O (O_BIAND, SB)
01558       || this_try->opcode->how == O (O_BILD,  SB)
01559       || this_try->opcode->how == O (O_BIOR,  SB)
01560       || this_try->opcode->how == O (O_BIST,  SB)
01561       || this_try->opcode->how == O (O_BIXOR, SB)
01562       || this_try->opcode->how == O (O_BLD,   SB)
01563       || this_try->opcode->how == O (O_BNOT,  SB)
01564       || this_try->opcode->how == O (O_BOR,   SB)
01565       || this_try->opcode->how == O (O_BSET,  SB)
01566       || this_try->opcode->how == O (O_BST,   SB)
01567       || this_try->opcode->how == O (O_BTST,  SB)
01568       || this_try->opcode->how == O (O_BXOR,  SB))
01569     movb = 1;
01570 
01571   /* Output any fixes.  */
01572   for (i = 0; i < this_try->noperands; i++)
01573     {
01574       int x = operand[i].mode;
01575       int x_mode = x & MODE;
01576 
01577       if (x_mode == IMM || x_mode == DISP)
01578        do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
01579                     op_at[i] & 1, operand + i, (x & MEMRELAX) != 0);
01580 
01581       else if (x_mode == ABS)
01582        do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
01583                     op_at[i] & 1, operand + i,
01584                     (x & MEMRELAX) ? movb + 1 : 0);
01585 
01586       else if (x_mode == PCREL)
01587        {
01588          int size16 = (x & SIZE) == L_16;
01589          int size = size16 ? 2 : 1;
01590          int type = size16 ? R_PCRWORD : R_PCRBYTE;
01591          fixS *fixP;
01592 
01593          check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
01594 
01595          if (operand[i].exp.X_add_number & 1)
01596            as_warn (_("branch operand has odd offset (%lx)\n"),
01597                    (unsigned long) operand->exp.X_add_number);
01598 #ifndef OBJ_ELF
01599          /* The COFF port has always been off by one, changing it
01600             now would be an incompatible change, so we leave it as-is.
01601 
01602             We don't want to do this for ELF as we want to be
01603             compatible with the proposed ELF format from Hitachi.  */
01604          operand[i].exp.X_add_number -= 1;
01605 #endif
01606          if (size16)
01607            {
01608              operand[i].exp.X_add_number =
01609               ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
01610            }
01611          else
01612            {
01613              operand[i].exp.X_add_number =
01614               ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
01615            }
01616 
01617          /* For BRA/S.  */
01618          if (! size16)
01619            operand[i].exp.X_add_number |= output[op_at[i] / 2];
01620 
01621          fixP = fix_new_exp (frag_now,
01622                            output - frag_now->fr_literal + op_at[i] / 2,
01623                            size,
01624                            &operand[i].exp,
01625                            1,
01626                            type);
01627          fixP->fx_signed = 1;
01628        }
01629       else if (x_mode == MEMIND)
01630        {
01631          check_operand (operand + i, 0xff, "@@");
01632          fix_new_exp (frag_now,
01633                      output - frag_now->fr_literal + 1,
01634                      1,
01635                      &operand[i].exp,
01636                      0,
01637                      R_MEM_INDIRECT);
01638        }
01639       else if (x_mode == VECIND)
01640        {
01641          check_operand (operand + i, 0x7f, "@@");
01642          /* FIXME: approximating the effect of "B31" here...
01643             This is very hackish, and ought to be done a better way.  */
01644          operand[i].exp.X_add_number |= 0x80;
01645          fix_new_exp (frag_now,
01646                      output - frag_now->fr_literal + 1,
01647                      1,
01648                      &operand[i].exp,
01649                      0,
01650                      R_MEM_INDIRECT);
01651        }
01652       else if (x & ABSJMP)
01653        {
01654          int where = 0;
01655          bfd_reloc_code_real_type reloc_type = R_JMPL1;
01656 
01657 #ifdef OBJ_ELF
01658          /* To be compatible with the proposed H8 ELF format, we
01659             want the relocation's offset to point to the first byte
01660             that will be modified, not to the start of the instruction.  */
01661          
01662          if ((operand->mode & SIZE) == L_32)
01663            {
01664              where = 2;
01665              reloc_type = R_RELLONG;
01666            }
01667          else
01668            where = 1;
01669 #endif
01670 
01671          /* This jmp may be a jump or a branch.  */
01672 
01673          check_operand (operand + i, 
01674                       SXmode ? 0xffffffff : Hmode ? 0xffffff : 0xffff, 
01675                       "@");
01676 
01677          if (operand[i].exp.X_add_number & 1)
01678            as_warn (_("branch operand has odd offset (%lx)\n"),
01679                    (unsigned long) operand->exp.X_add_number);
01680 
01681          if (!Hmode)
01682            operand[i].exp.X_add_number =
01683              ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
01684          fix_new_exp (frag_now,
01685                      output - frag_now->fr_literal + where,
01686                      4,
01687                      &operand[i].exp,
01688                      0,
01689                      reloc_type);
01690        }
01691     }
01692 }
01693 
01694 /* Try to give an intelligent error message for common and simple to
01695    detect errors.  */
01696 
01697 static void
01698 clever_message (const struct h8_instruction *instruction,
01699               struct h8_op *operand)
01700 {
01701   /* Find out if there was more than one possible opcode.  */
01702 
01703   if ((instruction + 1)->idx != instruction->idx)
01704     {
01705       int argn;
01706 
01707       /* Only one opcode of this flavour, try to guess which operand
01708          didn't match.  */
01709       for (argn = 0; argn < instruction->noperands; argn++)
01710        {
01711          switch (instruction->opcode->args.nib[argn])
01712            {
01713            case RD16:
01714              if (operand[argn].mode != RD16)
01715               {
01716                 as_bad (_("destination operand must be 16 bit register"));
01717                 return;
01718 
01719               }
01720              break;
01721 
01722            case RS8:
01723              if (operand[argn].mode != RS8)
01724               {
01725                 as_bad (_("source operand must be 8 bit register"));
01726                 return;
01727               }
01728              break;
01729 
01730            case ABS16DST:
01731              if (operand[argn].mode != ABS16DST)
01732               {
01733                 as_bad (_("destination operand must be 16bit absolute address"));
01734                 return;
01735               }
01736              break;
01737            case RD8:
01738              if (operand[argn].mode != RD8)
01739               {
01740                 as_bad (_("destination operand must be 8 bit register"));
01741                 return;
01742               }
01743              break;
01744 
01745            case ABS16SRC:
01746              if (operand[argn].mode != ABS16SRC)
01747               {
01748                 as_bad (_("source operand must be 16bit absolute address"));
01749                 return;
01750               }
01751              break;
01752 
01753            }
01754        }
01755     }
01756   as_bad (_("invalid operands"));
01757 }
01758 
01759 
01760 /* If OPERAND is part of an address, adjust its size and value given
01761    that it addresses SIZE bytes.
01762 
01763    This function decides how big non-immediate constants are when no
01764    size was explicitly given.  It also scales down the assembly-level
01765    displacement in an @(d:2,ERn) operand.  */
01766 
01767 static void
01768 fix_operand_size (struct h8_op *operand, int size)
01769 {
01770   if (SXmode && (operand->mode & MODE) == DISP)
01771     {
01772       /* If the user didn't specify an operand width, see if we
01773         can use @(d:2,ERn).  */
01774       if ((operand->mode & SIZE) == 0
01775          && operand->exp.X_add_symbol == 0
01776          && operand->exp.X_op_symbol == 0
01777          && (operand->exp.X_add_number == size
01778              || operand->exp.X_add_number == size * 2
01779              || operand->exp.X_add_number == size * 3))
01780        operand->mode |= L_2;
01781 
01782       /* Scale down the displacement in an @(d:2,ERn) operand.
01783         X_add_number then contains the desired field value.  */
01784       if ((operand->mode & SIZE) == L_2)
01785        {
01786          if (operand->exp.X_add_number % size != 0)
01787            as_warn (_("operand/size mis-match"));
01788          operand->exp.X_add_number /= size;
01789        }
01790     }
01791 
01792   if ((operand->mode & SIZE) == 0)
01793     switch (operand->mode & MODE)
01794       {
01795       case DISP:
01796       case INDEXB:
01797       case INDEXW:
01798       case INDEXL:
01799       case ABS:
01800        /* Pick a 24-bit address unless we know that a 16-bit address
01801           is safe.  get_specific() will relax L_24 into L_32 where
01802           necessary.  */
01803        if (Hmode
01804            && !Nmode 
01805            && (operand->exp.X_add_number < -32768
01806               || operand->exp.X_add_number > 32767
01807               || operand->exp.X_add_symbol != 0
01808               || operand->exp.X_op_symbol != 0))
01809          operand->mode |= L_24;
01810        else
01811          operand->mode |= L_16;
01812        break;
01813 
01814       case PCREL:
01815        /* This condition is long standing, though somewhat suspect.  */
01816        if (operand->exp.X_add_number > -128
01817            && operand->exp.X_add_number < 127)
01818          operand->mode |= L_8;
01819        else
01820          operand->mode |= L_16;
01821        break;
01822       }
01823 }
01824 
01825 
01826 /* This is the guts of the machine-dependent assembler.  STR points to
01827    a machine dependent instruction.  This function is supposed to emit
01828    the frags/bytes it assembles.  */
01829 
01830 void
01831 md_assemble (char *str)
01832 {
01833   char *op_start;
01834   char *op_end;
01835   struct h8_op operand[3];
01836   const struct h8_instruction *instruction;
01837   const struct h8_instruction *prev_instruction;
01838 
01839   char *dot = 0;
01840   char *slash = 0;
01841   char c;
01842   int size, i;
01843 
01844   /* Drop leading whitespace.  */
01845   while (*str == ' ')
01846     str++;
01847 
01848   /* Find the op code end.  */
01849   for (op_start = op_end = str;
01850        *op_end != 0 && *op_end != ' ';
01851        op_end++)
01852     {
01853       if (*op_end == '.')
01854        {
01855          dot = op_end + 1;
01856          *op_end = 0;
01857          op_end += 2;
01858          break;
01859        }
01860       else if (*op_end == '/' && ! slash)
01861        slash = op_end;
01862     }
01863 
01864   if (op_end == op_start)
01865     {
01866       as_bad (_("can't find opcode "));
01867     }
01868   c = *op_end;
01869 
01870   *op_end = 0;
01871 
01872   /* The assembler stops scanning the opcode at slashes, so it fails
01873      to make characters following them lower case.  Fix them.  */
01874   if (slash)
01875     while (*++slash)
01876       *slash = TOLOWER (*slash);
01877 
01878   instruction = (const struct h8_instruction *)
01879     hash_find (opcode_hash_control, op_start);
01880 
01881   if (instruction == NULL)
01882     {
01883       as_bad (_("unknown opcode"));
01884       return;
01885     }
01886 
01887   /* We used to set input_line_pointer to the result of get_operands,
01888      but that is wrong.  Our caller assumes we don't change it.  */
01889 
01890   operand[0].mode = 0;
01891   operand[1].mode = 0;
01892   operand[2].mode = 0;
01893 
01894   if (OP_KIND (instruction->opcode->how) == O_MOVAB
01895       || OP_KIND (instruction->opcode->how) == O_MOVAW
01896       || OP_KIND (instruction->opcode->how) == O_MOVAL)
01897     get_mova_operands (op_end, operand);
01898   else if (OP_KIND (instruction->opcode->how) == O_RTEL
01899           || OP_KIND (instruction->opcode->how) == O_RTSL)
01900     get_rtsl_operands (op_end, operand);
01901   else
01902     get_operands (instruction->noperands, op_end, operand);
01903 
01904   *op_end = c;
01905   prev_instruction = instruction;
01906 
01907   /* Now we have operands from instruction.
01908      Let's check them out for ldm and stm.  */
01909   if (OP_KIND (instruction->opcode->how) == O_LDM)
01910     {
01911       /* The first operand must be @er7+, and the
01912         second operand must be a register pair.  */
01913       if ((operand[0].mode != RSINC)
01914            || (operand[0].reg != 7)
01915            || ((operand[1].reg & 0x80000000) == 0))
01916        as_bad (_("invalid operand in ldm"));
01917     }
01918   else if (OP_KIND (instruction->opcode->how) == O_STM)
01919     {
01920       /* The first operand must be a register pair,
01921         and the second operand must be @-er7.  */
01922       if (((operand[0].reg & 0x80000000) == 0)
01923             || (operand[1].mode != RDDEC)
01924             || (operand[1].reg != 7))
01925        as_bad (_("invalid operand in stm"));
01926     }
01927 
01928   size = SN;
01929   if (dot)
01930     {
01931       switch (TOLOWER (*dot))
01932        {
01933        case 'b':
01934          size = SB;
01935          break;
01936 
01937        case 'w':
01938          size = SW;
01939          break;
01940 
01941        case 'l':
01942          size = SL;
01943          break;
01944        }
01945     }
01946   if (OP_KIND (instruction->opcode->how) == O_MOVAB ||
01947       OP_KIND (instruction->opcode->how) == O_MOVAW ||
01948       OP_KIND (instruction->opcode->how) == O_MOVAL)
01949     {
01950       switch (operand[0].mode & MODE)
01951        {
01952        case INDEXB:
01953        default:
01954          fix_operand_size (&operand[1], 1);
01955          break;
01956        case INDEXW:
01957          fix_operand_size (&operand[1], 2);
01958          break;
01959        case INDEXL:
01960          fix_operand_size (&operand[1], 4);
01961          break;
01962        }
01963     }
01964   else
01965     {
01966       for (i = 0; i < 3 && operand[i].mode != 0; i++)
01967        switch (size)
01968          {
01969          case SN:
01970          case SB:
01971          default:
01972            fix_operand_size (&operand[i], 1);
01973            break;
01974          case SW:
01975            fix_operand_size (&operand[i], 2);
01976            break;
01977          case SL:
01978            fix_operand_size (&operand[i], 4);
01979            break;
01980          }
01981     }
01982 
01983   instruction = get_specific (instruction, operand, size);
01984 
01985   if (instruction == 0)
01986     {
01987       /* Couldn't find an opcode which matched the operands.  */
01988       char *where = frag_more (2);
01989 
01990       where[0] = 0x0;
01991       where[1] = 0x0;
01992       clever_message (prev_instruction, operand);
01993 
01994       return;
01995     }
01996 
01997   build_bytes (instruction, operand);
01998 
01999   dwarf2_emit_insn (instruction->length);
02000 }
02001 
02002 symbolS *
02003 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
02004 {
02005   return 0;
02006 }
02007 
02008 /* Various routines to kill one day */
02009 /* Equal to MAX_PRECISION in atof-ieee.c */
02010 #define MAX_LITTLENUMS 6
02011 
02012 /* Turn a string in input_line_pointer into a floating point constant
02013    of type TYPE, and store the appropriate bytes in *LITP.  The number
02014    of LITTLENUMS emitted is stored in *SIZEP.  An error message is
02015    returned, or NULL on OK.  */
02016 
02017 char *
02018 md_atof (int type, char *litP, int *sizeP)
02019 {
02020   int prec;
02021   LITTLENUM_TYPE words[MAX_LITTLENUMS];
02022   LITTLENUM_TYPE *wordP;
02023   char *t;
02024 
02025   switch (type)
02026     {
02027     case 'f':
02028     case 'F':
02029     case 's':
02030     case 'S':
02031       prec = 2;
02032       break;
02033 
02034     case 'd':
02035     case 'D':
02036     case 'r':
02037     case 'R':
02038       prec = 4;
02039       break;
02040 
02041     case 'x':
02042     case 'X':
02043       prec = 6;
02044       break;
02045 
02046     case 'p':
02047     case 'P':
02048       prec = 6;
02049       break;
02050 
02051     default:
02052       *sizeP = 0;
02053       return _("Bad call to MD_ATOF()");
02054     }
02055   t = atof_ieee (input_line_pointer, type, words);
02056   if (t)
02057     input_line_pointer = t;
02058 
02059   *sizeP = prec * sizeof (LITTLENUM_TYPE);
02060   for (wordP = words; prec--;)
02061     {
02062       md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
02063       litP += sizeof (LITTLENUM_TYPE);
02064     }
02065   return 0;
02066 }
02067 
02068 const char *md_shortopts = "";
02069 struct option md_longopts[] = {
02070   {NULL, no_argument, NULL, 0}
02071 };
02072 
02073 size_t md_longopts_size = sizeof (md_longopts);
02074 
02075 int
02076 md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
02077 {
02078   return 0;
02079 }
02080 
02081 void
02082 md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
02083 {
02084 }
02085 
02086 void tc_aout_fix_to_chars (void);
02087 
02088 void
02089 tc_aout_fix_to_chars (void)
02090 {
02091   printf (_("call to tc_aout_fix_to_chars \n"));
02092   abort ();
02093 }
02094 
02095 void
02096 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
02097                segT seg ATTRIBUTE_UNUSED,
02098                fragS *fragP ATTRIBUTE_UNUSED)
02099 {
02100   printf (_("call to md_convert_frag \n"));
02101   abort ();
02102 }
02103 
02104 valueT
02105 md_section_align (segT segment, valueT size)
02106 {
02107   int align = bfd_get_section_alignment (stdoutput, segment);
02108   return ((size + (1 << align) - 1) & (-1 << align));
02109 }
02110 
02111 void
02112 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
02113 {
02114   char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
02115   long val = *valP;
02116 
02117   switch (fixP->fx_size)
02118     {
02119     case 1:
02120       *buf++ = val;
02121       break;
02122     case 2:
02123       *buf++ = (val >> 8);
02124       *buf++ = val;
02125       break;
02126     case 4:
02127       *buf++ = (val >> 24);
02128       *buf++ = (val >> 16);
02129       *buf++ = (val >> 8);
02130       *buf++ = val;
02131       break;
02132     default:
02133       abort ();
02134     }
02135 
02136   if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
02137     fixP->fx_done = 1;
02138 }
02139 
02140 int
02141 md_estimate_size_before_relax (register fragS *fragP ATTRIBUTE_UNUSED,
02142                             register segT segment_type ATTRIBUTE_UNUSED)
02143 {
02144   printf (_("call tomd_estimate_size_before_relax \n"));
02145   abort ();
02146 }
02147 
02148 /* Put number into target byte order.  */
02149 void
02150 md_number_to_chars (char *ptr, valueT use, int nbytes)
02151 {
02152   number_to_chars_bigendian (ptr, use, nbytes);
02153 }
02154 
02155 long
02156 md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
02157 {
02158   abort ();
02159 }
02160 
02161 arelent *
02162 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
02163 {
02164   arelent *rel;
02165   bfd_reloc_code_real_type r_type;
02166 
02167   if (fixp->fx_addsy && fixp->fx_subsy)
02168     {
02169       if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
02170          || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
02171        {
02172          as_bad_where (fixp->fx_file, fixp->fx_line,
02173                      "Difference of symbols in different sections is not supported");
02174          return NULL;
02175        }
02176     }
02177 
02178   rel = (arelent *) xmalloc (sizeof (arelent));
02179   rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
02180   *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
02181   rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
02182   rel->addend = fixp->fx_offset;
02183 
02184   r_type = fixp->fx_r_type;
02185 
02186 #define DEBUG 0
02187 #if DEBUG
02188   fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
02189   fflush(stderr);
02190 #endif
02191   rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
02192   if (rel->howto == NULL)
02193     {
02194       as_bad_where (fixp->fx_file, fixp->fx_line,
02195                   _("Cannot represent relocation type %s"),
02196                   bfd_get_reloc_code_name (r_type));
02197       return NULL;
02198     }
02199 
02200   return rel;
02201 }