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cell-binutils  2.17cvs20070401
sparc-opc.c
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00001 /* Table of opcodes for the sparc.
00002    Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
00003    2000, 2002, 2004, 2005
00004    Free Software Foundation, Inc.
00005 
00006    This file is part of the BFD library.
00007 
00008    BFD is free software; you can redistribute it and/or modify it under
00009    the terms of the GNU General Public License as published by the Free
00010    Software Foundation; either version 2, or (at your option) any later
00011    version.
00012 
00013    BFD is distributed in the hope that it will be useful, but WITHOUT ANY
00014    WARRANTY; without even the implied warranty of MERCHANTABILITY or
00015    FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
00016    for more details.
00017 
00018    You should have received a copy of the GNU General Public License
00019    along with this software; see the file COPYING.  If not, write to
00020    the Free Software Foundation, 51 Franklin Street - Fifth Floor,
00021    Boston, MA 02110-1301, USA.     */
00022 
00023 /* FIXME-someday: perhaps the ,a's and such should be embedded in the
00024    instruction's name rather than the args.  This would make gas faster, pinsn
00025    slower, but would mess up some macros a bit.  xoxorich. */
00026 
00027 #include <stdio.h>
00028 #include "sysdep.h"
00029 #include "opcode/sparc.h"
00030 
00031 /* Some defines to make life easy.  */
00032 #define MASK_V6             SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V6)
00033 #define MASK_V7             SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V7)
00034 #define MASK_V8             SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V8)
00035 #define MASK_SPARCLET       SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLET)
00036 #define MASK_SPARCLITE      SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLITE)
00037 #define MASK_V9             SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9)
00038 #define MASK_V9A     SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A)
00039 #define MASK_V9B     SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9B)
00040 
00041 /* Bit masks of architectures supporting the insn.  */
00042 
00043 #define v6           (MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLET \
00044                       | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
00045 /* v6 insns not supported on the sparclet.  */
00046 #define v6notlet     (MASK_V6 | MASK_V7 | MASK_V8 \
00047                       | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
00048 #define v7           (MASK_V7 | MASK_V8 | MASK_SPARCLET \
00049                       | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
00050 /* Although not all insns are implemented in hardware, sparclite is defined
00051    to be a superset of v8.  Unimplemented insns trap and are then theoretically
00052    implemented in software.
00053    It's not clear that the same is true for sparclet, although the docs
00054    suggest it is.  Rather than complicating things, the sparclet assembler
00055    recognizes all v8 insns.  */
00056 #define v8           (MASK_V8 | MASK_SPARCLET | MASK_SPARCLITE \
00057                       | MASK_V9 | MASK_V9A | MASK_V9B)
00058 #define sparclet     (MASK_SPARCLET)
00059 #define sparclite    (MASK_SPARCLITE)
00060 #define v9           (MASK_V9 | MASK_V9A | MASK_V9B)
00061 #define v9a          (MASK_V9A | MASK_V9B)
00062 #define v9b          (MASK_V9B)
00063 /* v6 insns not supported by v9.  */
00064 #define v6notv9             (MASK_V6 | MASK_V7 | MASK_V8 \
00065                       | MASK_SPARCLET | MASK_SPARCLITE)
00066 /* v9a instructions which would appear to be aliases to v9's impdep's
00067    otherwise.  */
00068 #define v9notv9a     (MASK_V9)
00069 
00070 /* Table of opcode architectures.
00071    The order is defined in opcode/sparc.h.  */
00072 
00073 const struct sparc_opcode_arch sparc_opcode_archs[] =
00074 {
00075   { "v6", MASK_V6 },
00076   { "v7", MASK_V6 | MASK_V7 },
00077   { "v8", MASK_V6 | MASK_V7 | MASK_V8 },
00078   { "sparclet", MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLET },
00079   { "sparclite", MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLITE },
00080   /* ??? Don't some v8 priviledged insns conflict with v9?  */
00081   { "v9", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 },
00082   /* v9 with ultrasparc additions */
00083   { "v9a", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A },
00084   /* v9 with cheetah additions */
00085   { "v9b", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B },
00086   { NULL, 0 }
00087 };
00088 
00089 /* Given NAME, return it's architecture entry.  */
00090 
00091 enum sparc_opcode_arch_val
00092 sparc_opcode_lookup_arch (const char *name)
00093 {
00094   const struct sparc_opcode_arch *p;
00095 
00096   for (p = &sparc_opcode_archs[0]; p->name; ++p)
00097     if (strcmp (name, p->name) == 0)
00098       return (enum sparc_opcode_arch_val) (p - &sparc_opcode_archs[0]);
00099 
00100   return SPARC_OPCODE_ARCH_BAD;
00101 }
00102 
00103 /* Branch condition field.  */
00104 #define COND(x)             (((x) & 0xf) << 25)
00105 
00106 /* v9: Move (MOVcc and FMOVcc) condition field.  */
00107 #define MCOND(x,i_or_f)     ((((i_or_f) & 1) << 18) | (((x) >> 11) & (0xf << 14))) /* v9 */
00108 
00109 /* v9: Move register (MOVRcc and FMOVRcc) condition field.  */
00110 #define RCOND(x)     (((x) & 0x7) << 10)  /* v9 */
00111 
00112 #define CONDA (COND (0x8))
00113 #define CONDCC       (COND (0xd))
00114 #define CONDCS       (COND (0x5))
00115 #define CONDE (COND (0x1))
00116 #define CONDG (COND (0xa))
00117 #define CONDGE       (COND (0xb))
00118 #define CONDGU       (COND (0xc))
00119 #define CONDL (COND (0x3))
00120 #define CONDLE       (COND (0x2))
00121 #define CONDLEU      (COND (0x4))
00122 #define CONDN (COND (0x0))
00123 #define CONDNE       (COND (0x9))
00124 #define CONDNEG      (COND (0x6))
00125 #define CONDPOS      (COND (0xe))
00126 #define CONDVC       (COND (0xf))
00127 #define CONDVS       (COND (0x7))
00128 
00129 #define CONDNZ       CONDNE
00130 #define CONDZ CONDE
00131 #define CONDGEU      CONDCC
00132 #define CONDLU       CONDCS
00133 
00134 #define FCONDA              (COND (0x8))
00135 #define FCONDE              (COND (0x9))
00136 #define FCONDG              (COND (0x6))
00137 #define FCONDGE             (COND (0xb))
00138 #define FCONDL              (COND (0x4))
00139 #define FCONDLE             (COND (0xd))
00140 #define FCONDLG             (COND (0x2))
00141 #define FCONDN              (COND (0x0))
00142 #define FCONDNE             (COND (0x1))
00143 #define FCONDO              (COND (0xf))
00144 #define FCONDU              (COND (0x7))
00145 #define FCONDUE             (COND (0xa))
00146 #define FCONDUG             (COND (0x5))
00147 #define FCONDUGE     (COND (0xc))
00148 #define FCONDUL             (COND (0x3))
00149 #define FCONDULE     (COND (0xe))
00150 
00151 #define FCONDNZ      FCONDNE
00152 #define FCONDZ       FCONDE
00153 
00154 #define ICC          (0)    /* v9 */
00155 #define XCC          (1 << 12) /* v9 */
00156 #define FCC(x)              (((x) & 0x3) << 11) /* v9 */
00157 #define FBFCC(x)     (((x) & 0x3) << 20)  /* v9 */
00158 
00159 /* The order of the opcodes in the table is significant:
00160 
00161        * The assembler requires that all instances of the same mnemonic must
00162        be consecutive.      If they aren't, the assembler will bomb at runtime.
00163 
00164        * The disassembler should not care about the order of the opcodes.  */
00165 
00166 /* Entries for commutative arithmetic operations.  */
00167 /* ??? More entries can make use of this.  */
00168 #define COMMUTEOP(opcode, op3, arch_mask) \
00169 { opcode,     F3(2, op3, 0), F3(~2, ~op3, ~0)|ASI(~0),  "1,2,d", 0, arch_mask }, \
00170 { opcode,     F3(2, op3, 1), F3(~2, ~op3, ~1),          "1,i,d", 0, arch_mask }, \
00171 { opcode,     F3(2, op3, 1), F3(~2, ~op3, ~1),          "i,1,d", 0, arch_mask }
00172 
00173 const struct sparc_opcode sparc_opcodes[] = {
00174 
00175 { "ld",       F3(3, 0x00, 0), F3(~3, ~0x00, ~0),        "[1+2],d", 0, v6 },
00176 { "ld",       F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0, "[1],d", 0, v6 }, /* ld [rs1+%g0],d */
00177 { "ld",       F3(3, 0x00, 1), F3(~3, ~0x00, ~1),        "[1+i],d", 0, v6 },
00178 { "ld",       F3(3, 0x00, 1), F3(~3, ~0x00, ~1),        "[i+1],d", 0, v6 },
00179 { "ld",       F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0, "[i],d", 0, v6 },
00180 { "ld",       F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0),    "[1],d", 0, v6 }, /* ld [rs1+0],d */
00181 { "ld",       F3(3, 0x20, 0), F3(~3, ~0x20, ~0),        "[1+2],g", 0, v6 },
00182 { "ld",       F3(3, 0x20, 0), F3(~3, ~0x20, ~0)|RS2_G0, "[1],g", 0, v6 }, /* ld [rs1+%g0],d */
00183 { "ld",       F3(3, 0x20, 1), F3(~3, ~0x20, ~1),        "[1+i],g", 0, v6 },
00184 { "ld",       F3(3, 0x20, 1), F3(~3, ~0x20, ~1),        "[i+1],g", 0, v6 },
00185 { "ld",       F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|RS1_G0, "[i],g", 0, v6 },
00186 { "ld",       F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|SIMM13(~0),    "[1],g", 0, v6 }, /* ld [rs1+0],d */
00187 
00188 { "ld",       F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RD(~0), "[1+2],F", 0, v6 },
00189 { "ld",       F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RS2_G0|RD(~0),"[1],F", 0, v6 }, /* ld [rs1+%g0],d */
00190 { "ld",       F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[1+i],F", 0, v6 },
00191 { "ld",       F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[i+1],F", 0, v6 },
00192 { "ld",       F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RS1_G0|RD(~0),"[i],F", 0, v6 },
00193 { "ld",       F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~0),"[1],F", 0, v6 }, /* ld [rs1+0],d */
00194 
00195 { "ld",       F3(3, 0x30, 0), F3(~3, ~0x30, ~0),        "[1+2],D", 0, v6notv9 },
00196 { "ld",       F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0, "[1],D", 0, v6notv9 }, /* ld [rs1+%g0],d */
00197 { "ld",       F3(3, 0x30, 1), F3(~3, ~0x30, ~1),        "[1+i],D", 0, v6notv9 },
00198 { "ld",       F3(3, 0x30, 1), F3(~3, ~0x30, ~1),        "[i+1],D", 0, v6notv9 },
00199 { "ld",       F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0, "[i],D", 0, v6notv9 },
00200 { "ld",       F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0),    "[1],D", 0, v6notv9 }, /* ld [rs1+0],d */
00201 { "ld",       F3(3, 0x31, 0), F3(~3, ~0x31, ~0),        "[1+2],C", 0, v6notv9 },
00202 { "ld",       F3(3, 0x31, 0), F3(~3, ~0x31, ~0)|RS2_G0, "[1],C", 0, v6notv9 }, /* ld [rs1+%g0],d */
00203 { "ld",       F3(3, 0x31, 1), F3(~3, ~0x31, ~1),        "[1+i],C", 0, v6notv9 },
00204 { "ld",       F3(3, 0x31, 1), F3(~3, ~0x31, ~1),        "[i+1],C", 0, v6notv9 },
00205 { "ld",       F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|RS1_G0, "[i],C", 0, v6notv9 },
00206 { "ld",       F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|SIMM13(~0),    "[1],C", 0, v6notv9 }, /* ld [rs1+0],d */
00207 
00208 /* The v9 LDUW is the same as the old 'ld' opcode, it is not the same as the
00209    'ld' pseudo-op in v9.  */
00210 { "lduw",     F3(3, 0x00, 0), F3(~3, ~0x00, ~0),        "[1+2],d", F_ALIAS, v9 },
00211 { "lduw",     F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0, "[1],d", F_ALIAS, v9 }, /* ld [rs1+%g0],d */
00212 { "lduw",     F3(3, 0x00, 1), F3(~3, ~0x00, ~1),        "[1+i],d", F_ALIAS, v9 },
00213 { "lduw",     F3(3, 0x00, 1), F3(~3, ~0x00, ~1),        "[i+1],d", F_ALIAS, v9 },
00214 { "lduw",     F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0, "[i],d", F_ALIAS, v9 },
00215 { "lduw",     F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0),    "[1],d", F_ALIAS, v9 }, /* ld [rs1+0],d */
00216 
00217 { "ldd",      F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI(~0),       "[1+2],d", 0, v6 },
00218 { "ldd",      F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI_RS2(~0),   "[1],d", 0, v6 }, /* ldd [rs1+%g0],d */
00219 { "ldd",      F3(3, 0x03, 1), F3(~3, ~0x03, ~1),        "[1+i],d", 0, v6 },
00220 { "ldd",      F3(3, 0x03, 1), F3(~3, ~0x03, ~1),        "[i+1],d", 0, v6 },
00221 { "ldd",      F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|RS1_G0, "[i],d", 0, v6 },
00222 { "ldd",      F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|SIMM13(~0),    "[1],d", 0, v6 }, /* ldd [rs1+0],d */
00223 { "ldd",      F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI(~0),       "[1+2],H", 0, v6 },
00224 { "ldd",      F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI_RS2(~0),   "[1],H", 0, v6 }, /* ldd [rs1+%g0],d */
00225 { "ldd",      F3(3, 0x23, 1), F3(~3, ~0x23, ~1),        "[1+i],H", 0, v6 },
00226 { "ldd",      F3(3, 0x23, 1), F3(~3, ~0x23, ~1),        "[i+1],H", 0, v6 },
00227 { "ldd",      F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|RS1_G0, "[i],H", 0, v6 },
00228 { "ldd",      F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|SIMM13(~0),    "[1],H", 0, v6 }, /* ldd [rs1+0],d */
00229 
00230 { "ldd",      F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI(~0),       "[1+2],D", 0, v6notv9 },
00231 { "ldd",      F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI_RS2(~0),   "[1],D", 0, v6notv9 }, /* ldd [rs1+%g0],d */
00232 { "ldd",      F3(3, 0x33, 1), F3(~3, ~0x33, ~1),        "[1+i],D", 0, v6notv9 },
00233 { "ldd",      F3(3, 0x33, 1), F3(~3, ~0x33, ~1),        "[i+1],D", 0, v6notv9 },
00234 { "ldd",      F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0, "[i],D", 0, v6notv9 },
00235 { "ldd",      F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0),    "[1],D", 0, v6notv9 }, /* ldd [rs1+0],d */
00236 
00237 { "ldq",      F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI(~0),       "[1+2],J", 0, v9 },
00238 { "ldq",      F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI_RS2(~0),   "[1],J", 0, v9 }, /* ldd [rs1+%g0],d */
00239 { "ldq",      F3(3, 0x22, 1), F3(~3, ~0x22, ~1),        "[1+i],J", 0, v9 },
00240 { "ldq",      F3(3, 0x22, 1), F3(~3, ~0x22, ~1),        "[i+1],J", 0, v9 },
00241 { "ldq",      F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|RS1_G0, "[i],J", 0, v9 },
00242 { "ldq",      F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|SIMM13(~0),    "[1],J", 0, v9 }, /* ldd [rs1+0],d */
00243 
00244 { "ldsb",     F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI(~0),       "[1+2],d", 0, v6 },
00245 { "ldsb",     F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI_RS2(~0),   "[1],d", 0, v6 }, /* ldsb [rs1+%g0],d */
00246 { "ldsb",     F3(3, 0x09, 1), F3(~3, ~0x09, ~1),        "[1+i],d", 0, v6 },
00247 { "ldsb",     F3(3, 0x09, 1), F3(~3, ~0x09, ~1),        "[i+1],d", 0, v6 },
00248 { "ldsb",     F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|RS1_G0, "[i],d", 0, v6 },
00249 { "ldsb",     F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|SIMM13(~0),    "[1],d", 0, v6 }, /* ldsb [rs1+0],d */
00250 
00251 { "ldsh",     F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI_RS2(~0),   "[1],d", 0, v6 }, /* ldsh [rs1+%g0],d */
00252 { "ldsh",     F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI(~0),       "[1+2],d", 0, v6 },
00253 { "ldsh",     F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1),        "[1+i],d", 0, v6 },
00254 { "ldsh",     F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1),        "[i+1],d", 0, v6 },
00255 { "ldsh",     F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|RS1_G0, "[i],d", 0, v6 },
00256 { "ldsh",     F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|SIMM13(~0),    "[1],d", 0, v6 }, /* ldsh [rs1+0],d */
00257 
00258 { "ldstub",   F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI(~0),       "[1+2],d", 0, v6 },
00259 { "ldstub",   F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI_RS2(~0),   "[1],d", 0, v6 }, /* ldstub [rs1+%g0],d */
00260 { "ldstub",   F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1),        "[1+i],d", 0, v6 },
00261 { "ldstub",   F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1),        "[i+1],d", 0, v6 },
00262 { "ldstub",   F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|RS1_G0, "[i],d", 0, v6 },
00263 { "ldstub",   F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|SIMM13(~0),    "[1],d", 0, v6 }, /* ldstub [rs1+0],d */
00264 
00265 { "ldsw",     F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI(~0),       "[1+2],d", 0, v9 },
00266 { "ldsw",     F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI_RS2(~0),   "[1],d", 0, v9 }, /* ldsw [rs1+%g0],d */
00267 { "ldsw",     F3(3, 0x08, 1), F3(~3, ~0x08, ~1),        "[1+i],d", 0, v9 },
00268 { "ldsw",     F3(3, 0x08, 1), F3(~3, ~0x08, ~1),        "[i+1],d", 0, v9 },
00269 { "ldsw",     F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|RS1_G0, "[i],d", 0, v9 },
00270 { "ldsw",     F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|SIMM13(~0),    "[1],d", 0, v9 }, /* ldsw [rs1+0],d */
00271 
00272 { "ldub",     F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI(~0),       "[1+2],d", 0, v6 },
00273 { "ldub",     F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI_RS2(~0),   "[1],d", 0, v6 }, /* ldub [rs1+%g0],d */
00274 { "ldub",     F3(3, 0x01, 1), F3(~3, ~0x01, ~1),        "[1+i],d", 0, v6 },
00275 { "ldub",     F3(3, 0x01, 1), F3(~3, ~0x01, ~1),        "[i+1],d", 0, v6 },
00276 { "ldub",     F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|RS1_G0, "[i],d", 0, v6 },
00277 { "ldub",     F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|SIMM13(~0),    "[1],d", 0, v6 }, /* ldub [rs1+0],d */
00278 
00279 { "lduh",     F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI(~0),       "[1+2],d", 0, v6 },
00280 { "lduh",     F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI_RS2(~0),   "[1],d", 0, v6 }, /* lduh [rs1+%g0],d */
00281 { "lduh",     F3(3, 0x02, 1), F3(~3, ~0x02, ~1),        "[1+i],d", 0, v6 },
00282 { "lduh",     F3(3, 0x02, 1), F3(~3, ~0x02, ~1),        "[i+1],d", 0, v6 },
00283 { "lduh",     F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|RS1_G0, "[i],d", 0, v6 },
00284 { "lduh",     F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|SIMM13(~0),    "[1],d", 0, v6 }, /* lduh [rs1+0],d */
00285 
00286 { "ldx",      F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI(~0),       "[1+2],d", 0, v9 },
00287 { "ldx",      F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI_RS2(~0),   "[1],d", 0, v9 }, /* ldx [rs1+%g0],d */
00288 { "ldx",      F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1),        "[1+i],d", 0, v9 },
00289 { "ldx",      F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1),        "[i+1],d", 0, v9 },
00290 { "ldx",      F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|RS1_G0, "[i],d", 0, v9 },
00291 { "ldx",      F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|SIMM13(~0),    "[1],d", 0, v9 }, /* ldx [rs1+0],d */
00292 
00293 { "ldx",      F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RD(~1),  "[1+2],F", 0, v9 },
00294 { "ldx",      F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RS2_G0|RD(~1),  "[1],F", 0, v9 }, /* ld [rs1+%g0],d */
00295 { "ldx",      F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1),  "[1+i],F", 0, v9 },
00296 { "ldx",      F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1),  "[i+1],F", 0, v9 },
00297 { "ldx",      F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RS1_G0|RD(~1),  "[i],F", 0, v9 },
00298 { "ldx",      F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~1),"[1],F", 0, v9 }, /* ld [rs1+0],d */
00299 
00300 { "lda",      F3(3, 0x10, 0), F3(~3, ~0x10, ~0),        "[1+2]A,d", 0, v6 },
00301 { "lda",      F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lda [rs1+%g0],d */
00302 { "lda",      F3(3, 0x10, 1), F3(~3, ~0x10, ~1),        "[1+i]o,d", 0, v9 },
00303 { "lda",      F3(3, 0x10, 1), F3(~3, ~0x10, ~1),        "[i+1]o,d", 0, v9 },
00304 { "lda",      F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00305 { "lda",      F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00306 { "lda",      F3(3, 0x30, 0), F3(~3, ~0x30, ~0),        "[1+2]A,g", 0, v9 },
00307 { "lda",      F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0, "[1]A,g", 0, v9 }, /* lda [rs1+%g0],d */
00308 { "lda",      F3(3, 0x30, 1), F3(~3, ~0x30, ~1),        "[1+i]o,g", 0, v9 },
00309 { "lda",      F3(3, 0x30, 1), F3(~3, ~0x30, ~1),        "[i+1]o,g", 0, v9 },
00310 { "lda",      F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0, "[i]o,g", 0, v9 },
00311 { "lda",      F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0),    "[1]o,g", 0, v9 }, /* ld [rs1+0],d */
00312 
00313 { "ldda",     F3(3, 0x13, 0), F3(~3, ~0x13, ~0),        "[1+2]A,d", 0, v6 },
00314 { "ldda",     F3(3, 0x13, 0), F3(~3, ~0x13, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldda [rs1+%g0],d */
00315 { "ldda",     F3(3, 0x13, 1), F3(~3, ~0x13, ~1),        "[1+i]o,d", 0, v9 },
00316 { "ldda",     F3(3, 0x13, 1), F3(~3, ~0x13, ~1),        "[i+1]o,d", 0, v9 },
00317 { "ldda",     F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00318 { "ldda",     F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00319 
00320 { "ldda",     F3(3, 0x33, 0), F3(~3, ~0x33, ~0),        "[1+2]A,H", 0, v9 },
00321 { "ldda",     F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|RS2_G0, "[1]A,H", 0, v9 }, /* ldda [rs1+%g0],d */
00322 { "ldda",     F3(3, 0x33, 1), F3(~3, ~0x33, ~1),        "[1+i]o,H", 0, v9 },
00323 { "ldda",     F3(3, 0x33, 1), F3(~3, ~0x33, ~1),        "[i+1]o,H", 0, v9 },
00324 { "ldda",     F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0, "[i]o,H", 0, v9 },
00325 { "ldda",     F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0),    "[1]o,H", 0, v9 }, /* ld [rs1+0],d */
00326 
00327 { "ldqa",     F3(3, 0x32, 0), F3(~3, ~0x32, ~0),        "[1+2]A,J", 0, v9 },
00328 { "ldqa",     F3(3, 0x32, 0), F3(~3, ~0x32, ~0)|RS2_G0, "[1]A,J", 0, v9 }, /* ldd [rs1+%g0],d */
00329 { "ldqa",     F3(3, 0x32, 1), F3(~3, ~0x32, ~1),        "[1+i]o,J", 0, v9 },
00330 { "ldqa",     F3(3, 0x32, 1), F3(~3, ~0x32, ~1),        "[i+1]o,J", 0, v9 },
00331 { "ldqa",     F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|RS1_G0, "[i]o,J", 0, v9 },
00332 { "ldqa",     F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|SIMM13(~0),    "[1]o,J", 0, v9 }, /* ldd [rs1+0],d */
00333 
00334 { "ldsba",    F3(3, 0x19, 0), F3(~3, ~0x19, ~0),        "[1+2]A,d", 0, v6 },
00335 { "ldsba",    F3(3, 0x19, 0), F3(~3, ~0x19, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldsba [rs1+%g0],d */
00336 { "ldsba",    F3(3, 0x19, 1), F3(~3, ~0x19, ~1),        "[1+i]o,d", 0, v9 },
00337 { "ldsba",    F3(3, 0x19, 1), F3(~3, ~0x19, ~1),        "[i+1]o,d", 0, v9 },
00338 { "ldsba",    F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00339 { "ldsba",    F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00340 
00341 { "ldsha",    F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0),        "[1+2]A,d", 0, v6 },
00342 { "ldsha",    F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldsha [rs1+%g0],d */
00343 { "ldsha",    F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1),        "[1+i]o,d", 0, v9 },
00344 { "ldsha",    F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1),        "[i+1]o,d", 0, v9 },
00345 { "ldsha",    F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00346 { "ldsha",    F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00347 
00348 { "ldstuba",  F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0),        "[1+2]A,d", 0, v6 },
00349 { "ldstuba",  F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldstuba [rs1+%g0],d */
00350 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1),        "[1+i]o,d", 0, v9 },
00351 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1),        "[i+1]o,d", 0, v9 },
00352 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00353 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00354 
00355 { "ldswa",    F3(3, 0x18, 0), F3(~3, ~0x18, ~0),        "[1+2]A,d", 0, v9 },
00356 { "ldswa",    F3(3, 0x18, 0), F3(~3, ~0x18, ~0)|RS2_G0, "[1]A,d", 0, v9 }, /* lda [rs1+%g0],d */
00357 { "ldswa",    F3(3, 0x18, 1), F3(~3, ~0x18, ~1),        "[1+i]o,d", 0, v9 },
00358 { "ldswa",    F3(3, 0x18, 1), F3(~3, ~0x18, ~1),        "[i+1]o,d", 0, v9 },
00359 { "ldswa",    F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00360 { "ldswa",    F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00361 
00362 { "lduba",    F3(3, 0x11, 0), F3(~3, ~0x11, ~0),        "[1+2]A,d", 0, v6 },
00363 { "lduba",    F3(3, 0x11, 0), F3(~3, ~0x11, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lduba [rs1+%g0],d */
00364 { "lduba",    F3(3, 0x11, 1), F3(~3, ~0x11, ~1),        "[1+i]o,d", 0, v9 },
00365 { "lduba",    F3(3, 0x11, 1), F3(~3, ~0x11, ~1),        "[i+1]o,d", 0, v9 },
00366 { "lduba",    F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00367 { "lduba",    F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00368 
00369 { "lduha",    F3(3, 0x12, 0), F3(~3, ~0x12, ~0),        "[1+2]A,d", 0, v6 },
00370 { "lduha",    F3(3, 0x12, 0), F3(~3, ~0x12, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lduha [rs1+%g0],d */
00371 { "lduha",    F3(3, 0x12, 1), F3(~3, ~0x12, ~1),        "[1+i]o,d", 0, v9 },
00372 { "lduha",    F3(3, 0x12, 1), F3(~3, ~0x12, ~1),        "[i+1]o,d", 0, v9 },
00373 { "lduha",    F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00374 { "lduha",    F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00375 
00376 { "lduwa",    F3(3, 0x10, 0), F3(~3, ~0x10, ~0),        "[1+2]A,d", F_ALIAS, v9 }, /* lduwa === lda */
00377 { "lduwa",    F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0, "[1]A,d", F_ALIAS, v9 }, /* lda [rs1+%g0],d */
00378 { "lduwa",    F3(3, 0x10, 1), F3(~3, ~0x10, ~1),        "[1+i]o,d", F_ALIAS, v9 },
00379 { "lduwa",    F3(3, 0x10, 1), F3(~3, ~0x10, ~1),        "[i+1]o,d", F_ALIAS, v9 },
00380 { "lduwa",    F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0, "[i]o,d", F_ALIAS, v9 },
00381 { "lduwa",    F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0),    "[1]o,d", F_ALIAS, v9 }, /* ld [rs1+0],d */
00382 
00383 { "ldxa",     F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0),        "[1+2]A,d", 0, v9 },
00384 { "ldxa",     F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0)|RS2_G0, "[1]A,d", 0, v9 }, /* lda [rs1+%g0],d */
00385 { "ldxa",     F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1),        "[1+i]o,d", 0, v9 },
00386 { "ldxa",     F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1),        "[i+1]o,d", 0, v9 },
00387 { "ldxa",     F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00388 { "ldxa",     F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00389 
00390 { "st",       F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),              "d,[1+2]", 0, v6 },
00391 { "st",       F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),          "d,[1]", 0, v6 }, /* st d,[rs1+%g0] */
00392 { "st",       F3(3, 0x04, 1), F3(~3, ~0x04, ~1),               "d,[1+i]", 0, v6 },
00393 { "st",       F3(3, 0x04, 1), F3(~3, ~0x04, ~1),               "d,[i+1]", 0, v6 },
00394 { "st",       F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0,        "d,[i]", 0, v6 },
00395 { "st",       F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0),           "d,[1]", 0, v6 }, /* st d,[rs1+0] */
00396 { "st",       F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI(~0),              "g,[1+2]", 0, v6 },
00397 { "st",       F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI_RS2(~0),          "g,[1]", 0, v6 }, /* st d[rs1+%g0] */
00398 { "st",       F3(3, 0x24, 1), F3(~3, ~0x24, ~1),               "g,[1+i]", 0, v6 },
00399 { "st",       F3(3, 0x24, 1), F3(~3, ~0x24, ~1),               "g,[i+1]", 0, v6 },
00400 { "st",       F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|RS1_G0,        "g,[i]", 0, v6 },
00401 { "st",       F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|SIMM13(~0),           "g,[1]", 0, v6 }, /* st d,[rs1+0] */
00402 
00403 { "st",       F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI(~0),              "D,[1+2]", 0, v6notv9 },
00404 { "st",       F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI_RS2(~0),          "D,[1]", 0, v6notv9 }, /* st d,[rs1+%g0] */
00405 { "st",       F3(3, 0x34, 1), F3(~3, ~0x34, ~1),               "D,[1+i]", 0, v6notv9 },
00406 { "st",       F3(3, 0x34, 1), F3(~3, ~0x34, ~1),               "D,[i+1]", 0, v6notv9 },
00407 { "st",       F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0,        "D,[i]", 0, v6notv9 },
00408 { "st",       F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0),           "D,[1]", 0, v6notv9 }, /* st d,[rs1+0] */
00409 { "st",       F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI(~0),              "C,[1+2]", 0, v6notv9 },
00410 { "st",       F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI_RS2(~0),          "C,[1]", 0, v6notv9 }, /* st d,[rs1+%g0] */
00411 { "st",       F3(3, 0x35, 1), F3(~3, ~0x35, ~1),               "C,[1+i]", 0, v6notv9 },
00412 { "st",       F3(3, 0x35, 1), F3(~3, ~0x35, ~1),               "C,[i+1]", 0, v6notv9 },
00413 { "st",       F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|RS1_G0,        "C,[i]", 0, v6notv9 },
00414 { "st",       F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|SIMM13(~0),           "C,[1]", 0, v6notv9 }, /* st d,[rs1+0] */
00415 
00416 { "st",       F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0|ASI(~0), "F,[1+2]", 0, v6 },
00417 { "st",       F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0|ASI_RS2(~0),    "F,[1]", 0, v6 }, /* st d,[rs1+%g0] */
00418 { "st",       F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0,         "F,[1+i]", 0, v6 },
00419 { "st",       F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0,         "F,[i+1]", 0, v6 },
00420 { "st",       F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0|RS1_G0,         "F,[i]", 0, v6 },
00421 { "st",       F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0|SIMM13(~0),     "F,[1]", 0, v6 }, /* st d,[rs1+0] */
00422 
00423 { "stw",      F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v9 },
00424 { "stw",      F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */
00425 { "stw",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[1+i]", F_ALIAS, v9 },
00426 { "stw",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[i+1]", F_ALIAS, v9 },
00427 { "stw",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 },
00428 { "stw",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */
00429 { "stsw",     F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v9 },
00430 { "stsw",     F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */
00431 { "stsw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[1+i]", F_ALIAS, v9 },
00432 { "stsw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[i+1]", F_ALIAS, v9 },
00433 { "stsw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 },
00434 { "stsw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */
00435 { "stuw",     F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v9 },
00436 { "stuw",     F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */
00437 { "stuw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[1+i]", F_ALIAS, v9 },
00438 { "stuw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[i+1]", F_ALIAS, v9 },
00439 { "stuw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 },
00440 { "stuw",     F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */
00441 
00442 { "spill",    F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v6 },
00443 { "spill",    F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v6 }, /* st d,[rs1+%g0] */
00444 { "spill",    F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[1+i]", F_ALIAS, v6 },
00445 { "spill",    F3(3, 0x04, 1), F3(~3, ~0x04, ~1),        "d,[i+1]", F_ALIAS, v6 },
00446 { "spill",    F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00447 { "spill",    F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v6 }, /* st d,[rs1+0] */
00448 
00449 { "sta",      F3(3, 0x14, 0), F3(~3, ~0x14, ~0),        "d,[1+2]A", 0, v6 },
00450 { "sta",      F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),       "d,[1]A", 0, v6 }, /* sta d,[rs1+%g0] */
00451 { "sta",      F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[1+i]o", 0, v9 },
00452 { "sta",      F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[i+1]o", 0, v9 },
00453 { "sta",      F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00454 { "sta",      F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0),    "d,[1]o", 0, v9 }, /* st d,[rs1+0] */
00455 
00456 { "sta",      F3(3, 0x34, 0), F3(~3, ~0x34, ~0),        "g,[1+2]A", 0, v9 },
00457 { "sta",      F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0),       "g,[1]A", 0, v9 }, /* sta d,[rs1+%g0] */
00458 { "sta",      F3(3, 0x34, 1), F3(~3, ~0x34, ~1),        "g,[1+i]o", 0, v9 },
00459 { "sta",      F3(3, 0x34, 1), F3(~3, ~0x34, ~1),        "g,[i+1]o", 0, v9 },
00460 { "sta",      F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0, "g,[i]o", 0, v9 },
00461 { "sta",      F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0),    "g,[1]o", 0, v9 }, /* st d,[rs1+0] */
00462 
00463 { "stwa",     F3(3, 0x14, 0), F3(~3, ~0x14, ~0),        "d,[1+2]A", F_ALIAS, v9 },
00464 { "stwa",     F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),       "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */
00465 { "stwa",     F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[1+i]o", F_ALIAS, v9 },
00466 { "stwa",     F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[i+1]o", F_ALIAS, v9 },
00467 { "stwa",     F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00468 { "stwa",     F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0),    "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */
00469 { "stswa",    F3(3, 0x14, 0), F3(~3, ~0x14, ~0),        "d,[1+2]A", F_ALIAS, v9 },
00470 { "stswa",    F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),       "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */
00471 { "stswa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[1+i]o", F_ALIAS, v9 },
00472 { "stswa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[i+1]o", F_ALIAS, v9 },
00473 { "stswa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00474 { "stswa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0),    "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */
00475 { "stuwa",    F3(3, 0x14, 0), F3(~3, ~0x14, ~0),        "d,[1+2]A", F_ALIAS, v9 },
00476 { "stuwa",    F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),       "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */
00477 { "stuwa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[1+i]o", F_ALIAS, v9 },
00478 { "stuwa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1),        "d,[i+1]o", F_ALIAS, v9 },
00479 { "stuwa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00480 { "stuwa",    F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0),    "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */
00481 
00482 { "stb",      F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0),       "d,[1+2]", 0, v6 },
00483 { "stb",      F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0),   "d,[1]", 0, v6 }, /* stb d,[rs1+%g0] */
00484 { "stb",      F3(3, 0x05, 1), F3(~3, ~0x05, ~1),        "d,[1+i]", 0, v6 },
00485 { "stb",      F3(3, 0x05, 1), F3(~3, ~0x05, ~1),        "d,[i+1]", 0, v6 },
00486 { "stb",      F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", 0, v6 },
00487 { "stb",      F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0),    "d,[1]", 0, v6 }, /* stb d,[rs1+0] */
00488 
00489 { "stsb",     F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v6 },
00490 { "stsb",     F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+%g0] */
00491 { "stsb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1),        "d,[1+i]", F_ALIAS, v6 },
00492 { "stsb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1),        "d,[i+1]", F_ALIAS, v6 },
00493 { "stsb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00494 { "stsb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+0] */
00495 { "stub",     F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v6 },
00496 { "stub",     F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+%g0] */
00497 { "stub",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1),        "d,[1+i]", F_ALIAS, v6 },
00498 { "stub",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1),        "d,[i+1]", F_ALIAS, v6 },
00499 { "stub",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00500 { "stub",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+0] */
00501 
00502 { "stba",     F3(3, 0x15, 0), F3(~3, ~0x15, ~0),        "d,[1+2]A", 0, v6 },
00503 { "stba",     F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0),       "d,[1]A", 0, v6 }, /* stba d,[rs1+%g0] */
00504 { "stba",     F3(3, 0x15, 1), F3(~3, ~0x15, ~1),        "d,[1+i]o", 0, v9 },
00505 { "stba",     F3(3, 0x15, 1), F3(~3, ~0x15, ~1),        "d,[i+1]o", 0, v9 },
00506 { "stba",     F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00507 { "stba",     F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0),    "d,[1]o", 0, v9 }, /* stb d,[rs1+0] */
00508 
00509 { "stsba",    F3(3, 0x15, 0), F3(~3, ~0x15, ~0),        "d,[1+2]A", F_ALIAS, v6 },
00510 { "stsba",    F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0),       "d,[1]A", F_ALIAS, v6 }, /* stba d,[rs1+%g0] */
00511 { "stsba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1),        "d,[1+i]o", F_ALIAS, v9 },
00512 { "stsba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1),        "d,[i+1]o", F_ALIAS, v9 },
00513 { "stsba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00514 { "stsba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0),    "d,[1]o", F_ALIAS, v9 }, /* stb d,[rs1+0] */
00515 { "stuba",    F3(3, 0x15, 0), F3(~3, ~0x15, ~0),        "d,[1+2]A", F_ALIAS, v6 },
00516 { "stuba",    F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0),       "d,[1]A", F_ALIAS, v6 }, /* stba d,[rs1+%g0] */
00517 { "stuba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1),        "d,[1+i]o", F_ALIAS, v9 },
00518 { "stuba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1),        "d,[i+1]o", F_ALIAS, v9 },
00519 { "stuba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00520 { "stuba",    F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0),    "d,[1]o", F_ALIAS, v9 }, /* stb d,[rs1+0] */
00521 
00522 { "std",      F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0),       "d,[1+2]", 0, v6 },
00523 { "std",      F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0),   "d,[1]", 0, v6 }, /* std d,[rs1+%g0] */
00524 { "std",      F3(3, 0x07, 1), F3(~3, ~0x07, ~1),        "d,[1+i]", 0, v6 },
00525 { "std",      F3(3, 0x07, 1), F3(~3, ~0x07, ~1),        "d,[i+1]", 0, v6 },
00526 { "std",      F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0, "d,[i]", 0, v6 },
00527 { "std",      F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0),    "d,[1]", 0, v6 }, /* std d,[rs1+0] */
00528 
00529 { "std",      F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0),       "q,[1+2]", 0, v6notv9 },
00530 { "std",      F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0),   "q,[1]", 0, v6notv9 }, /* std d,[rs1+%g0] */
00531 { "std",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1),        "q,[1+i]", 0, v6notv9 },
00532 { "std",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1),        "q,[i+1]", 0, v6notv9 },
00533 { "std",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0, "q,[i]", 0, v6notv9 },
00534 { "std",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0),    "q,[1]", 0, v6notv9 }, /* std d,[rs1+0] */
00535 { "std",      F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI(~0),       "H,[1+2]", 0, v6 },
00536 { "std",      F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI_RS2(~0),   "H,[1]", 0, v6 }, /* std d,[rs1+%g0] */
00537 { "std",      F3(3, 0x27, 1), F3(~3, ~0x27, ~1),        "H,[1+i]", 0, v6 },
00538 { "std",      F3(3, 0x27, 1), F3(~3, ~0x27, ~1),        "H,[i+1]", 0, v6 },
00539 { "std",      F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|RS1_G0, "H,[i]", 0, v6 },
00540 { "std",      F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|SIMM13(~0),    "H,[1]", 0, v6 }, /* std d,[rs1+0] */
00541 
00542 { "std",      F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0),       "Q,[1+2]", 0, v6notv9 },
00543 { "std",      F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0),   "Q,[1]", 0, v6notv9 }, /* std d,[rs1+%g0] */
00544 { "std",      F3(3, 0x36, 1), F3(~3, ~0x36, ~1),        "Q,[1+i]", 0, v6notv9 },
00545 { "std",      F3(3, 0x36, 1), F3(~3, ~0x36, ~1),        "Q,[i+1]", 0, v6notv9 },
00546 { "std",      F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0, "Q,[i]", 0, v6notv9 },
00547 { "std",      F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0),    "Q,[1]", 0, v6notv9 }, /* std d,[rs1+0] */
00548 { "std",      F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI(~0),       "D,[1+2]", 0, v6notv9 },
00549 { "std",      F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI_RS2(~0),   "D,[1]", 0, v6notv9 }, /* std d,[rs1+%g0] */
00550 { "std",      F3(3, 0x37, 1), F3(~3, ~0x37, ~1),        "D,[1+i]", 0, v6notv9 },
00551 { "std",      F3(3, 0x37, 1), F3(~3, ~0x37, ~1),        "D,[i+1]", 0, v6notv9 },
00552 { "std",      F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0, "D,[i]", 0, v6notv9 },
00553 { "std",      F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0),    "D,[1]", 0, v6notv9 }, /* std d,[rs1+0] */
00554 
00555 { "spilld",   F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v6 },
00556 { "spilld",   F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v6 }, /* std d,[rs1+%g0] */
00557 { "spilld",   F3(3, 0x07, 1), F3(~3, ~0x07, ~1),        "d,[1+i]", F_ALIAS, v6 },
00558 { "spilld",   F3(3, 0x07, 1), F3(~3, ~0x07, ~1),        "d,[i+1]", F_ALIAS, v6 },
00559 { "spilld",   F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00560 { "spilld",   F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v6 }, /* std d,[rs1+0] */
00561 
00562 { "stda",     F3(3, 0x17, 0), F3(~3, ~0x17, ~0),        "d,[1+2]A", 0, v6 },
00563 { "stda",     F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0),       "d,[1]A", 0, v6 }, /* stda d,[rs1+%g0] */
00564 { "stda",     F3(3, 0x17, 1), F3(~3, ~0x17, ~1),        "d,[1+i]o", 0, v9 },
00565 { "stda",     F3(3, 0x17, 1), F3(~3, ~0x17, ~1),        "d,[i+1]o", 0, v9 },
00566 { "stda",     F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00567 { "stda",     F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|SIMM13(~0),    "d,[1]o", 0, v9 }, /* std d,[rs1+0] */
00568 { "stda",     F3(3, 0x37, 0), F3(~3, ~0x37, ~0),        "H,[1+2]A", 0, v9 },
00569 { "stda",     F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|RS2(~0),       "H,[1]A", 0, v9 }, /* stda d,[rs1+%g0] */
00570 { "stda",     F3(3, 0x37, 1), F3(~3, ~0x37, ~1),        "H,[1+i]o", 0, v9 },
00571 { "stda",     F3(3, 0x37, 1), F3(~3, ~0x37, ~1),        "H,[i+1]o", 0, v9 },
00572 { "stda",     F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0, "H,[i]o", 0, v9 },
00573 { "stda",     F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0),    "H,[1]o", 0, v9 }, /* std d,[rs1+0] */
00574 
00575 { "sth",      F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0),       "d,[1+2]", 0, v6 },
00576 { "sth",      F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0),   "d,[1]", 0, v6 }, /* sth d,[rs1+%g0] */
00577 { "sth",      F3(3, 0x06, 1), F3(~3, ~0x06, ~1),        "d,[1+i]", 0, v6 },
00578 { "sth",      F3(3, 0x06, 1), F3(~3, ~0x06, ~1),        "d,[i+1]", 0, v6 },
00579 { "sth",      F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", 0, v6 },
00580 { "sth",      F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0),    "d,[1]", 0, v6 }, /* sth d,[rs1+0] */
00581 
00582 { "stsh",     F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v6 },
00583 { "stsh",     F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+%g0] */
00584 { "stsh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1),        "d,[1+i]", F_ALIAS, v6 },
00585 { "stsh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1),        "d,[i+1]", F_ALIAS, v6 },
00586 { "stsh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00587 { "stsh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+0] */
00588 { "stuh",     F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0),       "d,[1+2]", F_ALIAS, v6 },
00589 { "stuh",     F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0),   "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+%g0] */
00590 { "stuh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1),        "d,[1+i]", F_ALIAS, v6 },
00591 { "stuh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1),        "d,[i+1]", F_ALIAS, v6 },
00592 { "stuh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00593 { "stuh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0),    "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+0] */
00594 
00595 { "stha",     F3(3, 0x16, 0), F3(~3, ~0x16, ~0),        "d,[1+2]A", 0, v6 },
00596 { "stha",     F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0),       "d,[1]A", 0, v6 }, /* stha ,[rs1+%g0] */
00597 { "stha",     F3(3, 0x16, 1), F3(~3, ~0x16, ~1),        "d,[1+i]o", 0, v9 },
00598 { "stha",     F3(3, 0x16, 1), F3(~3, ~0x16, ~1),        "d,[i+1]o", 0, v9 },
00599 { "stha",     F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00600 { "stha",     F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0),    "d,[1]o", 0, v9 }, /* sth d,[rs1+0] */
00601 
00602 { "stsha",    F3(3, 0x16, 0), F3(~3, ~0x16, ~0),        "d,[1+2]A", F_ALIAS, v6 },
00603 { "stsha",    F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0),       "d,[1]A", F_ALIAS, v6 }, /* stha ,[rs1+%g0] */
00604 { "stsha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1),        "d,[1+i]o", F_ALIAS, v9 },
00605 { "stsha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1),        "d,[i+1]o", F_ALIAS, v9 },
00606 { "stsha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00607 { "stsha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0),    "d,[1]o", F_ALIAS, v9 }, /* sth d,[rs1+0] */
00608 { "stuha",    F3(3, 0x16, 0), F3(~3, ~0x16, ~0),        "d,[1+2]A", F_ALIAS, v6 },
00609 { "stuha",    F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0),       "d,[1]A", F_ALIAS, v6 }, /* stha ,[rs1+%g0] */
00610 { "stuha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1),        "d,[1+i]o", F_ALIAS, v9 },
00611 { "stuha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1),        "d,[i+1]o", F_ALIAS, v9 },
00612 { "stuha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00613 { "stuha",    F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0),    "d,[1]o", F_ALIAS, v9 }, /* sth d,[rs1+0] */
00614 
00615 { "stx",      F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI(~0),       "d,[1+2]", 0, v9 },
00616 { "stx",      F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI_RS2(~0),   "d,[1]", 0, v9 }, /* stx d,[rs1+%g0] */
00617 { "stx",      F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1),        "d,[1+i]", 0, v9 },
00618 { "stx",      F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1),        "d,[i+1]", 0, v9 },
00619 { "stx",      F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RS1_G0, "d,[i]", 0, v9 },
00620 { "stx",      F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|SIMM13(~0),    "d,[1]", 0, v9 }, /* stx d,[rs1+0] */
00621 
00622 { "stx",      F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI(~0)|RD(~1), "F,[1+2]", 0, v9 },
00623 { "stx",      F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI_RS2(~0)|RD(~1),"F,[1]", 0, v9 }, /* stx d,[rs1+%g0] */
00624 { "stx",      F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1),         "F,[1+i]", 0, v9 },
00625 { "stx",      F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1),         "F,[i+1]", 0, v9 },
00626 { "stx",      F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RS1_G0|RD(~1),  "F,[i]", 0, v9 },
00627 { "stx",      F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|SIMM13(~0)|RD(~1),"F,[1]", 0, v9 }, /* stx d,[rs1+0] */
00628 
00629 { "stxa",     F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0),        "d,[1+2]A", 0, v9 },
00630 { "stxa",     F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0)|RS2(~0),       "d,[1]A", 0, v9 }, /* stxa d,[rs1+%g0] */
00631 { "stxa",     F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1),        "d,[1+i]o", 0, v9 },
00632 { "stxa",     F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1),        "d,[i+1]o", 0, v9 },
00633 { "stxa",     F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00634 { "stxa",     F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|SIMM13(~0),    "d,[1]o", 0, v9 }, /* stx d,[rs1+0] */
00635 
00636 { "stq",      F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0),       "J,[1+2]", 0, v9 },
00637 { "stq",      F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0),   "J,[1]", 0, v9 }, /* stq [rs1+%g0] */
00638 { "stq",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1),        "J,[1+i]", 0, v9 },
00639 { "stq",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1),        "J,[i+1]", 0, v9 },
00640 { "stq",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0, "J,[i]", 0, v9 },
00641 { "stq",      F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0),    "J,[1]", 0, v9 }, /* stq [rs1+0] */
00642 
00643 { "stqa",     F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0),       "J,[1+2]A", 0, v9 },
00644 { "stqa",     F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0),   "J,[1]A", 0, v9 }, /* stqa [rs1+%g0] */
00645 { "stqa",     F3(3, 0x36, 1), F3(~3, ~0x36, ~1),        "J,[1+i]o", 0, v9 },
00646 { "stqa",     F3(3, 0x36, 1), F3(~3, ~0x36, ~1),        "J,[i+1]o", 0, v9 },
00647 { "stqa",     F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0, "J,[i]o", 0, v9 },
00648 { "stqa",     F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0),    "J,[1]o", 0, v9 }, /* stqa [rs1+0] */
00649 
00650 { "swap",     F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI(~0),       "[1+2],d", 0, v7 },
00651 { "swap",     F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI_RS2(~0),   "[1],d", 0, v7 }, /* swap [rs1+%g0],d */
00652 { "swap",     F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1),        "[1+i],d", 0, v7 },
00653 { "swap",     F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1),        "[i+1],d", 0, v7 },
00654 { "swap",     F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|RS1_G0, "[i],d", 0, v7 },
00655 { "swap",     F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|SIMM13(~0),    "[1],d", 0, v7 }, /* swap [rs1+0],d */
00656 
00657 { "swapa",    F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0),        "[1+2]A,d", 0, v7 },
00658 { "swapa",    F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0)|RS2(~0),       "[1]A,d", 0, v7 }, /* swapa [rs1+%g0],d */
00659 { "swapa",    F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1),        "[1+i]o,d", 0, v9 },
00660 { "swapa",    F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1),        "[i+1]o,d", 0, v9 },
00661 { "swapa",    F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00662 { "swapa",    F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|SIMM13(~0),    "[1]o,d", 0, v9 }, /* swap [rs1+0],d */
00663 
00664 { "restore",  F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|ASI(~0),                     "1,2,d", 0, v6 },
00665 { "restore",  F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|RD_G0|RS1_G0|ASI_RS2(~0),    "", 0, v6 }, /* restore %g0,%g0,%g0 */
00666 { "restore",  F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1),                      "1,i,d", 0, v6 },
00667 { "restore",  F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1)|RD_G0|RS1_G0|SIMM13(~0),     "", 0, v6 }, /* restore %g0,0,%g0 */
00668 
00669 { "rett",     F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, v6 }, /* rett rs1+rs2 */
00670 { "rett",     F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI_RS2(~0),    "1", F_UNBR|F_DELAYED, v6 },       /* rett rs1,%g0 */
00671 { "rett",     F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0,         "1+i", F_UNBR|F_DELAYED, v6 }, /* rett rs1+X */
00672 { "rett",     F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0,         "i+1", F_UNBR|F_DELAYED, v6 }, /* rett X+rs1 */
00673 { "rett",     F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0,         "i", F_UNBR|F_DELAYED, v6 }, /* rett X+rs1 */
00674 { "rett",     F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0,         "i", F_UNBR|F_DELAYED, v6 },       /* rett X */
00675 { "rett",     F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|SIMM13(~0),     "1", F_UNBR|F_DELAYED, v6 },       /* rett rs1+0 */
00676 
00677 { "save",     F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00678 { "save",     F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1),        "1,i,d", 0, v6 },
00679 { "save",     0x81e00000,   ~0x81e00000,                "", F_ALIAS, v6 },
00680 
00681 { "ret",  F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8),         "", F_UNBR|F_DELAYED, v6 }, /* jmpl %i7+8,%g0 */
00682 { "retl", F3(2, 0x38, 1)|RS1(0x0f)|SIMM13(8), F3(~2, ~0x38, ~1)|RS1(~0x0f)|SIMM13(~8), "", F_UNBR|F_DELAYED, v6 }, /* jmpl %o7+8,%g0 */
00683 
00684 { "jmpl",     F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI(~0),       "1+2,d", F_JSR|F_DELAYED, v6 },
00685 { "jmpl",     F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI_RS2(~0),   "1,d", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+%g0,d */
00686 { "jmpl",     F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|SIMM13(~0),    "1,d", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+0,d */
00687 { "jmpl",     F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RS1_G0, "i,d", F_JSR|F_DELAYED, v6 }, /* jmpl %g0+i,d */
00688 { "jmpl",     F3(2, 0x38, 1), F3(~2, ~0x38, ~1),        "1+i,d", F_JSR|F_DELAYED, v6 },
00689 { "jmpl",     F3(2, 0x38, 1), F3(~2, ~0x38, ~1),        "i+1,d", F_JSR|F_DELAYED, v6 },
00690 
00691 { "done",     F3(2, 0x3e, 0)|RD(0), F3(~2, ~0x3e, ~0)|RD(~0)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00692 { "retry",    F3(2, 0x3e, 0)|RD(1), F3(~2, ~0x3e, ~0)|RD(~1)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00693 { "saved",    F3(2, 0x31, 0)|RD(0), F3(~2, ~0x31, ~0)|RD(~0)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00694 { "restored", F3(2, 0x31, 0)|RD(1), F3(~2, ~0x31, ~0)|RD(~1)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00695 { "allclean", F3(2, 0x31, 0)|RD(2), F3(~2, ~0x31, ~0)|RD(~2)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00696 { "otherw",   F3(2, 0x31, 0)|RD(3), F3(~2, ~0x31, ~0)|RD(~3)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00697 { "normalw",  F3(2, 0x31, 0)|RD(4), F3(~2, ~0x31, ~0)|RD(~4)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00698 { "invalw",   F3(2, 0x31, 0)|RD(5), F3(~2, ~0x31, ~0)|RD(~5)|RS1_G0|SIMM13(~0),     "", 0, v9 },
00699 { "sir",      F3(2, 0x30, 1)|RD(0xf), F3(~2, ~0x30, ~1)|RD(~0xf)|RS1_G0,            "i", 0, v9 },
00700 
00701 { "flush",    F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0),       "1+2", 0, v8 },
00702 { "flush",    F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0),   "1", 0, v8 }, /* flush rs1+%g0 */
00703 { "flush",    F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0),    "1", 0, v8 }, /* flush rs1+0 */
00704 { "flush",    F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0, "i", 0, v8 }, /* flush %g0+i */
00705 { "flush",    F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),        "1+i", 0, v8 },
00706 { "flush",    F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),        "i+1", 0, v8 },
00707 
00708 /* IFLUSH was renamed to FLUSH in v8.  */
00709 { "iflush",   F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0),       "1+2", F_ALIAS, v6 },
00710 { "iflush",   F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0),   "1", F_ALIAS, v6 }, /* flush rs1+%g0 */
00711 { "iflush",   F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0),    "1", F_ALIAS, v6 }, /* flush rs1+0 */
00712 { "iflush",   F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0, "i", F_ALIAS, v6 },
00713 { "iflush",   F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),        "1+i", F_ALIAS, v6 },
00714 { "iflush",   F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),        "i+1", F_ALIAS, v6 },
00715 
00716 { "return",   F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI(~0),       "1+2", 0, v9 },
00717 { "return",   F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI_RS2(~0),   "1", 0, v9 }, /* return rs1+%g0 */
00718 { "return",   F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|SIMM13(~0),    "1", 0, v9 }, /* return rs1+0 */
00719 { "return",   F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RS1_G0, "i", 0, v9 }, /* return %g0+i */
00720 { "return",   F3(2, 0x39, 1), F3(~2, ~0x39, ~1),        "1+i", 0, v9 },
00721 { "return",   F3(2, 0x39, 1), F3(~2, ~0x39, ~1),        "i+1", 0, v9 },
00722 
00723 { "flushw",   F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RD_G0|RS1_G0|ASI_RS2(~0),    "", 0, v9 },
00724 
00725 { "membar",   F3(2, 0x28, 1)|RS1(0xf), F3(~2, ~0x28, ~1)|RD_G0|RS1(~0xf)|SIMM13(~127), "K", 0, v9 },
00726 { "stbar",    F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0|RS1(~0xf)|SIMM13(~0), "", 0, v8 },
00727 
00728 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0),        "[1+2],*", 0, v9 },
00729 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0)|RS2_G0, "[1],*", 0, v9 }, /* prefetch [rs1+%g0],prefetch_fcn */
00730 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1),        "[1+i],*", 0, v9 },
00731 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1),        "[i+1],*", 0, v9 },
00732 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|RS1_G0, "[i],*", 0, v9 },
00733 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|SIMM13(~0),    "[1],*", 0, v9 }, /* prefetch [rs1+0],prefetch_fcn */
00734 { "prefetcha",       F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0),        "[1+2]A,*", 0, v9 },
00735 { "prefetcha",       F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0)|RS2_G0, "[1]A,*", 0, v9 }, /* prefetcha [rs1+%g0],prefetch_fcn */
00736 { "prefetcha",       F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1),        "[1+i]o,*", 0, v9 },
00737 { "prefetcha",       F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1),        "[i+1]o,*", 0, v9 },
00738 { "prefetcha",       F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|RS1_G0, "[i]o,*", 0, v9 },
00739 { "prefetcha",       F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|SIMM13(~0),    "[1]o,*", 0, v9 }, /* prefetcha [rs1+0],d */
00740 
00741 { "sll",      F3(2, 0x25, 0), F3(~2, ~0x25, ~0)|(1<<12)|(0x7f<<5),    "1,2,d", 0, v6 },
00742 { "sll",      F3(2, 0x25, 1), F3(~2, ~0x25, ~1)|(1<<12)|(0x7f<<5),    "1,X,d", 0, v6 },
00743 { "sra",      F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|(0x7f<<5),    "1,2,d", 0, v6 },
00744 { "sra",      F3(2, 0x27, 1), F3(~2, ~0x27, ~1)|(1<<12)|(0x7f<<5),    "1,X,d", 0, v6 },
00745 { "srl",      F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|(0x7f<<5),    "1,2,d", 0, v6 },
00746 { "srl",      F3(2, 0x26, 1), F3(~2, ~0x26, ~1)|(1<<12)|(0x7f<<5),    "1,X,d", 0, v6 },
00747 
00748 { "sllx",     F3(2, 0x25, 0)|(1<<12), F3(~2, ~0x25, ~0)|(0x7f<<5),    "1,2,d", 0, v9 },
00749 { "sllx",     F3(2, 0x25, 1)|(1<<12), F3(~2, ~0x25, ~1)|(0x3f<<6),    "1,Y,d", 0, v9 },
00750 { "srax",     F3(2, 0x27, 0)|(1<<12), F3(~2, ~0x27, ~0)|(0x7f<<5),    "1,2,d", 0, v9 },
00751 { "srax",     F3(2, 0x27, 1)|(1<<12), F3(~2, ~0x27, ~1)|(0x3f<<6),    "1,Y,d", 0, v9 },
00752 { "srlx",     F3(2, 0x26, 0)|(1<<12), F3(~2, ~0x26, ~0)|(0x7f<<5),    "1,2,d", 0, v9 },
00753 { "srlx",     F3(2, 0x26, 1)|(1<<12), F3(~2, ~0x26, ~1)|(0x3f<<6),    "1,Y,d", 0, v9 },
00754 
00755 { "mulscc",   F3(2, 0x24, 0), F3(~2, ~0x24, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00756 { "mulscc",   F3(2, 0x24, 1), F3(~2, ~0x24, ~1),        "1,i,d", 0, v6 },
00757 
00758 { "divscc",   F3(2, 0x1d, 0), F3(~2, ~0x1d, ~0)|ASI(~0),       "1,2,d", 0, sparclite },
00759 { "divscc",   F3(2, 0x1d, 1), F3(~2, ~0x1d, ~1),        "1,i,d", 0, sparclite },
00760 
00761 { "scan",     F3(2, 0x2c, 0), F3(~2, ~0x2c, ~0)|ASI(~0),       "1,2,d", 0, sparclet|sparclite },
00762 { "scan",     F3(2, 0x2c, 1), F3(~2, ~0x2c, ~1),        "1,i,d", 0, sparclet|sparclite },
00763 
00764 { "popc",     F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS1_G0|ASI(~0),"2,d", 0, v9 },
00765 { "popc",     F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS1_G0, "i,d", 0, v9 },
00766 
00767 { "clr",      F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RD_G0|RS1_G0|ASI_RS2(~0),    "d", F_ALIAS, v6 }, /* or %g0,%g0,d */
00768 { "clr",      F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0|SIMM13(~0),           "d", F_ALIAS, v6 }, /* or %g0,0,d  */
00769 { "clr",      F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0|ASI(~0),        "[1+2]", F_ALIAS, v6 },
00770 { "clr",      F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0|ASI_RS2(~0),           "[1]", F_ALIAS, v6 }, /* st %g0,[rs1+%g0] */
00771 { "clr",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0,                "[1+i]", F_ALIAS, v6 },
00772 { "clr",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0,                "[i+1]", F_ALIAS, v6 },
00773 { "clr",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0|RS1_G0,                "[i]", F_ALIAS, v6 },
00774 { "clr",      F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0|SIMM13(~0),            "[1]", F_ALIAS, v6 }, /* st %g0,[rs1+0] */
00775 
00776 { "clrb",     F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0|ASI(~0), "[1+2]", F_ALIAS, v6 },
00777 { "clrb",     F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0|ASI_RS2(~0),    "[1]", F_ALIAS, v6 }, /* stb %g0,[rs1+%g0] */
00778 { "clrb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0,         "[1+i]", F_ALIAS, v6 },
00779 { "clrb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0,         "[i+1]", F_ALIAS, v6 },
00780 { "clrb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0|RS1_G0,         "[i]", F_ALIAS, v6 },
00781 { "clrb",     F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0|SIMM13(~0),     "[1]", F_ALIAS, v6 }, /* stb %g0,[rs1+0] */
00782 
00783 { "clrh",     F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0|ASI(~0), "[1+2]", F_ALIAS, v6 },
00784 { "clrh",     F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0|ASI_RS2(~0),    "[1]", F_ALIAS, v6 }, /* sth %g0,[rs1+%g0] */
00785 { "clrh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0,         "[1+i]", F_ALIAS, v6 },
00786 { "clrh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0,         "[i+1]", F_ALIAS, v6 },
00787 { "clrh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0|RS1_G0,         "[i]", F_ALIAS, v6 },
00788 { "clrh",     F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0|SIMM13(~0),     "[1]", F_ALIAS, v6 }, /* sth %g0,[rs1+0] */
00789 
00790 { "clrx",     F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|RD_G0|ASI(~0), "[1+2]", F_ALIAS, v9 },
00791 { "clrx",     F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|RD_G0|ASI_RS2(~0),    "[1]", F_ALIAS, v9 }, /* stx %g0,[rs1+%g0] */
00792 { "clrx",     F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0,         "[1+i]", F_ALIAS, v9 },
00793 { "clrx",     F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0,         "[i+1]", F_ALIAS, v9 },
00794 { "clrx",     F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0|RS1_G0,         "[i]", F_ALIAS, v9 },
00795 { "clrx",     F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0|SIMM13(~0),     "[1]", F_ALIAS, v9 }, /* stx %g0,[rs1+0] */
00796 
00797 { "orcc",     F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00798 { "orcc",     F3(2, 0x12, 1), F3(~2, ~0x12, ~1),        "1,i,d", 0, v6 },
00799 { "orcc",     F3(2, 0x12, 1), F3(~2, ~0x12, ~1),        "i,1,d", 0, v6 },
00800 
00801 /* This is not a commutative instruction.  */
00802 { "orncc",    F3(2, 0x16, 0), F3(~2, ~0x16, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00803 { "orncc",    F3(2, 0x16, 1), F3(~2, ~0x16, ~1),        "1,i,d", 0, v6 },
00804 
00805 /* This is not a commutative instruction.  */
00806 { "orn",      F3(2, 0x06, 0), F3(~2, ~0x06, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00807 { "orn",      F3(2, 0x06, 1), F3(~2, ~0x06, ~1),        "1,i,d", 0, v6 },
00808 
00809 { "tst",      F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0|ASI_RS2(~0),    "1", 0, v6 }, /* orcc rs1, %g0, %g0 */
00810 { "tst",      F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0|RS1_G0|ASI(~0), "2", 0, v6 }, /* orcc %g0, rs2, %g0 */
00811 { "tst",      F3(2, 0x12, 1), F3(~2, ~0x12, ~1)|RD_G0|SIMM13(~0),     "1", 0, v6 }, /* orcc rs1, 0, %g0 */
00812 
00813 { "wr",       F3(2, 0x30, 0),             F3(~2, ~0x30, ~0)|ASI(~0),         "1,2,m", 0, v8 }, /* wr r,r,%asrX */
00814 { "wr",       F3(2, 0x30, 1),             F3(~2, ~0x30, ~1),                 "1,i,m", 0, v8 }, /* wr r,i,%asrX */
00815 { "wr",       F3(2, 0x30, 0),             F3(~2, ~0x30, ~0)|ASI_RS2(~0),            "1,m", F_ALIAS, v8 }, /* wr rs1,%g0,%asrX */
00816 { "wr",       F3(2, 0x30, 0),             F3(~2, ~0x30, ~0)|RD_G0|ASI(~0),   "1,2,y", 0, v6 }, /* wr r,r,%y */
00817 { "wr",       F3(2, 0x30, 1),             F3(~2, ~0x30, ~1)|RD_G0,           "1,i,y", 0, v6 }, /* wr r,i,%y */
00818 { "wr",       F3(2, 0x30, 0),             F3(~2, ~0x30, ~0)|RD_G0|ASI_RS2(~0),      "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */
00819 { "wr",       F3(2, 0x31, 0),             F3(~2, ~0x31, ~0)|RD_G0|ASI(~0),   "1,2,p", 0, v6notv9 }, /* wr r,r,%psr */
00820 { "wr",       F3(2, 0x31, 1),             F3(~2, ~0x31, ~1)|RD_G0,           "1,i,p", 0, v6notv9 }, /* wr r,i,%psr */
00821 { "wr",       F3(2, 0x31, 0),             F3(~2, ~0x31, ~0)|RD_G0|ASI_RS2(~0),      "1,p", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%psr */
00822 { "wr",       F3(2, 0x32, 0),             F3(~2, ~0x32, ~0)|RD_G0|ASI(~0),   "1,2,w", 0, v6notv9 }, /* wr r,r,%wim */
00823 { "wr",       F3(2, 0x32, 1),             F3(~2, ~0x32, ~1)|RD_G0,           "1,i,w", 0, v6notv9 }, /* wr r,i,%wim */
00824 { "wr",       F3(2, 0x32, 0),             F3(~2, ~0x32, ~0)|RD_G0|ASI_RS2(~0),      "1,w", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%wim */
00825 { "wr",       F3(2, 0x33, 0),             F3(~2, ~0x33, ~0)|RD_G0|ASI(~0),   "1,2,t", 0, v6notv9 }, /* wr r,r,%tbr */
00826 { "wr",       F3(2, 0x33, 1),             F3(~2, ~0x33, ~1)|RD_G0,           "1,i,t", 0, v6notv9 }, /* wr r,i,%tbr */
00827 { "wr",       F3(2, 0x33, 0),             F3(~2, ~0x33, ~0)|RD_G0|ASI_RS2(~0),      "1,t", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%tbr */
00828 
00829 { "wr", F3(2, 0x30, 0)|RD(2),      F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0),  "1,2,E", 0, v9 }, /* wr r,r,%ccr */
00830 { "wr", F3(2, 0x30, 1)|RD(2),      F3(~2, ~0x30, ~1)|RD(~2),          "1,i,E", 0, v9 }, /* wr r,i,%ccr */
00831 { "wr", F3(2, 0x30, 0)|RD(3),      F3(~2, ~0x30, ~0)|RD(~3)|ASI(~0),  "1,2,o", 0, v9 }, /* wr r,r,%asi */
00832 { "wr", F3(2, 0x30, 1)|RD(3),      F3(~2, ~0x30, ~1)|RD(~3),          "1,i,o", 0, v9 }, /* wr r,i,%asi */
00833 { "wr", F3(2, 0x30, 0)|RD(6),      F3(~2, ~0x30, ~0)|RD(~6)|ASI(~0),  "1,2,s", 0, v9 }, /* wr r,r,%fprs */
00834 { "wr", F3(2, 0x30, 1)|RD(6),      F3(~2, ~0x30, ~1)|RD(~6),          "1,i,s", 0, v9 }, /* wr r,i,%fprs */
00835 
00836 { "wr", F3(2, 0x30, 0)|RD(16),     F3(~2, ~0x30, ~0)|RD(~16)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%pcr */
00837 { "wr", F3(2, 0x30, 1)|RD(16),     F3(~2, ~0x30, ~1)|RD(~16),         "1,i,_", 0, v9a }, /* wr r,i,%pcr */
00838 { "wr", F3(2, 0x30, 0)|RD(17),     F3(~2, ~0x30, ~0)|RD(~17)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%pic */
00839 { "wr", F3(2, 0x30, 1)|RD(17),     F3(~2, ~0x30, ~1)|RD(~17),         "1,i,_", 0, v9a }, /* wr r,i,%pic */
00840 { "wr", F3(2, 0x30, 0)|RD(18),     F3(~2, ~0x30, ~0)|RD(~18)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%dcr */
00841 { "wr", F3(2, 0x30, 1)|RD(18),     F3(~2, ~0x30, ~1)|RD(~18),         "1,i,_", 0, v9a }, /* wr r,i,%dcr */
00842 { "wr", F3(2, 0x30, 0)|RD(19),     F3(~2, ~0x30, ~0)|RD(~19)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%gsr */
00843 { "wr", F3(2, 0x30, 1)|RD(19),     F3(~2, ~0x30, ~1)|RD(~19),         "1,i,_", 0, v9a }, /* wr r,i,%gsr */
00844 { "wr", F3(2, 0x30, 0)|RD(20),     F3(~2, ~0x30, ~0)|RD(~20)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%set_softint */
00845 { "wr", F3(2, 0x30, 1)|RD(20),     F3(~2, ~0x30, ~1)|RD(~20),         "1,i,_", 0, v9a }, /* wr r,i,%set_softint */
00846 { "wr", F3(2, 0x30, 0)|RD(21),     F3(~2, ~0x30, ~0)|RD(~21)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%clear_softint */
00847 { "wr", F3(2, 0x30, 1)|RD(21),     F3(~2, ~0x30, ~1)|RD(~21),         "1,i,_", 0, v9a }, /* wr r,i,%clear_softint */
00848 { "wr", F3(2, 0x30, 0)|RD(22),     F3(~2, ~0x30, ~0)|RD(~22)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%softint */
00849 { "wr", F3(2, 0x30, 1)|RD(22),     F3(~2, ~0x30, ~1)|RD(~22),         "1,i,_", 0, v9a }, /* wr r,i,%softint */
00850 { "wr", F3(2, 0x30, 0)|RD(23),     F3(~2, ~0x30, ~0)|RD(~23)|ASI(~0), "1,2,_", 0, v9a }, /* wr r,r,%tick_cmpr */
00851 { "wr", F3(2, 0x30, 1)|RD(23),     F3(~2, ~0x30, ~1)|RD(~23),         "1,i,_", 0, v9a }, /* wr r,i,%tick_cmpr */
00852 { "wr", F3(2, 0x30, 0)|RD(24),     F3(~2, ~0x30, ~0)|RD(~24)|ASI(~0), "1,2,_", 0, v9b }, /* wr r,r,%sys_tick */
00853 { "wr", F3(2, 0x30, 1)|RD(24),     F3(~2, ~0x30, ~1)|RD(~24),         "1,i,_", 0, v9b }, /* wr r,i,%sys_tick */
00854 { "wr", F3(2, 0x30, 0)|RD(25),     F3(~2, ~0x30, ~0)|RD(~25)|ASI(~0), "1,2,_", 0, v9b }, /* wr r,r,%sys_tick_cmpr */
00855 { "wr", F3(2, 0x30, 1)|RD(25),     F3(~2, ~0x30, ~1)|RD(~25),         "1,i,_", 0, v9b }, /* wr r,i,%sys_tick_cmpr */
00856 
00857 { "rd",       F3(2, 0x28, 0),                    F3(~2, ~0x28, ~0)|SIMM13(~0),             "M,d", 0, v8 }, /* rd %asrX,r */
00858 { "rd",       F3(2, 0x28, 0),                    F3(~2, ~0x28, ~0)|RS1_G0|SIMM13(~0),      "y,d", 0, v6 }, /* rd %y,r */
00859 { "rd",       F3(2, 0x29, 0),                    F3(~2, ~0x29, ~0)|RS1_G0|SIMM13(~0),      "p,d", 0, v6notv9 }, /* rd %psr,r */
00860 { "rd",       F3(2, 0x2a, 0),                    F3(~2, ~0x2a, ~0)|RS1_G0|SIMM13(~0),      "w,d", 0, v6notv9 }, /* rd %wim,r */
00861 { "rd",       F3(2, 0x2b, 0),                    F3(~2, ~0x2b, ~0)|RS1_G0|SIMM13(~0),      "t,d", 0, v6notv9 }, /* rd %tbr,r */
00862 
00863 { "rd",       F3(2, 0x28, 0)|RS1(2),             F3(~2, ~0x28, ~0)|RS1(~2)|SIMM13(~0),     "E,d", 0, v9 }, /* rd %ccr,r */
00864 { "rd",       F3(2, 0x28, 0)|RS1(3),             F3(~2, ~0x28, ~0)|RS1(~3)|SIMM13(~0),     "o,d", 0, v9 }, /* rd %asi,r */
00865 { "rd",       F3(2, 0x28, 0)|RS1(4),             F3(~2, ~0x28, ~0)|RS1(~4)|SIMM13(~0),     "W,d", 0, v9 }, /* rd %tick,r */
00866 { "rd",       F3(2, 0x28, 0)|RS1(5),             F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0),     "P,d", 0, v9 }, /* rd %pc,r */
00867 { "rd",       F3(2, 0x28, 0)|RS1(6),             F3(~2, ~0x28, ~0)|RS1(~6)|SIMM13(~0),     "s,d", 0, v9 }, /* rd %fprs,r */
00868 
00869 { "rd",       F3(2, 0x28, 0)|RS1(16),            F3(~2, ~0x28, ~0)|RS1(~16)|SIMM13(~0),    "/,d", 0, v9a }, /* rd %pcr,r */
00870 { "rd",       F3(2, 0x28, 0)|RS1(17),            F3(~2, ~0x28, ~0)|RS1(~17)|SIMM13(~0),    "/,d", 0, v9a }, /* rd %pic,r */
00871 { "rd",       F3(2, 0x28, 0)|RS1(18),            F3(~2, ~0x28, ~0)|RS1(~18)|SIMM13(~0),    "/,d", 0, v9a }, /* rd %dcr,r */
00872 { "rd",       F3(2, 0x28, 0)|RS1(19),            F3(~2, ~0x28, ~0)|RS1(~19)|SIMM13(~0),    "/,d", 0, v9a }, /* rd %gsr,r */
00873 { "rd",       F3(2, 0x28, 0)|RS1(22),            F3(~2, ~0x28, ~0)|RS1(~22)|SIMM13(~0),    "/,d", 0, v9a }, /* rd %softint,r */
00874 { "rd",       F3(2, 0x28, 0)|RS1(23),            F3(~2, ~0x28, ~0)|RS1(~23)|SIMM13(~0),    "/,d", 0, v9a }, /* rd %tick_cmpr,r */
00875 { "rd",       F3(2, 0x28, 0)|RS1(24),            F3(~2, ~0x28, ~0)|RS1(~24)|SIMM13(~0),    "/,d", 0, v9b }, /* rd %sys_tick,r */
00876 { "rd",       F3(2, 0x28, 0)|RS1(25),            F3(~2, ~0x28, ~0)|RS1(~25)|SIMM13(~0),    "/,d", 0, v9b }, /* rd %sys_tick_cmpr,r */
00877 
00878 { "rdpr",     F3(2, 0x2a, 0),             F3(~2, ~0x2a, ~0)|SIMM13(~0),      "?,d", 0, v9 },   /* rdpr %priv,r */
00879 { "wrpr",     F3(2, 0x32, 0),             F3(~2, ~0x32, ~0),          "1,2,!", 0, v9 }, /* wrpr r1,r2,%priv */
00880 { "wrpr",     F3(2, 0x32, 0),             F3(~2, ~0x32, ~0)|SIMM13(~0),      "1,!", 0, v9 },   /* wrpr r1,%priv */
00881 { "wrpr",     F3(2, 0x32, 1),             F3(~2, ~0x32, ~1),          "1,i,!", 0, v9 }, /* wrpr r1,i,%priv */
00882 { "wrpr",     F3(2, 0x32, 1),             F3(~2, ~0x32, ~1),          "i,1,!", F_ALIAS, v9 }, /* wrpr i,r1,%priv */
00883 { "wrpr",     F3(2, 0x32, 1),             F3(~2, ~0x32, ~1)|RS1(~0),  "i,!", 0, v9 },   /* wrpr i,%priv */
00884 
00885 { "rdhpr",    F3(2, 0x29, 0),             F3(~2, ~0x29, ~0)|SIMM13(~0),      "$,d", 0, v9 },   /* rdhpr %hpriv,r */
00886 { "wrhpr",    F3(2, 0x33, 0),             F3(~2, ~0x33, ~0),          "1,2,%", 0, v9 }, /* wrhpr r1,r2,%hpriv */
00887 { "wrhpr",    F3(2, 0x33, 0),             F3(~2, ~0x33, ~0)|SIMM13(~0),      "1,%", 0, v9 },   /* wrhpr r1,%hpriv */
00888 { "wrhpr",    F3(2, 0x33, 1),             F3(~2, ~0x33, ~1),          "1,i,%", 0, v9 }, /* wrhpr r1,i,%hpriv */
00889 { "wrhpr",    F3(2, 0x33, 1),             F3(~2, ~0x33, ~1),          "i,1,%", F_ALIAS, v9 }, /* wrhpr i,r1,%hpriv */
00890 { "wrhpr",    F3(2, 0x33, 1),             F3(~2, ~0x33, ~1)|RS1(~0),  "i,%", 0, v9 },   /* wrhpr i,%hpriv */
00891 
00892 /* ??? This group seems wrong.  A three operand move?  */
00893 { "mov",      F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0),              "1,2,m", F_ALIAS, v8 }, /* wr r,r,%asrX */
00894 { "mov",      F3(2, 0x30, 1), F3(~2, ~0x30, ~1),               "1,i,m", F_ALIAS, v8 }, /* wr r,i,%asrX */
00895 { "mov",      F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI(~0), "1,2,y", F_ALIAS, v6 }, /* wr r,r,%y */
00896 { "mov",      F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0,         "1,i,y", F_ALIAS, v6 }, /* wr r,i,%y */
00897 { "mov",      F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI(~0), "1,2,p", F_ALIAS, v6notv9 }, /* wr r,r,%psr */
00898 { "mov",      F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0,         "1,i,p", F_ALIAS, v6notv9 }, /* wr r,i,%psr */
00899 { "mov",      F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI(~0), "1,2,w", F_ALIAS, v6notv9 }, /* wr r,r,%wim */
00900 { "mov",      F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0,         "1,i,w", F_ALIAS, v6notv9 }, /* wr r,i,%wim */
00901 { "mov",      F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI(~0), "1,2,t", F_ALIAS, v6notv9 }, /* wr r,r,%tbr */
00902 { "mov",      F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0,         "1,i,t", F_ALIAS, v6notv9 }, /* wr r,i,%tbr */
00903 
00904 { "mov",      F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0),           "M,d", F_ALIAS, v8 }, /* rd %asr1,r */
00905 { "mov",      F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0|SIMM13(~0),    "y,d", F_ALIAS, v6 }, /* rd %y,r */
00906 { "mov",      F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0|SIMM13(~0),    "p,d", F_ALIAS, v6notv9 }, /* rd %psr,r */
00907 { "mov",      F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0|SIMM13(~0),    "w,d", F_ALIAS, v6notv9 }, /* rd %wim,r */
00908 { "mov",      F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0|SIMM13(~0),    "t,d", F_ALIAS, v6notv9 }, /* rd %tbr,r */
00909 
00910 { "mov",      F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0),          "1,m", F_ALIAS, v8 }, /* wr rs1,%g0,%asrX */
00911 { "mov",      F3(2, 0x30, 1), F3(~2, ~0x30, ~1),               "i,m", F_ALIAS, v8 }, /* wr %g0,i,%asrX */
00912 { "mov",      F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|SIMM13(~0),           "1,m", F_ALIAS, v8 }, /* wr rs1,0,%asrX */
00913 { "mov",      F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI_RS2(~0),    "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */
00914 { "mov",      F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0,         "i,y", F_ALIAS, v6 }, /* wr %g0,i,%y */
00915 { "mov",      F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0|SIMM13(~0),     "1,y", F_ALIAS, v6 }, /* wr rs1,0,%y */
00916 { "mov",      F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI_RS2(~0),    "1,p", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%psr */
00917 { "mov",      F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0,         "i,p", F_ALIAS, v6notv9 }, /* wr %g0,i,%psr */
00918 { "mov",      F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0|SIMM13(~0),     "1,p", F_ALIAS, v6notv9 }, /* wr rs1,0,%psr */
00919 { "mov",      F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI_RS2(~0),    "1,w", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%wim */
00920 { "mov",      F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0,         "i,w", F_ALIAS, v6notv9 }, /* wr %g0,i,%wim */
00921 { "mov",      F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0|SIMM13(~0),     "1,w", F_ALIAS, v6notv9 }, /* wr rs1,0,%wim */
00922 { "mov",      F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI_RS2(~0),    "1,t", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%tbr */
00923 { "mov",      F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0,         "i,t", F_ALIAS, v6notv9 }, /* wr %g0,i,%tbr */
00924 { "mov",      F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0|SIMM13(~0),     "1,t", F_ALIAS, v6notv9 }, /* wr rs1,0,%tbr */
00925 
00926 { "mov",      F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0|ASI(~0),       "2,d", 0, v6 }, /* or %g0,rs2,d */
00927 { "mov",      F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0,        "i,d", 0, v6 }, /* or %g0,i,d      */
00928 { "mov",        F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI_RS2(~0),        "1,d", 0, v6 }, /* or rs1,%g0,d   */
00929 { "mov",        F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|SIMM13(~0),         "1,d", 0, v6 }, /* or rs1,0,d */
00930 
00931 { "or",       F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00932 { "or",       F3(2, 0x02, 1), F3(~2, ~0x02, ~1),        "1,i,d", 0, v6 },
00933 { "or",       F3(2, 0x02, 1), F3(~2, ~0x02, ~1),        "i,1,d", 0, v6 },
00934 
00935 { "bset",     F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0),       "2,r", F_ALIAS, v6 },       /* or rd,rs2,rd */
00936 { "bset",     F3(2, 0x02, 1), F3(~2, ~0x02, ~1),        "i,r", F_ALIAS, v6 },       /* or rd,i,rd */
00937 
00938 /* This is not a commutative instruction.  */
00939 { "andn",     F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00940 { "andn",     F3(2, 0x05, 1), F3(~2, ~0x05, ~1),        "1,i,d", 0, v6 },
00941 
00942 /* This is not a commutative instruction.  */
00943 { "andncc",   F3(2, 0x15, 0), F3(~2, ~0x15, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00944 { "andncc",   F3(2, 0x15, 1), F3(~2, ~0x15, ~1),        "1,i,d", 0, v6 },
00945 
00946 { "bclr",     F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0),       "2,r", F_ALIAS, v6 },       /* andn rd,rs2,rd */
00947 { "bclr",     F3(2, 0x05, 1), F3(~2, ~0x05, ~1),        "i,r", F_ALIAS, v6 },       /* andn rd,i,rd */
00948 
00949 { "cmp",      F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|RD_G0|ASI(~0), "1,2", 0, v6 },      /* subcc rs1,rs2,%g0 */
00950 { "cmp",      F3(2, 0x14, 1), F3(~2, ~0x14, ~1)|RD_G0,         "1,i", 0, v6 },      /* subcc rs1,i,%g0 */
00951 
00952 { "sub",      F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00953 { "sub",      F3(2, 0x04, 1), F3(~2, ~0x04, ~1),        "1,i,d", 0, v6 },
00954 
00955 { "subcc",    F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00956 { "subcc",    F3(2, 0x14, 1), F3(~2, ~0x14, ~1),        "1,i,d", 0, v6 },
00957 
00958 { "subx",     F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0),       "1,2,d", 0, v6notv9 },
00959 { "subx",     F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1),        "1,i,d", 0, v6notv9 },
00960 { "subc",     F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0),       "1,2,d", 0, v9 },
00961 { "subc",     F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1),        "1,i,d", 0, v9 },
00962 
00963 { "subxcc",   F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0),       "1,2,d", 0, v6notv9 },
00964 { "subxcc",   F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1),        "1,i,d", 0, v6notv9 },
00965 { "subccc",   F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0),       "1,2,d", 0, v9 },
00966 { "subccc",   F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1),        "1,i,d", 0, v9 },
00967 
00968 { "and",      F3(2, 0x01, 0), F3(~2, ~0x01, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00969 { "and",      F3(2, 0x01, 1), F3(~2, ~0x01, ~1),        "1,i,d", 0, v6 },
00970 { "and",      F3(2, 0x01, 1), F3(~2, ~0x01, ~1),        "i,1,d", 0, v6 },
00971 
00972 { "andcc",    F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00973 { "andcc",    F3(2, 0x11, 1), F3(~2, ~0x11, ~1),        "1,i,d", 0, v6 },
00974 { "andcc",    F3(2, 0x11, 1), F3(~2, ~0x11, ~1),        "i,1,d", 0, v6 },
00975 
00976 { "dec",      F3(2, 0x04, 1)|SIMM13(0x1), F3(~2, ~0x04, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* sub rd,1,rd */
00977 { "dec",      F3(2, 0x04, 1),                 F3(~2, ~0x04, ~1),                    "i,r", F_ALIAS, v8 },       /* sub rd,imm,rd */
00978 { "deccc",    F3(2, 0x14, 1)|SIMM13(0x1), F3(~2, ~0x14, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* subcc rd,1,rd */
00979 { "deccc",    F3(2, 0x14, 1),                 F3(~2, ~0x14, ~1),                    "i,r", F_ALIAS, v8 },       /* subcc rd,imm,rd */
00980 { "inc",      F3(2, 0x00, 1)|SIMM13(0x1), F3(~2, ~0x00, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* add rd,1,rd */
00981 { "inc",      F3(2, 0x00, 1),                 F3(~2, ~0x00, ~1),                    "i,r", F_ALIAS, v8 },       /* add rd,imm,rd */
00982 { "inccc",    F3(2, 0x10, 1)|SIMM13(0x1), F3(~2, ~0x10, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* addcc rd,1,rd */
00983 { "inccc",    F3(2, 0x10, 1),                 F3(~2, ~0x10, ~1),                    "i,r", F_ALIAS, v8 },       /* addcc rd,imm,rd */
00984 
00985 { "btst",     F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|RD_G0|ASI(~0), "1,2", F_ALIAS, v6 },       /* andcc rs1,rs2,%g0 */
00986 { "btst",     F3(2, 0x11, 1), F3(~2, ~0x11, ~1)|RD_G0, "i,1", F_ALIAS, v6 }, /* andcc rs1,i,%g0 */
00987 
00988 { "neg",      F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0|ASI(~0), "2,d", F_ALIAS, v6 }, /* sub %g0,rs2,rd */
00989 { "neg",      F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0|ASI(~0), "O", F_ALIAS, v6 }, /* sub %g0,rd,rd */
00990 
00991 { "add",      F3(2, 0x00, 0), F3(~2, ~0x00, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00992 { "add",      F3(2, 0x00, 1), F3(~2, ~0x00, ~1),        "1,i,d", 0, v6 },
00993 { "add",      F3(2, 0x00, 1), F3(~2, ~0x00, ~1),        "i,1,d", 0, v6 },
00994 { "addcc",    F3(2, 0x10, 0), F3(~2, ~0x10, ~0)|ASI(~0),       "1,2,d", 0, v6 },
00995 { "addcc",    F3(2, 0x10, 1), F3(~2, ~0x10, ~1),        "1,i,d", 0, v6 },
00996 { "addcc",    F3(2, 0x10, 1), F3(~2, ~0x10, ~1),        "i,1,d", 0, v6 },
00997 
00998 { "addx",     F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0),       "1,2,d", 0, v6notv9 },
00999 { "addx",     F3(2, 0x08, 1), F3(~2, ~0x08, ~1),        "1,i,d", 0, v6notv9 },
01000 { "addx",     F3(2, 0x08, 1), F3(~2, ~0x08, ~1),        "i,1,d", 0, v6notv9 },
01001 { "addc",     F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0),       "1,2,d", 0, v9 },
01002 { "addc",     F3(2, 0x08, 1), F3(~2, ~0x08, ~1),        "1,i,d", 0, v9 },
01003 { "addc",     F3(2, 0x08, 1), F3(~2, ~0x08, ~1),        "i,1,d", 0, v9 },
01004 
01005 { "addxcc",   F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0),       "1,2,d", 0, v6notv9 },
01006 { "addxcc",   F3(2, 0x18, 1), F3(~2, ~0x18, ~1),        "1,i,d", 0, v6notv9 },
01007 { "addxcc",   F3(2, 0x18, 1), F3(~2, ~0x18, ~1),        "i,1,d", 0, v6notv9 },
01008 { "addccc",   F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0),       "1,2,d", 0, v9 },
01009 { "addccc",   F3(2, 0x18, 1), F3(~2, ~0x18, ~1),        "1,i,d", 0, v9 },
01010 { "addccc",   F3(2, 0x18, 1), F3(~2, ~0x18, ~1),        "i,1,d", 0, v9 },
01011 
01012 { "smul",     F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01013 { "smul",     F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1),        "1,i,d", 0, v8 },
01014 { "smul",     F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1),        "i,1,d", 0, v8 },
01015 { "smulcc",   F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01016 { "smulcc",   F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1),        "1,i,d", 0, v8 },
01017 { "smulcc",   F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1),        "i,1,d", 0, v8 },
01018 { "umul",     F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01019 { "umul",     F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1),        "1,i,d", 0, v8 },
01020 { "umul",     F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1),        "i,1,d", 0, v8 },
01021 { "umulcc",   F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01022 { "umulcc",   F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1),        "1,i,d", 0, v8 },
01023 { "umulcc",   F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1),        "i,1,d", 0, v8 },
01024 { "sdiv",     F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01025 { "sdiv",     F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1),        "1,i,d", 0, v8 },
01026 { "sdiv",     F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1),        "i,1,d", 0, v8 },
01027 { "sdivcc",   F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01028 { "sdivcc",   F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1),        "1,i,d", 0, v8 },
01029 { "sdivcc",   F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1),        "i,1,d", 0, v8 },
01030 { "udiv",     F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01031 { "udiv",     F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1),        "1,i,d", 0, v8 },
01032 { "udiv",     F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1),        "i,1,d", 0, v8 },
01033 { "udivcc",   F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0),       "1,2,d", 0, v8 },
01034 { "udivcc",   F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1),        "1,i,d", 0, v8 },
01035 { "udivcc",   F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1),        "i,1,d", 0, v8 },
01036 
01037 { "mulx",     F3(2, 0x09, 0), F3(~2, ~0x09, ~0)|ASI(~0),       "1,2,d", 0, v9 },
01038 { "mulx",     F3(2, 0x09, 1), F3(~2, ~0x09, ~1),        "1,i,d", 0, v9 },
01039 { "sdivx",    F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0),       "1,2,d", 0, v9 },
01040 { "sdivx",    F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1),        "1,i,d", 0, v9 },
01041 { "udivx",    F3(2, 0x0d, 0), F3(~2, ~0x0d, ~0)|ASI(~0),       "1,2,d", 0, v9 },
01042 { "udivx",    F3(2, 0x0d, 1), F3(~2, ~0x0d, ~1),        "1,i,d", 0, v9 },
01043 
01044 { "call",     F1(0x1), F1(~0x1), "L", F_JSR|F_DELAYED, v6 },
01045 { "call",     F1(0x1), F1(~0x1), "L,#", F_JSR|F_DELAYED, v6 },
01046 
01047 { "call",     F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI(~0),    "1+2", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+rs2,%o7 */
01048 { "call",     F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI(~0),    "1+2,#", F_JSR|F_DELAYED, v6 },
01049 { "call",     F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0),       "1", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+%g0,%o7 */
01050 { "call",     F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0),       "1,#", F_JSR|F_DELAYED, v6 },
01051 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),            "1+i", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+i,%o7 */
01052 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),            "1+i,#", F_JSR|F_DELAYED, v6 },
01053 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),            "i+1", F_JSR|F_DELAYED, v6 }, /* jmpl i+rs1,%o7 */
01054 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),            "i+1,#", F_JSR|F_DELAYED, v6 },
01055 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|RS1_G0,     "i", F_JSR|F_DELAYED, v6 }, /* jmpl %g0+i,%o7 */
01056 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|RS1_G0,     "i,#", F_JSR|F_DELAYED, v6 },
01057 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0), "1", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+0,%o7 */
01058 { "call",     F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0), "1,#", F_JSR|F_DELAYED, v6 },
01059 
01060 
01061 /* Conditional instructions.
01062 
01063    Because this part of the table was such a mess earlier, I have
01064    macrofied it so that all the branches and traps are generated from
01065    a single-line description of each condition value.  John Gilmore. */
01066 
01067 /* Define branches -- one annulled, one without, etc. */
01068 #define br(opcode, mask, lose, flags) \
01069  { opcode, (mask)|ANNUL, (lose),       ",a l",   (flags), v6 }, \
01070  { opcode, (mask)      , (lose)|ANNUL, "l",     (flags), v6 }
01071 
01072 #define brx(opcode, mask, lose, flags) /* v9 */ \
01073  { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), "Z,G",      (flags), v9 }, \
01074  { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), ",T Z,G",   (flags), v9 }, \
01075  { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a Z,G",   (flags), v9 }, \
01076  { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a,T Z,G", (flags), v9 }, \
01077  { opcode, (mask)|(2<<20), ANNUL|BPRED|(lose), ",N Z,G",   (flags), v9 }, \
01078  { opcode, (mask)|(2<<20)|ANNUL, BPRED|(lose), ",a,N Z,G", (flags), v9 }, \
01079  { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), "z,G",      (flags), v9 }, \
01080  { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), ",T z,G",   (flags), v9 }, \
01081  { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a z,G",   (flags), v9 }, \
01082  { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a,T z,G", (flags), v9 }, \
01083  { opcode, (mask), ANNUL|BPRED|(lose)|(2<<20), ",N z,G",   (flags), v9 }, \
01084  { opcode, (mask)|ANNUL, BPRED|(lose)|(2<<20), ",a,N z,G", (flags), v9 }
01085 
01086 /* Define four traps: reg+reg, reg + immediate, immediate alone, reg alone. */
01087 #define tr(opcode, mask, lose, flags) \
01088  { opcode, (mask)|(2<<11)|IMMED, (lose)|RS1_G0,  "Z,i",   (flags), v9 }, /* %g0 + imm */ \
01089  { opcode, (mask)|(2<<11)|IMMED, (lose),  "Z,1+i", (flags), v9 }, /* rs1 + imm */ \
01090  { opcode, (mask)|(2<<11), IMMED|(lose),  "Z,1+2", (flags), v9 }, /* rs1 + rs2 */ \
01091  { opcode, (mask)|(2<<11), IMMED|(lose)|RS2_G0,  "Z,1",   (flags), v9 }, /* rs1 + %g0 */ \
01092  { opcode, (mask)|IMMED, (lose)|RS1_G0,   "z,i",   (flags)|F_ALIAS, v9 }, /* %g0 + imm */ \
01093  { opcode, (mask)|IMMED, (lose),   "z,1+i", (flags)|F_ALIAS, v9 }, /* rs1 + imm */ \
01094  { opcode, (mask), IMMED|(lose),   "z,1+2", (flags)|F_ALIAS, v9 }, /* rs1 + rs2 */ \
01095  { opcode, (mask), IMMED|(lose)|RS2_G0,   "z,1",   (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \
01096  { opcode, (mask)|IMMED, (lose)|RS1_G0,          "i",     (flags), v6 }, /* %g0 + imm */ \
01097  { opcode, (mask)|IMMED, (lose),          "1+i",   (flags), v6 }, /* rs1 + imm */ \
01098  { opcode, (mask), IMMED|(lose),          "1+2",   (flags), v6 }, /* rs1 + rs2 */ \
01099  { opcode, (mask), IMMED|(lose)|RS2_G0,          "1",     (flags), v6 } /* rs1 + %g0 */
01100 
01101 /* v9: We must put `brx' before `br', to ensure that we never match something
01102    v9: against an expression unless it is an expression.  Otherwise, we end
01103    v9: up with undefined symbol tables entries, because they get added, but
01104    v9: are not deleted if the pattern fails to match.  */
01105 
01106 /* Define both branches and traps based on condition mask */
01107 #define cond(bop, top, mask, flags) \
01108   brx(bop, F2(0, 1)|(mask), F2(~0, ~1)|((~mask)&COND(~0)), F_DELAYED|(flags)), /* v9 */ \
01109   br(bop,  F2(0, 2)|(mask), F2(~0, ~2)|((~mask)&COND(~0)), F_DELAYED|(flags)), \
01110   tr(top,  F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), ((flags) & ~(F_UNBR|F_CONDBR)))
01111 
01112 /* Define all the conditions, all the branches, all the traps.  */
01113 
01114 /* Standard branch, trap mnemonics */
01115 cond ("b",    "ta",   CONDA, F_UNBR),
01116 /* Alternative form (just for assembly, not for disassembly) */
01117 cond ("ba",   "t",    CONDA, F_UNBR|F_ALIAS),
01118 
01119 cond ("bcc",  "tcc",  CONDCC, F_CONDBR),
01120 cond ("bcs",  "tcs",  CONDCS, F_CONDBR),
01121 cond ("be",   "te",   CONDE, F_CONDBR),
01122 cond ("beq",  "teq",  CONDE, F_CONDBR|F_ALIAS),
01123 cond ("bg",   "tg",   CONDG, F_CONDBR),
01124 cond ("bgt",  "tgt",  CONDG, F_CONDBR|F_ALIAS),
01125 cond ("bge",  "tge",  CONDGE, F_CONDBR),
01126 cond ("bgeu", "tgeu", CONDGEU, F_CONDBR|F_ALIAS), /* for cc */
01127 cond ("bgu",  "tgu",  CONDGU, F_CONDBR),
01128 cond ("bl",   "tl",   CONDL, F_CONDBR),
01129 cond ("blt",  "tlt",  CONDL, F_CONDBR|F_ALIAS),
01130 cond ("ble",  "tle",  CONDLE, F_CONDBR),
01131 cond ("bleu", "tleu", CONDLEU, F_CONDBR),
01132 cond ("blu",  "tlu",  CONDLU, F_CONDBR|F_ALIAS), /* for cs */
01133 cond ("bn",   "tn",   CONDN, F_CONDBR),
01134 cond ("bne",  "tne",  CONDNE, F_CONDBR),
01135 cond ("bneg", "tneg", CONDNEG, F_CONDBR),
01136 cond ("bnz",  "tnz",  CONDNZ, F_CONDBR|F_ALIAS), /* for ne */
01137 cond ("bpos", "tpos", CONDPOS, F_CONDBR),
01138 cond ("bvc",  "tvc",  CONDVC, F_CONDBR),
01139 cond ("bvs",  "tvs",  CONDVS, F_CONDBR),
01140 cond ("bz",   "tz",   CONDZ, F_CONDBR|F_ALIAS), /* for e */
01141 
01142 #undef cond
01143 #undef br
01144 #undef brr /* v9 */
01145 #undef tr
01146 
01147 #define brr(opcode, mask, lose, flags) /* v9 */ \
01148  { opcode, (mask)|BPRED, ANNUL|(lose), "1,k",      F_DELAYED|(flags), v9 }, \
01149  { opcode, (mask)|BPRED, ANNUL|(lose), ",T 1,k",   F_DELAYED|(flags), v9 }, \
01150  { opcode, (mask)|BPRED|ANNUL, (lose), ",a 1,k",   F_DELAYED|(flags), v9 }, \
01151  { opcode, (mask)|BPRED|ANNUL, (lose), ",a,T 1,k", F_DELAYED|(flags), v9 }, \
01152  { opcode, (mask), ANNUL|BPRED|(lose), ",N 1,k",   F_DELAYED|(flags), v9 }, \
01153  { opcode, (mask)|ANNUL, BPRED|(lose), ",a,N 1,k", F_DELAYED|(flags), v9 }
01154 
01155 #define condr(bop, mask, flags) /* v9 */ \
01156   brr(bop, F2(0, 3)|COND(mask), F2(~0, ~3)|COND(~(mask)), (flags)) /* v9 */
01157 
01158 /* v9 */ condr("brnz", 0x5, F_CONDBR),
01159 /* v9 */ condr("brz", 0x1, F_CONDBR),
01160 /* v9 */ condr("brgez", 0x7, F_CONDBR),
01161 /* v9 */ condr("brlz", 0x3, F_CONDBR),
01162 /* v9 */ condr("brlez", 0x2, F_CONDBR),
01163 /* v9 */ condr("brgz", 0x6, F_CONDBR),
01164 
01165 #undef condr /* v9 */
01166 #undef brr /* v9 */
01167 
01168 #define movr(opcode, mask, flags) /* v9 */ \
01169  { opcode, F3(2, 0x2f, 0)|RCOND(mask), F3(~2, ~0x2f, ~0)|RCOND(~(mask)), "1,2,d", (flags), v9 }, \
01170  { opcode, F3(2, 0x2f, 1)|RCOND(mask), F3(~2, ~0x2f, ~1)|RCOND(~(mask)), "1,j,d", (flags), v9 }
01171 
01172 #define fmrrs(opcode, mask, lose, flags) /* v9 */ \
01173  { opcode, (mask), (lose), "1,f,g", (flags) | F_FLOAT, v9 }
01174 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
01175  { opcode, (mask), (lose), "1,B,H", (flags) | F_FLOAT, v9 }
01176 #define fmrrq(opcode, mask, lose, flags) /* v9 */ \
01177  { opcode, (mask), (lose), "1,R,J", (flags) | F_FLOAT, v9 }
01178 
01179 #define fmovrs(mop, mask, flags) /* v9 */ \
01180   fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|RCOND(~(mask)), (flags)) /* v9 */
01181 #define fmovrd(mop, mask, flags) /* v9 */ \
01182   fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
01183 #define fmovrq(mop, mask, flags) /* v9 */ \
01184   fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|RCOND(~(mask)), (flags)) /* v9 */
01185 
01186 /* v9 */ movr("movrne", 0x5, 0),
01187 /* v9 */ movr("movre", 0x1, 0),
01188 /* v9 */ movr("movrgez", 0x7, 0),
01189 /* v9 */ movr("movrlz", 0x3, 0),
01190 /* v9 */ movr("movrlez", 0x2, 0),
01191 /* v9 */ movr("movrgz", 0x6, 0),
01192 /* v9 */ movr("movrnz", 0x5, F_ALIAS),
01193 /* v9 */ movr("movrz", 0x1, F_ALIAS),
01194 
01195 /* v9 */ fmovrs("fmovrsne", 0x5, 0),
01196 /* v9 */ fmovrs("fmovrse", 0x1, 0),
01197 /* v9 */ fmovrs("fmovrsgez", 0x7, 0),
01198 /* v9 */ fmovrs("fmovrslz", 0x3, 0),
01199 /* v9 */ fmovrs("fmovrslez", 0x2, 0),
01200 /* v9 */ fmovrs("fmovrsgz", 0x6, 0),
01201 /* v9 */ fmovrs("fmovrsnz", 0x5, F_ALIAS),
01202 /* v9 */ fmovrs("fmovrsz", 0x1, F_ALIAS),
01203 
01204 /* v9 */ fmovrd("fmovrdne", 0x5, 0),
01205 /* v9 */ fmovrd("fmovrde", 0x1, 0),
01206 /* v9 */ fmovrd("fmovrdgez", 0x7, 0),
01207 /* v9 */ fmovrd("fmovrdlz", 0x3, 0),
01208 /* v9 */ fmovrd("fmovrdlez", 0x2, 0),
01209 /* v9 */ fmovrd("fmovrdgz", 0x6, 0),
01210 /* v9 */ fmovrd("fmovrdnz", 0x5, F_ALIAS),
01211 /* v9 */ fmovrd("fmovrdz", 0x1, F_ALIAS),
01212 
01213 /* v9 */ fmovrq("fmovrqne", 0x5, 0),
01214 /* v9 */ fmovrq("fmovrqe", 0x1, 0),
01215 /* v9 */ fmovrq("fmovrqgez", 0x7, 0),
01216 /* v9 */ fmovrq("fmovrqlz", 0x3, 0),
01217 /* v9 */ fmovrq("fmovrqlez", 0x2, 0),
01218 /* v9 */ fmovrq("fmovrqgz", 0x6, 0),
01219 /* v9 */ fmovrq("fmovrqnz", 0x5, F_ALIAS),
01220 /* v9 */ fmovrq("fmovrqz", 0x1, F_ALIAS),
01221 
01222 #undef movr /* v9 */
01223 #undef fmovr /* v9 */
01224 #undef fmrr /* v9 */
01225 
01226 #define movicc(opcode, cond, flags) /* v9 */ \
01227   { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|XCC|(1<<11), "z,2,d", flags, v9 }, \
01228   { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|XCC|(1<<11), "z,I,d", flags, v9 }, \
01229   { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|(1<<11),     "Z,2,d", flags, v9 }, \
01230   { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|(1<<11),     "Z,I,d", flags, v9 }
01231 
01232 #define movfcc(opcode, fcond, flags) /* v9 */ \
01233   { opcode, F3(2, 0x2c, 0)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", flags, v9 }, \
01234   { opcode, F3(2, 0x2c, 1)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", flags, v9 }, \
01235   { opcode, F3(2, 0x2c, 0)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", flags, v9 }, \
01236   { opcode, F3(2, 0x2c, 1)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", flags, v9 }, \
01237   { opcode, F3(2, 0x2c, 0)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", flags, v9 }, \
01238   { opcode, F3(2, 0x2c, 1)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", flags, v9 }, \
01239   { opcode, F3(2, 0x2c, 0)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", flags, v9 }, \
01240   { opcode, F3(2, 0x2c, 1)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", flags, v9 }
01241 
01242 #define movcc(opcode, cond, fcond, flags) /* v9 */ \
01243   movfcc (opcode, fcond, flags), /* v9 */ \
01244   movicc (opcode, cond, flags) /* v9 */
01245 
01246 /* v9 */ movcc  ("mova",    CONDA, FCONDA, 0),
01247 /* v9 */ movicc ("movcc",   CONDCC, 0),
01248 /* v9 */ movicc ("movgeu",  CONDGEU, F_ALIAS),
01249 /* v9 */ movicc ("movcs",   CONDCS, 0),
01250 /* v9 */ movicc ("movlu",   CONDLU, F_ALIAS),
01251 /* v9 */ movcc  ("move",    CONDE, FCONDE, 0),
01252 /* v9 */ movcc  ("movg",    CONDG, FCONDG, 0),
01253 /* v9 */ movcc  ("movge",   CONDGE, FCONDGE, 0),
01254 /* v9 */ movicc ("movgu",   CONDGU, 0),
01255 /* v9 */ movcc  ("movl",    CONDL, FCONDL, 0),
01256 /* v9 */ movcc  ("movle",   CONDLE, FCONDLE, 0),
01257 /* v9 */ movicc ("movleu",  CONDLEU, 0),
01258 /* v9 */ movfcc ("movlg",   FCONDLG, 0),
01259 /* v9 */ movcc  ("movn",    CONDN, FCONDN, 0),
01260 /* v9 */ movcc  ("movne",   CONDNE, FCONDNE, 0),
01261 /* v9 */ movicc ("movneg",  CONDNEG, 0),
01262 /* v9 */ movcc  ("movnz",   CONDNZ, FCONDNZ, F_ALIAS),
01263 /* v9 */ movfcc ("movo",    FCONDO, 0),
01264 /* v9 */ movicc ("movpos",  CONDPOS, 0),
01265 /* v9 */ movfcc ("movu",    FCONDU, 0),
01266 /* v9 */ movfcc ("movue",   FCONDUE, 0),
01267 /* v9 */ movfcc ("movug",   FCONDUG, 0),
01268 /* v9 */ movfcc ("movuge",  FCONDUGE, 0),
01269 /* v9 */ movfcc ("movul",   FCONDUL, 0),
01270 /* v9 */ movfcc ("movule",  FCONDULE, 0),
01271 /* v9 */ movicc ("movvc",   CONDVC, 0),
01272 /* v9 */ movicc ("movvs",   CONDVS, 0),
01273 /* v9 */ movcc  ("movz",    CONDZ, FCONDZ, F_ALIAS),
01274 
01275 #undef movicc /* v9 */
01276 #undef movfcc /* v9 */
01277 #undef movcc /* v9 */
01278 
01279 #define FM_SF 1             /* v9 - values for fpsize */
01280 #define FM_DF 2             /* v9 */
01281 #define FM_QF 3             /* v9 */
01282 
01283 #define fmoviccx(opcode, fpsize, args, cond, flags) /* v9 */ \
01284 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0),  "z," args, flags, v9 }, \
01285 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0),  "Z," args, flags, v9 }
01286 
01287 #define fmovfccx(opcode, fpsize, args, fcond, flags) /* v9 */ \
01288 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags, v9 }, \
01289 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags, v9 }, \
01290 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags, v9 }, \
01291 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags, v9 }
01292 
01293 /* FIXME: use fmovicc/fmovfcc? */ /* v9 */
01294 #define fmovccx(opcode, fpsize, args, cond, fcond, flags) /* v9 */ \
01295 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0),  "z," args, flags | F_FLOAT, v9 }, \
01296 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags | F_FLOAT, v9 }, \
01297 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0),  "Z," args, flags | F_FLOAT, v9 }, \
01298 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags | F_FLOAT, v9 }, \
01299 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags | F_FLOAT, v9 }, \
01300 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags | F_FLOAT, v9 }
01301 
01302 #define fmovicc(suffix, cond, flags) /* v9 */ \
01303 fmoviccx("fmovd" suffix, FM_DF, "B,H", cond, flags),           \
01304 fmoviccx("fmovq" suffix, FM_QF, "R,J", cond, flags),           \
01305 fmoviccx("fmovs" suffix, FM_SF, "f,g", cond, flags)
01306 
01307 #define fmovfcc(suffix, fcond, flags) /* v9 */ \
01308 fmovfccx("fmovd" suffix, FM_DF, "B,H", fcond, flags),          \
01309 fmovfccx("fmovq" suffix, FM_QF, "R,J", fcond, flags),          \
01310 fmovfccx("fmovs" suffix, FM_SF, "f,g", fcond, flags)
01311 
01312 #define fmovcc(suffix, cond, fcond, flags) /* v9 */ \
01313 fmovccx("fmovd" suffix, FM_DF, "B,H", cond, fcond, flags),     \
01314 fmovccx("fmovq" suffix, FM_QF, "R,J", cond, fcond, flags),     \
01315 fmovccx("fmovs" suffix, FM_SF, "f,g", cond, fcond, flags)
01316 
01317 /* v9 */ fmovcc  ("a", CONDA, FCONDA, 0),
01318 /* v9 */ fmovicc ("cc", CONDCC, 0),
01319 /* v9 */ fmovicc ("cs", CONDCS, 0),
01320 /* v9 */ fmovcc  ("e", CONDE, FCONDE, 0),
01321 /* v9 */ fmovcc  ("g", CONDG, FCONDG, 0),
01322 /* v9 */ fmovcc  ("ge", CONDGE, FCONDGE, 0),
01323 /* v9 */ fmovicc ("geu", CONDGEU, F_ALIAS),
01324 /* v9 */ fmovicc ("gu", CONDGU, 0),
01325 /* v9 */ fmovcc  ("l", CONDL, FCONDL, 0),
01326 /* v9 */ fmovcc  ("le", CONDLE, FCONDLE, 0),
01327 /* v9 */ fmovicc ("leu", CONDLEU, 0),
01328 /* v9 */ fmovfcc ("lg", FCONDLG, 0),
01329 /* v9 */ fmovicc ("lu", CONDLU, F_ALIAS),
01330 /* v9 */ fmovcc  ("n", CONDN, FCONDN, 0),
01331 /* v9 */ fmovcc  ("ne", CONDNE, FCONDNE, 0),
01332 /* v9 */ fmovicc ("neg", CONDNEG, 0),
01333 /* v9 */ fmovcc  ("nz", CONDNZ, FCONDNZ, F_ALIAS),
01334 /* v9 */ fmovfcc ("o", FCONDO, 0),
01335 /* v9 */ fmovicc ("pos", CONDPOS, 0),
01336 /* v9 */ fmovfcc ("u", FCONDU, 0),
01337 /* v9 */ fmovfcc ("ue", FCONDUE, 0),
01338 /* v9 */ fmovfcc ("ug", FCONDUG, 0),
01339 /* v9 */ fmovfcc ("uge", FCONDUGE, 0),
01340 /* v9 */ fmovfcc ("ul", FCONDUL, 0),
01341 /* v9 */ fmovfcc ("ule", FCONDULE, 0),
01342 /* v9 */ fmovicc ("vc", CONDVC, 0),
01343 /* v9 */ fmovicc ("vs", CONDVS, 0),
01344 /* v9 */ fmovcc  ("z", CONDZ, FCONDZ, F_ALIAS),
01345 
01346 #undef fmoviccx /* v9 */
01347 #undef fmovfccx /* v9 */
01348 #undef fmovccx /* v9 */
01349 #undef fmovicc /* v9 */
01350 #undef fmovfcc /* v9 */
01351 #undef fmovcc /* v9 */
01352 #undef FM_DF /* v9 */
01353 #undef FM_QF /* v9 */
01354 #undef FM_SF /* v9 */
01355 
01356 /* Coprocessor branches.  */
01357 #define CBR(opcode, mask, lose, flags, arch) \
01358  { opcode, (mask), ANNUL | (lose), "l",    flags | F_DELAYED, arch }, \
01359  { opcode, (mask) | ANNUL, (lose), ",a l", flags | F_DELAYED, arch }
01360 
01361 /* Floating point branches.  */
01362 #define FBR(opcode, mask, lose, flags) \
01363  { opcode, (mask), ANNUL | (lose), "l",    flags | F_DELAYED | F_FBR, v6 }, \
01364  { opcode, (mask) | ANNUL, (lose), ",a l", flags | F_DELAYED | F_FBR, v6 }
01365 
01366 /* V9 extended floating point branches.  */
01367 #define FBRX(opcode, mask, lose, flags) /* v9 */ \
01368  { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), "6,G",      flags|F_DELAYED|F_FBR, v9 }, \
01369  { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G",   flags|F_DELAYED|F_FBR, v9 }, \
01370  { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a 6,G",   flags|F_DELAYED|F_FBR, v9 }, \
01371  { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a,T 6,G", flags|F_DELAYED|F_FBR, v9 }, \
01372  { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), ",N 6,G",   flags|F_DELAYED|F_FBR, v9 }, \
01373  { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a,N 6,G", flags|F_DELAYED|F_FBR, v9 }, \
01374  { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), "7,G",      flags|F_DELAYED|F_FBR, v9 }, \
01375  { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), ",T 7,G",   flags|F_DELAYED|F_FBR, v9 }, \
01376  { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a 7,G",   flags|F_DELAYED|F_FBR, v9 }, \
01377  { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a,T 7,G", flags|F_DELAYED|F_FBR, v9 }, \
01378  { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), ",N 7,G",   flags|F_DELAYED|F_FBR, v9 }, \
01379  { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a,N 7,G", flags|F_DELAYED|F_FBR, v9 }, \
01380  { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), "8,G",      flags|F_DELAYED|F_FBR, v9 }, \
01381  { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), ",T 8,G",   flags|F_DELAYED|F_FBR, v9 }, \
01382  { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a 8,G",   flags|F_DELAYED|F_FBR, v9 }, \
01383  { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a,T 8,G", flags|F_DELAYED|F_FBR, v9 }, \
01384  { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), ",N 8,G",   flags|F_DELAYED|F_FBR, v9 }, \
01385  { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a,N 8,G", flags|F_DELAYED|F_FBR, v9 }, \
01386  { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), "9,G",      flags|F_DELAYED|F_FBR, v9 }, \
01387  { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), ",T 9,G",   flags|F_DELAYED|F_FBR, v9 }, \
01388  { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a 9,G",   flags|F_DELAYED|F_FBR, v9 }, \
01389  { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a,T 9,G", flags|F_DELAYED|F_FBR, v9 }, \
01390  { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G",   flags|F_DELAYED|F_FBR, v9 }, \
01391  { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED|F_FBR, v9 }
01392 
01393 /* v9: We must put `FBRX' before `FBR', to ensure that we never match
01394    v9: something against an expression unless it is an expression.  Otherwise,
01395    v9: we end up with undefined symbol tables entries, because they get added,
01396    v9: but are not deleted if the pattern fails to match.  */
01397 
01398 #define CONDFC(fop, cop, mask, flags) \
01399   FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
01400   FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
01401   CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6notlet)
01402 
01403 #define CONDFCL(fop, cop, mask, flags) \
01404   FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
01405   FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
01406   CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6)
01407 
01408 #define CONDF(fop, mask, flags) \
01409   FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
01410   FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
01411 
01412 CONDFC  ("fb",    "cb",    0x8, F_UNBR),
01413 CONDFCL ("fba",        "cba",   0x8, F_UNBR|F_ALIAS),
01414 CONDFC  ("fbe",        "cb0",   0x9, F_CONDBR),
01415 CONDF   ("fbz",            0x9, F_CONDBR|F_ALIAS),
01416 CONDFC  ("fbg",        "cb2",   0x6, F_CONDBR),
01417 CONDFC  ("fbge",  "cb02",  0xb, F_CONDBR),
01418 CONDFC  ("fbl",        "cb1",   0x4, F_CONDBR),
01419 CONDFC  ("fble",  "cb01",  0xd, F_CONDBR),
01420 CONDFC  ("fblg",  "cb12",  0x2, F_CONDBR),
01421 CONDFCL ("fbn",        "cbn",   0x0, F_UNBR),
01422 CONDFC  ("fbne",  "cb123", 0x1, F_CONDBR),
01423 CONDF   ("fbnz",           0x1, F_CONDBR|F_ALIAS),
01424 CONDFC  ("fbo",        "cb012", 0xf, F_CONDBR),
01425 CONDFC  ("fbu",        "cb3",   0x7, F_CONDBR),
01426 CONDFC  ("fbue",  "cb03",  0xa, F_CONDBR),
01427 CONDFC  ("fbug",  "cb23",  0x5, F_CONDBR),
01428 CONDFC  ("fbuge", "cb023", 0xc, F_CONDBR),
01429 CONDFC  ("fbul",  "cb13",  0x3, F_CONDBR),
01430 CONDFC  ("fbule", "cb013", 0xe, F_CONDBR),
01431 
01432 #undef CONDFC
01433 #undef CONDFCL
01434 #undef CONDF
01435 #undef CBR
01436 #undef FBR
01437 #undef FBRX   /* v9 */
01438 
01439 { "jmp",      F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+rs2,%g0 */
01440 { "jmp",      F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI_RS2(~0),    "1", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+%g0,%g0 */
01441 { "jmp",      F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0,         "1+i", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+i,%g0 */
01442 { "jmp",      F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0,         "i+1", F_UNBR|F_DELAYED, v6 }, /* jmpl i+rs1,%g0 */
01443 { "jmp",      F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0|RS1_G0,         "i", F_UNBR|F_DELAYED, v6 }, /* jmpl %g0+i,%g0 */
01444 { "jmp",      F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0|SIMM13(~0),     "1", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+0,%g0 */
01445 
01446 { "nop",      F2(0, 4), 0xfeffffff, "", 0, v6 }, /* sethi 0, %g0 */
01447 
01448 { "set",      F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,d", F_ALIAS, v6 },
01449 { "setuw",    F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,d", F_ALIAS, v9 },
01450 { "setsw",    F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,d", F_ALIAS, v9 },
01451 { "setx",     F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,1,d", F_ALIAS, v9 },
01452 
01453 { "sethi",    F2(0x0, 0x4), F2(~0x0, ~0x4), "h,d", 0, v6 },
01454 
01455 { "taddcc",   F3(2, 0x20, 0), F3(~2, ~0x20, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01456 { "taddcc",   F3(2, 0x20, 1), F3(~2, ~0x20, ~1),        "1,i,d", 0, v6 },
01457 { "taddcc",   F3(2, 0x20, 1), F3(~2, ~0x20, ~1),        "i,1,d", 0, v6 },
01458 { "taddcctv", F3(2, 0x22, 0), F3(~2, ~0x22, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01459 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1),        "1,i,d", 0, v6 },
01460 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1),        "i,1,d", 0, v6 },
01461 
01462 { "tsubcc",   F3(2, 0x21, 0), F3(~2, ~0x21, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01463 { "tsubcc",   F3(2, 0x21, 1), F3(~2, ~0x21, ~1),        "1,i,d", 0, v6 },
01464 { "tsubcctv", F3(2, 0x23, 0), F3(~2, ~0x23, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01465 { "tsubcctv", F3(2, 0x23, 1), F3(~2, ~0x23, ~1),        "1,i,d", 0, v6 },
01466 
01467 { "unimp",    F2(0x0, 0x0), 0xffc00000, "n", 0, v6notv9 },
01468 { "illtrap",  F2(0, 0), F2(~0, ~0)|RD_G0, "n", 0, v9 },
01469 
01470 /* This *is* a commutative instruction.  */
01471 { "xnor",     F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01472 { "xnor",     F3(2, 0x07, 1), F3(~2, ~0x07, ~1),        "1,i,d", 0, v6 },
01473 { "xnor",     F3(2, 0x07, 1), F3(~2, ~0x07, ~1),        "i,1,d", 0, v6 },
01474 /* This *is* a commutative instruction.  */
01475 { "xnorcc",   F3(2, 0x17, 0), F3(~2, ~0x17, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01476 { "xnorcc",   F3(2, 0x17, 1), F3(~2, ~0x17, ~1),        "1,i,d", 0, v6 },
01477 { "xnorcc",   F3(2, 0x17, 1), F3(~2, ~0x17, ~1),        "i,1,d", 0, v6 },
01478 { "xor",      F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01479 { "xor",      F3(2, 0x03, 1), F3(~2, ~0x03, ~1),        "1,i,d", 0, v6 },
01480 { "xor",      F3(2, 0x03, 1), F3(~2, ~0x03, ~1),        "i,1,d", 0, v6 },
01481 { "xorcc",    F3(2, 0x13, 0), F3(~2, ~0x13, ~0)|ASI(~0),       "1,2,d", 0, v6 },
01482 { "xorcc",    F3(2, 0x13, 1), F3(~2, ~0x13, ~1),        "1,i,d", 0, v6 },
01483 { "xorcc",    F3(2, 0x13, 1), F3(~2, ~0x13, ~1),        "i,1,d", 0, v6 },
01484 
01485 { "not",      F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,d", F_ALIAS, v6 }, /* xnor rs1,%0,rd */
01486 { "not",      F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "r", F_ALIAS, v6 }, /* xnor rd,%0,rd */
01487 
01488 { "btog",     F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0),       "2,r", F_ALIAS, v6 }, /* xor rd,rs2,rd */
01489 { "btog",     F3(2, 0x03, 1), F3(~2, ~0x03, ~1),        "i,r", F_ALIAS, v6 }, /* xor rd,i,rd */
01490 
01491 /* FPop1 and FPop2 are not instructions.  Don't accept them.  */
01492 
01493 { "fdtoi",    F3F(2, 0x34, 0x0d2), F3F(~2, ~0x34, ~0x0d2)|RS1_G0, "B,g", F_FLOAT, v6 },
01494 { "fstoi",    F3F(2, 0x34, 0x0d1), F3F(~2, ~0x34, ~0x0d1)|RS1_G0, "f,g", F_FLOAT, v6 },
01495 { "fqtoi",    F3F(2, 0x34, 0x0d3), F3F(~2, ~0x34, ~0x0d3)|RS1_G0, "R,g", F_FLOAT, v8 },
01496 
01497 { "fdtox",    F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0, "B,H", F_FLOAT, v9 },
01498 { "fstox",    F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0, "f,H", F_FLOAT, v9 },
01499 { "fqtox",    F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0, "R,H", F_FLOAT, v9 },
01500 
01501 { "fitod",    F3F(2, 0x34, 0x0c8), F3F(~2, ~0x34, ~0x0c8)|RS1_G0, "f,H", F_FLOAT, v6 },
01502 { "fitos",    F3F(2, 0x34, 0x0c4), F3F(~2, ~0x34, ~0x0c4)|RS1_G0, "f,g", F_FLOAT, v6 },
01503 { "fitoq",    F3F(2, 0x34, 0x0cc), F3F(~2, ~0x34, ~0x0cc)|RS1_G0, "f,J", F_FLOAT, v8 },
01504 
01505 { "fxtod",    F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0, "B,H", F_FLOAT, v9 },
01506 { "fxtos",    F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0, "B,g", F_FLOAT, v9 },
01507 { "fxtoq",    F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0, "B,J", F_FLOAT, v9 },
01508 
01509 { "fdtoq",    F3F(2, 0x34, 0x0ce), F3F(~2, ~0x34, ~0x0ce)|RS1_G0, "B,J", F_FLOAT, v8 },
01510 { "fdtos",    F3F(2, 0x34, 0x0c6), F3F(~2, ~0x34, ~0x0c6)|RS1_G0, "B,g", F_FLOAT, v6 },
01511 { "fqtod",    F3F(2, 0x34, 0x0cb), F3F(~2, ~0x34, ~0x0cb)|RS1_G0, "R,H", F_FLOAT, v8 },
01512 { "fqtos",    F3F(2, 0x34, 0x0c7), F3F(~2, ~0x34, ~0x0c7)|RS1_G0, "R,g", F_FLOAT, v8 },
01513 { "fstod",    F3F(2, 0x34, 0x0c9), F3F(~2, ~0x34, ~0x0c9)|RS1_G0, "f,H", F_FLOAT, v6 },
01514 { "fstoq",    F3F(2, 0x34, 0x0cd), F3F(~2, ~0x34, ~0x0cd)|RS1_G0, "f,J", F_FLOAT, v8 },
01515 
01516 { "fdivd",    F3F(2, 0x34, 0x04e), F3F(~2, ~0x34, ~0x04e), "v,B,H", F_FLOAT, v6 },
01517 { "fdivq",    F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", F_FLOAT, v8 },
01518 { "fdivx",    F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01519 { "fdivs",    F3F(2, 0x34, 0x04d), F3F(~2, ~0x34, ~0x04d), "e,f,g", F_FLOAT, v6 },
01520 { "fmuld",    F3F(2, 0x34, 0x04a), F3F(~2, ~0x34, ~0x04a), "v,B,H", F_FLOAT, v6 },
01521 { "fmulq",    F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", F_FLOAT, v8 },
01522 { "fmulx",    F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01523 { "fmuls",    F3F(2, 0x34, 0x049), F3F(~2, ~0x34, ~0x049), "e,f,g", F_FLOAT, v6 },
01524 
01525 { "fdmulq",   F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", F_FLOAT, v8 },
01526 { "fdmulx",   F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", F_FLOAT|F_ALIAS, v8 },
01527 { "fsmuld",   F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", F_FLOAT, v8 },
01528 
01529 { "fsqrtd",   F3F(2, 0x34, 0x02a), F3F(~2, ~0x34, ~0x02a)|RS1_G0, "B,H", F_FLOAT, v7 },
01530 { "fsqrtq",   F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0, "R,J", F_FLOAT, v8 },
01531 { "fsqrtx",   F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v8 },
01532 { "fsqrts",   F3F(2, 0x34, 0x029), F3F(~2, ~0x34, ~0x029)|RS1_G0, "f,g", F_FLOAT, v7 },
01533 
01534 { "fabsd",    F3F(2, 0x34, 0x00a), F3F(~2, ~0x34, ~0x00a)|RS1_G0, "B,H", F_FLOAT, v9 },
01535 { "fabsq",    F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0, "R,J", F_FLOAT, v9 },
01536 { "fabsx",    F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v9 },
01537 { "fabss",    F3F(2, 0x34, 0x009), F3F(~2, ~0x34, ~0x009)|RS1_G0, "f,g", F_FLOAT, v6 },
01538 { "fmovd",    F3F(2, 0x34, 0x002), F3F(~2, ~0x34, ~0x002)|RS1_G0, "B,H", F_FLOAT, v9 },
01539 { "fmovq",    F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0, "R,J", F_FLOAT, v9 },
01540 { "fmovx",    F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v9 },
01541 { "fmovs",    F3F(2, 0x34, 0x001), F3F(~2, ~0x34, ~0x001)|RS1_G0, "f,g", F_FLOAT, v6 },
01542 { "fnegd",    F3F(2, 0x34, 0x006), F3F(~2, ~0x34, ~0x006)|RS1_G0, "B,H", F_FLOAT, v9 },
01543 { "fnegq",    F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0, "R,J", F_FLOAT, v9 },
01544 { "fnegx",    F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v9 },
01545 { "fnegs",    F3F(2, 0x34, 0x005), F3F(~2, ~0x34, ~0x005)|RS1_G0, "f,g", F_FLOAT, v6 },
01546 
01547 { "faddd",    F3F(2, 0x34, 0x042), F3F(~2, ~0x34, ~0x042), "v,B,H", F_FLOAT, v6 },
01548 { "faddq",    F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", F_FLOAT, v8 },
01549 { "faddx",    F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01550 { "fadds",    F3F(2, 0x34, 0x041), F3F(~2, ~0x34, ~0x041), "e,f,g", F_FLOAT, v6 },
01551 { "fsubd",    F3F(2, 0x34, 0x046), F3F(~2, ~0x34, ~0x046), "v,B,H", F_FLOAT, v6 },
01552 { "fsubq",    F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", F_FLOAT, v8 },
01553 { "fsubx",    F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01554 { "fsubs",    F3F(2, 0x34, 0x045), F3F(~2, ~0x34, ~0x045), "e,f,g", F_FLOAT, v6 },
01555 
01556 #define CMPFCC(x)    (((x)&0x3)<<25)
01557 
01558 { "fcmpd",              F3F(2, 0x35, 0x052),            F3F(~2, ~0x35, ~0x052)|RD_G0,  "v,B",   F_FLOAT, v6 },
01559 { "fcmpd",    CMPFCC(0)|F3F(2, 0x35, 0x052), CMPFCC(~0)|F3F(~2, ~0x35, ~0x052),      "6,v,B", F_FLOAT, v9 },
01560 { "fcmpd",    CMPFCC(1)|F3F(2, 0x35, 0x052), CMPFCC(~1)|F3F(~2, ~0x35, ~0x052),      "7,v,B", F_FLOAT, v9 },
01561 { "fcmpd",    CMPFCC(2)|F3F(2, 0x35, 0x052), CMPFCC(~2)|F3F(~2, ~0x35, ~0x052),      "8,v,B", F_FLOAT, v9 },
01562 { "fcmpd",    CMPFCC(3)|F3F(2, 0x35, 0x052), CMPFCC(~3)|F3F(~2, ~0x35, ~0x052),      "9,v,B", F_FLOAT, v9 },
01563 { "fcmped",             F3F(2, 0x35, 0x056),            F3F(~2, ~0x35, ~0x056)|RD_G0,  "v,B",   F_FLOAT, v6 },
01564 { "fcmped",   CMPFCC(0)|F3F(2, 0x35, 0x056), CMPFCC(~0)|F3F(~2, ~0x35, ~0x056),      "6,v,B", F_FLOAT, v9 },
01565 { "fcmped",   CMPFCC(1)|F3F(2, 0x35, 0x056), CMPFCC(~1)|F3F(~2, ~0x35, ~0x056),      "7,v,B", F_FLOAT, v9 },
01566 { "fcmped",   CMPFCC(2)|F3F(2, 0x35, 0x056), CMPFCC(~2)|F3F(~2, ~0x35, ~0x056),      "8,v,B", F_FLOAT, v9 },
01567 { "fcmped",   CMPFCC(3)|F3F(2, 0x35, 0x056), CMPFCC(~3)|F3F(~2, ~0x35, ~0x056),      "9,v,B", F_FLOAT, v9 },
01568 { "fcmpq",              F3F(2, 0x35, 0x053),            F3F(~2, ~0x35, ~0x053)|RD_G0,       "V,R", F_FLOAT, v8 },
01569 { "fcmpq",    CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053),      "6,V,R", F_FLOAT, v9 },
01570 { "fcmpq",    CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053),      "7,V,R", F_FLOAT, v9 },
01571 { "fcmpq",    CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053),      "8,V,R", F_FLOAT, v9 },
01572 { "fcmpq",    CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053),      "9,V,R", F_FLOAT, v9 },
01573 { "fcmpeq",             F3F(2, 0x35, 0x057),            F3F(~2, ~0x35, ~0x057)|RD_G0,       "V,R", F_FLOAT, v8 },
01574 { "fcmpeq",   CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057),      "6,V,R", F_FLOAT, v9 },
01575 { "fcmpeq",   CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057),      "7,V,R", F_FLOAT, v9 },
01576 { "fcmpeq",   CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057),      "8,V,R", F_FLOAT, v9 },
01577 { "fcmpeq",   CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057),      "9,V,R", F_FLOAT, v9 },
01578 { "fcmpx",              F3F(2, 0x35, 0x053),            F3F(~2, ~0x35, ~0x053)|RD_G0,       "V,R", F_FLOAT|F_ALIAS, v8 },
01579 { "fcmpx",    CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053),      "6,V,R", F_FLOAT|F_ALIAS, v9 },
01580 { "fcmpx",    CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053),      "7,V,R", F_FLOAT|F_ALIAS, v9 },
01581 { "fcmpx",    CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053),      "8,V,R", F_FLOAT|F_ALIAS, v9 },
01582 { "fcmpx",    CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053),      "9,V,R", F_FLOAT|F_ALIAS, v9 },
01583 { "fcmpex",             F3F(2, 0x35, 0x057),            F3F(~2, ~0x35, ~0x057)|RD_G0,       "V,R", F_FLOAT|F_ALIAS, v8 },
01584 { "fcmpex",   CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057),      "6,V,R", F_FLOAT|F_ALIAS, v9 },
01585 { "fcmpex",   CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057),      "7,V,R", F_FLOAT|F_ALIAS, v9 },
01586 { "fcmpex",   CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057),      "8,V,R", F_FLOAT|F_ALIAS, v9 },
01587 { "fcmpex",   CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057),      "9,V,R", F_FLOAT|F_ALIAS, v9 },
01588 { "fcmps",              F3F(2, 0x35, 0x051),            F3F(~2, ~0x35, ~0x051)|RD_G0, "e,f",   F_FLOAT, v6 },
01589 { "fcmps",    CMPFCC(0)|F3F(2, 0x35, 0x051), CMPFCC(~0)|F3F(~2, ~0x35, ~0x051),      "6,e,f", F_FLOAT, v9 },
01590 { "fcmps",    CMPFCC(1)|F3F(2, 0x35, 0x051), CMPFCC(~1)|F3F(~2, ~0x35, ~0x051),      "7,e,f", F_FLOAT, v9 },
01591 { "fcmps",    CMPFCC(2)|F3F(2, 0x35, 0x051), CMPFCC(~2)|F3F(~2, ~0x35, ~0x051),      "8,e,f", F_FLOAT, v9 },
01592 { "fcmps",    CMPFCC(3)|F3F(2, 0x35, 0x051), CMPFCC(~3)|F3F(~2, ~0x35, ~0x051),      "9,e,f", F_FLOAT, v9 },
01593 { "fcmpes",             F3F(2, 0x35, 0x055),            F3F(~2, ~0x35, ~0x055)|RD_G0, "e,f",   F_FLOAT, v6 },
01594 { "fcmpes",   CMPFCC(0)|F3F(2, 0x35, 0x055), CMPFCC(~0)|F3F(~2, ~0x35, ~0x055),      "6,e,f", F_FLOAT, v9 },
01595 { "fcmpes",   CMPFCC(1)|F3F(2, 0x35, 0x055), CMPFCC(~1)|F3F(~2, ~0x35, ~0x055),      "7,e,f", F_FLOAT, v9 },
01596 { "fcmpes",   CMPFCC(2)|F3F(2, 0x35, 0x055), CMPFCC(~2)|F3F(~2, ~0x35, ~0x055),      "8,e,f", F_FLOAT, v9 },
01597 { "fcmpes",   CMPFCC(3)|F3F(2, 0x35, 0x055), CMPFCC(~3)|F3F(~2, ~0x35, ~0x055),      "9,e,f", F_FLOAT, v9 },
01598 
01599 /* These Extended FPop (FIFO) instructions are new in the Fujitsu
01600    MB86934, replacing the CPop instructions from v6 and later
01601    processors.  */
01602 
01603 #define EFPOP1_2(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op)|RS1_G0, args, 0, sparclite }
01604 #define EFPOP1_3(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op),        args, 0, sparclite }
01605 #define EFPOP2_2(name, op, args) { name, F3F(2, 0x37, op), F3F(~2, ~0x37, ~op)|RD_G0,  args, 0, sparclite }
01606 
01607 EFPOP1_2 ("efitod",  0x0c8, "f,H"),
01608 EFPOP1_2 ("efitos",  0x0c4, "f,g"),
01609 EFPOP1_2 ("efdtoi",  0x0d2, "B,g"),
01610 EFPOP1_2 ("efstoi",  0x0d1, "f,g"),
01611 EFPOP1_2 ("efstod",  0x0c9, "f,H"),
01612 EFPOP1_2 ("efdtos",  0x0c6, "B,g"),
01613 EFPOP1_2 ("efmovs",  0x001, "f,g"),
01614 EFPOP1_2 ("efnegs",  0x005, "f,g"),
01615 EFPOP1_2 ("efabss",  0x009, "f,g"),
01616 EFPOP1_2 ("efsqrtd", 0x02a, "B,H"),
01617 EFPOP1_2 ("efsqrts", 0x029, "f,g"),
01618 EFPOP1_3 ("efaddd",  0x042, "v,B,H"),
01619 EFPOP1_3 ("efadds",  0x041, "e,f,g"),
01620 EFPOP1_3 ("efsubd",  0x046, "v,B,H"),
01621 EFPOP1_3 ("efsubs",  0x045, "e,f,g"),
01622 EFPOP1_3 ("efdivd",  0x04e, "v,B,H"),
01623 EFPOP1_3 ("efdivs",  0x04d, "e,f,g"),
01624 EFPOP1_3 ("efmuld",  0x04a, "v,B,H"),
01625 EFPOP1_3 ("efmuls",  0x049, "e,f,g"),
01626 EFPOP1_3 ("efsmuld", 0x069, "e,f,H"),
01627 EFPOP2_2 ("efcmpd",  0x052, "v,B"),
01628 EFPOP2_2 ("efcmped", 0x056, "v,B"),
01629 EFPOP2_2 ("efcmps",  0x051, "e,f"),
01630 EFPOP2_2 ("efcmpes", 0x055, "e,f"),
01631 
01632 #undef EFPOP1_2
01633 #undef EFPOP1_3
01634 #undef EFPOP2_2
01635 
01636 /* These are marked F_ALIAS, so that they won't conflict with sparclite insns
01637    present.  Otherwise, the F_ALIAS flag is ignored.  */
01638 { "cpop1",    F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", F_ALIAS, v6notv9 },
01639 { "cpop2",    F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", F_ALIAS, v6notv9 },
01640 
01641 /* sparclet specific insns */
01642 
01643 COMMUTEOP ("umac", 0x3e, sparclet),
01644 COMMUTEOP ("smac", 0x3f, sparclet),
01645 COMMUTEOP ("umacd", 0x2e, sparclet),
01646 COMMUTEOP ("smacd", 0x2f, sparclet),
01647 COMMUTEOP ("umuld", 0x09, sparclet),
01648 COMMUTEOP ("smuld", 0x0d, sparclet),
01649 
01650 { "shuffle",  F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0),       "1,2,d", 0, sparclet },
01651 { "shuffle",  F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1),        "1,i,d", 0, sparclet },
01652 
01653 /* The manual isn't completely accurate on these insns.  The `rs2' field is
01654    treated as being 6 bits to account for 6 bit immediates to cpush.  It is
01655    assumed that it is intended that bit 5 is 0 when rs2 contains a reg.  */
01656 #define BIT5 (1<<5)
01657 { "crdcxt",   F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0),  "U,d", 0, sparclet },
01658 { "cwrcxt",   F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0),  "1,u", 0, sparclet },
01659 { "cpush",    F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0),   "1,2", 0, sparclet },
01660 { "cpush",    F3(2, 0x36, 1)|SLCPOP(0), F3(~2, ~0x36, ~1)|SLCPOP(~0)|RD(~0),        "1,Y", 0, sparclet },
01661 { "cpusha",   F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0),   "1,2", 0, sparclet },
01662 { "cpusha",   F3(2, 0x36, 1)|SLCPOP(1), F3(~2, ~0x36, ~1)|SLCPOP(~1)|RD(~0),        "1,Y", 0, sparclet },
01663 { "cpull",    F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d", 0, sparclet },
01664 #undef BIT5
01665 
01666 /* sparclet coprocessor branch insns */
01667 #define SLCBCC2(opcode, mask, lose) \
01668  { opcode, (mask), ANNUL|(lose), "l",    F_DELAYED|F_CONDBR, sparclet }, \
01669  { opcode, (mask)|ANNUL, (lose), ",a l", F_DELAYED|F_CONDBR, sparclet }
01670 #define SLCBCC(opcode, mask) \
01671   SLCBCC2(opcode, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)))
01672 
01673 /* cbn,cba can't be defined here because they're defined elsewhere and GAS
01674    requires all mnemonics of the same name to be consecutive.  */
01675 /*SLCBCC("cbn", 0), - already defined */
01676 SLCBCC("cbe", 1),
01677 SLCBCC("cbf", 2),
01678 SLCBCC("cbef", 3),
01679 SLCBCC("cbr", 4),
01680 SLCBCC("cber", 5),
01681 SLCBCC("cbfr", 6),
01682 SLCBCC("cbefr", 7),
01683 /*SLCBCC("cba", 8), - already defined */
01684 SLCBCC("cbne", 9),
01685 SLCBCC("cbnf", 10),
01686 SLCBCC("cbnef", 11),
01687 SLCBCC("cbnr", 12),
01688 SLCBCC("cbner", 13),
01689 SLCBCC("cbnfr", 14),
01690 SLCBCC("cbnefr", 15),
01691 
01692 #undef SLCBCC2
01693 #undef SLCBCC
01694 
01695 { "casa",     F3(3, 0x3c, 0), F3(~3, ~0x3c, ~0), "[1]A,2,d", 0, v9 },
01696 { "casa",     F3(3, 0x3c, 1), F3(~3, ~0x3c, ~1), "[1]o,2,d", 0, v9 },
01697 { "casxa",    F3(3, 0x3e, 0), F3(~3, ~0x3e, ~0), "[1]A,2,d", 0, v9 },
01698 { "casxa",    F3(3, 0x3e, 1), F3(~3, ~0x3e, ~1), "[1]o,2,d", 0, v9 },
01699 
01700 /* v9 synthetic insns */
01701 { "iprefetch",       F2(0, 1)|(2<<20)|BPRED, F2(~0, ~1)|(1<<20)|ANNUL|COND(~0), "G", 0, v9 }, /* bn,a,pt %xcc,label */
01702 { "signx",    F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0)|RS2_G0, "1,d", F_ALIAS, v9 }, /* sra rs1,%g0,rd */
01703 { "signx",    F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0)|RS2_G0, "r", F_ALIAS, v9 }, /* sra rd,%g0,rd */
01704 { "clruw",    F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0)|RS2_G0, "1,d", F_ALIAS, v9 }, /* srl rs1,%g0,rd */
01705 { "clruw",    F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0)|RS2_G0, "r", F_ALIAS, v9 }, /* srl rd,%g0,rd */
01706 { "cas",      F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, v9 }, /* casa [rs1]ASI_P,rs2,rd */
01707 { "casl",     F3(3, 0x3c, 0)|ASI(0x88), F3(~3, ~0x3c, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, v9 }, /* casa [rs1]ASI_P_L,rs2,rd */
01708 { "casx",     F3(3, 0x3e, 0)|ASI(0x80), F3(~3, ~0x3e, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, v9 }, /* casxa [rs1]ASI_P,rs2,rd */
01709 { "casxl",    F3(3, 0x3e, 0)|ASI(0x88), F3(~3, ~0x3e, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, v9 }, /* casxa [rs1]ASI_P_L,rs2,rd */
01710 
01711 /* Ultrasparc extensions */
01712 { "shutdown", F3F(2, 0x36, 0x080), F3F(~2, ~0x36, ~0x080)|RD_G0|RS1_G0|RS2_G0, "", 0, v9a },
01713 
01714 /* FIXME: Do we want to mark these as F_FLOAT, or something similar?  */
01715 { "fpadd16",  F3F(2, 0x36, 0x050), F3F(~2, ~0x36, ~0x050), "v,B,H", 0, v9a },
01716 { "fpadd16s", F3F(2, 0x36, 0x051), F3F(~2, ~0x36, ~0x051), "e,f,g", 0, v9a },
01717 { "fpadd32",  F3F(2, 0x36, 0x052), F3F(~2, ~0x36, ~0x052), "v,B,H", 0, v9a },
01718 { "fpadd32s", F3F(2, 0x36, 0x053), F3F(~2, ~0x36, ~0x053), "e,f,g", 0, v9a },
01719 { "fpsub16",  F3F(2, 0x36, 0x054), F3F(~2, ~0x36, ~0x054), "v,B,H", 0, v9a },
01720 { "fpsub16s", F3F(2, 0x36, 0x055), F3F(~2, ~0x36, ~0x055), "e,f,g", 0, v9a },
01721 { "fpsub32",  F3F(2, 0x36, 0x056), F3F(~2, ~0x36, ~0x056), "v,B,H", 0, v9a },
01722 { "fpsub32s", F3F(2, 0x36, 0x057), F3F(~2, ~0x36, ~0x057), "e,f,g", 0, v9a },
01723 
01724 { "fpack32",  F3F(2, 0x36, 0x03a), F3F(~2, ~0x36, ~0x03a), "v,B,H", 0, v9a },
01725 { "fpack16",  F3F(2, 0x36, 0x03b), F3F(~2, ~0x36, ~0x03b)|RS1_G0, "B,g", 0, v9a },
01726 { "fpackfix", F3F(2, 0x36, 0x03d), F3F(~2, ~0x36, ~0x03d)|RS1_G0, "B,g", 0, v9a },
01727 { "fexpand",  F3F(2, 0x36, 0x04d), F3F(~2, ~0x36, ~0x04d)|RS1_G0, "f,H", 0, v9a },
01728 { "fpmerge",  F3F(2, 0x36, 0x04b), F3F(~2, ~0x36, ~0x04b), "e,f,H", 0, v9a },
01729 
01730 /* Note that the mixing of 32/64 bit regs is intentional.  */
01731 { "fmul8x16",        F3F(2, 0x36, 0x031), F3F(~2, ~0x36, ~0x031), "e,B,H", 0, v9a },
01732 { "fmul8x16au",             F3F(2, 0x36, 0x033), F3F(~2, ~0x36, ~0x033), "e,f,H", 0, v9a },
01733 { "fmul8x16al",             F3F(2, 0x36, 0x035), F3F(~2, ~0x36, ~0x035), "e,f,H", 0, v9a },
01734 { "fmul8sux16",             F3F(2, 0x36, 0x036), F3F(~2, ~0x36, ~0x036), "v,B,H", 0, v9a },
01735 { "fmul8ulx16",             F3F(2, 0x36, 0x037), F3F(~2, ~0x36, ~0x037), "v,B,H", 0, v9a },
01736 { "fmuld8sux16",     F3F(2, 0x36, 0x038), F3F(~2, ~0x36, ~0x038), "e,f,H", 0, v9a },
01737 { "fmuld8ulx16",     F3F(2, 0x36, 0x039), F3F(~2, ~0x36, ~0x039), "e,f,H", 0, v9a },
01738 
01739 { "alignaddr",       F3F(2, 0x36, 0x018), F3F(~2, ~0x36, ~0x018), "1,2,d", 0, v9a },
01740 { "alignaddrl",      F3F(2, 0x36, 0x01a), F3F(~2, ~0x36, ~0x01a), "1,2,d", 0, v9a },
01741 { "faligndata",      F3F(2, 0x36, 0x048), F3F(~2, ~0x36, ~0x048), "v,B,H", 0, v9a },
01742 
01743 { "fzero",    F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", 0, v9a },
01744 { "fzeros",   F3F(2, 0x36, 0x061), F3F(~2, ~0x36, ~0x061), "g", 0, v9a },
01745 { "fone",     F3F(2, 0x36, 0x07e), F3F(~2, ~0x36, ~0x07e), "H", 0, v9a },
01746 { "fones",    F3F(2, 0x36, 0x07f), F3F(~2, ~0x36, ~0x07f), "g", 0, v9a },
01747 { "fsrc1",    F3F(2, 0x36, 0x074), F3F(~2, ~0x36, ~0x074), "v,H", 0, v9a },
01748 { "fsrc1s",   F3F(2, 0x36, 0x075), F3F(~2, ~0x36, ~0x075), "e,g", 0, v9a },
01749 { "fsrc2",    F3F(2, 0x36, 0x078), F3F(~2, ~0x36, ~0x078), "B,H", 0, v9a },
01750 { "fsrc2s",   F3F(2, 0x36, 0x079), F3F(~2, ~0x36, ~0x079), "f,g", 0, v9a },
01751 { "fnot1",    F3F(2, 0x36, 0x06a), F3F(~2, ~0x36, ~0x06a), "v,H", 0, v9a },
01752 { "fnot1s",   F3F(2, 0x36, 0x06b), F3F(~2, ~0x36, ~0x06b), "e,g", 0, v9a },
01753 { "fnot2",    F3F(2, 0x36, 0x066), F3F(~2, ~0x36, ~0x066), "B,H", 0, v9a },
01754 { "fnot2s",   F3F(2, 0x36, 0x067), F3F(~2, ~0x36, ~0x067), "f,g", 0, v9a },
01755 { "for",      F3F(2, 0x36, 0x07c), F3F(~2, ~0x36, ~0x07c), "v,B,H", 0, v9a },
01756 { "fors",     F3F(2, 0x36, 0x07d), F3F(~2, ~0x36, ~0x07d), "e,f,g", 0, v9a },
01757 { "fnor",     F3F(2, 0x36, 0x062), F3F(~2, ~0x36, ~0x062), "v,B,H", 0, v9a },
01758 { "fnors",    F3F(2, 0x36, 0x063), F3F(~2, ~0x36, ~0x063), "e,f,g", 0, v9a },
01759 { "fand",     F3F(2, 0x36, 0x070), F3F(~2, ~0x36, ~0x070), "v,B,H", 0, v9a },
01760 { "fands",    F3F(2, 0x36, 0x071), F3F(~2, ~0x36, ~0x071), "e,f,g", 0, v9a },
01761 { "fnand",    F3F(2, 0x36, 0x06e), F3F(~2, ~0x36, ~0x06e), "v,B,H", 0, v9a },
01762 { "fnands",   F3F(2, 0x36, 0x06f), F3F(~2, ~0x36, ~0x06f), "e,f,g", 0, v9a },
01763 { "fxor",     F3F(2, 0x36, 0x06c), F3F(~2, ~0x36, ~0x06c), "v,B,H", 0, v9a },
01764 { "fxors",    F3F(2, 0x36, 0x06d), F3F(~2, ~0x36, ~0x06d), "e,f,g", 0, v9a },
01765 { "fxnor",    F3F(2, 0x36, 0x072), F3F(~2, ~0x36, ~0x072), "v,B,H", 0, v9a },
01766 { "fxnors",   F3F(2, 0x36, 0x073), F3F(~2, ~0x36, ~0x073), "e,f,g", 0, v9a },
01767 { "fornot1",  F3F(2, 0x36, 0x07a), F3F(~2, ~0x36, ~0x07a), "v,B,H", 0, v9a },
01768 { "fornot1s", F3F(2, 0x36, 0x07b), F3F(~2, ~0x36, ~0x07b), "e,f,g", 0, v9a },
01769 { "fornot2",  F3F(2, 0x36, 0x076), F3F(~2, ~0x36, ~0x076), "v,B,H", 0, v9a },
01770 { "fornot2s", F3F(2, 0x36, 0x077), F3F(~2, ~0x36, ~0x077), "e,f,g", 0, v9a },
01771 { "fandnot1", F3F(2, 0x36, 0x068), F3F(~2, ~0x36, ~0x068), "v,B,H", 0, v9a },
01772 { "fandnot1s",       F3F(2, 0x36, 0x069), F3F(~2, ~0x36, ~0x069), "e,f,g", 0, v9a },
01773 { "fandnot2", F3F(2, 0x36, 0x064), F3F(~2, ~0x36, ~0x064), "v,B,H", 0, v9a },
01774 { "fandnot2s",       F3F(2, 0x36, 0x065), F3F(~2, ~0x36, ~0x065), "e,f,g", 0, v9a },
01775 
01776 { "fcmpgt16", F3F(2, 0x36, 0x028), F3F(~2, ~0x36, ~0x028), "v,B,d", 0, v9a },
01777 { "fcmpgt32", F3F(2, 0x36, 0x02c), F3F(~2, ~0x36, ~0x02c), "v,B,d", 0, v9a },
01778 { "fcmple16", F3F(2, 0x36, 0x020), F3F(~2, ~0x36, ~0x020), "v,B,d", 0, v9a },
01779 { "fcmple32", F3F(2, 0x36, 0x024), F3F(~2, ~0x36, ~0x024), "v,B,d", 0, v9a },
01780 { "fcmpne16", F3F(2, 0x36, 0x022), F3F(~2, ~0x36, ~0x022), "v,B,d", 0, v9a },
01781 { "fcmpne32", F3F(2, 0x36, 0x026), F3F(~2, ~0x36, ~0x026), "v,B,d", 0, v9a },
01782 { "fcmpeq16", F3F(2, 0x36, 0x02a), F3F(~2, ~0x36, ~0x02a), "v,B,d", 0, v9a },
01783 { "fcmpeq32", F3F(2, 0x36, 0x02e), F3F(~2, ~0x36, ~0x02e), "v,B,d", 0, v9a },
01784 
01785 { "edge8",    F3F(2, 0x36, 0x000), F3F(~2, ~0x36, ~0x000), "1,2,d", 0, v9a },
01786 { "edge8l",   F3F(2, 0x36, 0x002), F3F(~2, ~0x36, ~0x002), "1,2,d", 0, v9a },
01787 { "edge16",   F3F(2, 0x36, 0x004), F3F(~2, ~0x36, ~0x004), "1,2,d", 0, v9a },
01788 { "edge16l",  F3F(2, 0x36, 0x006), F3F(~2, ~0x36, ~0x006), "1,2,d", 0, v9a },
01789 { "edge32",   F3F(2, 0x36, 0x008), F3F(~2, ~0x36, ~0x008), "1,2,d", 0, v9a },
01790 { "edge32l",  F3F(2, 0x36, 0x00a), F3F(~2, ~0x36, ~0x00a), "1,2,d", 0, v9a },
01791 
01792 { "pdist",    F3F(2, 0x36, 0x03e), F3F(~2, ~0x36, ~0x03e), "v,B,H", 0, v9a },
01793 
01794 { "array8",   F3F(2, 0x36, 0x010), F3F(~2, ~0x36, ~0x010), "1,2,d", 0, v9a },
01795 { "array16",  F3F(2, 0x36, 0x012), F3F(~2, ~0x36, ~0x012), "1,2,d", 0, v9a },
01796 { "array32",  F3F(2, 0x36, 0x014), F3F(~2, ~0x36, ~0x014), "1,2,d", 0, v9a },
01797 
01798 /* Cheetah instructions */
01799 { "edge8n",    F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", 0, v9b },
01800 { "edge8ln",   F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", 0, v9b },
01801 { "edge16n",   F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", 0, v9b },
01802 { "edge16ln",  F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", 0, v9b },
01803 { "edge32n",   F3F(2, 0x36, 0x009), F3F(~2, ~0x36, ~0x009), "1,2,d", 0, v9b },
01804 { "edge32ln",  F3F(2, 0x36, 0x00b), F3F(~2, ~0x36, ~0x00b), "1,2,d", 0, v9b },
01805 
01806 { "bmask",     F3F(2, 0x36, 0x019), F3F(~2, ~0x36, ~0x019), "1,2,d", 0, v9b },
01807 { "bshuffle",  F3F(2, 0x36, 0x04c), F3F(~2, ~0x36, ~0x04c), "v,B,H", 0, v9b },
01808 
01809 { "siam",      F3F(2, 0x36, 0x081), F3F(~2, ~0x36, ~0x081)|RD_G0|RS1_G0|RS2(~7), "3", 0, v9b },
01810 
01811 /* More v9 specific insns, these need to come last so they do not clash
01812    with v9a instructions such as "edge8" which looks like impdep1. */
01813 
01814 #define IMPDEP(name, code) \
01815 { name,       F3(2, code, 0), F3(~2, ~code, ~0)|ASI(~0), "1,2,d", 0, v9notv9a }, \
01816 { name,       F3(2, code, 1), F3(~2, ~code, ~1),    "1,i,d", 0, v9notv9a }, \
01817 { name, F3(2, code, 0), F3(~2, ~code, ~0),         "x,1,2,d", 0, v9notv9a }, \
01818 { name, F3(2, code, 0), F3(~2, ~code, ~0),         "x,e,f,g", 0, v9notv9a }
01819 
01820 IMPDEP ("impdep1", 0x36),
01821 IMPDEP ("impdep2", 0x37),
01822 
01823 #undef IMPDEP
01824 
01825 };
01826 
01827 const int sparc_num_opcodes = ((sizeof sparc_opcodes)/(sizeof sparc_opcodes[0]));
01828 
01829 /* Utilities for argument parsing.  */
01830 
01831 typedef struct
01832 {
01833   int value;
01834   const char *name;
01835 } arg;
01836 
01837 /* Look up NAME in TABLE.  */
01838 
01839 static int
01840 lookup_name (const arg *table, const char *name)
01841 {
01842   const arg *p;
01843 
01844   for (p = table; p->name; ++p)
01845     if (strcmp (name, p->name) == 0)
01846       return p->value;
01847 
01848   return -1;
01849 }
01850 
01851 /* Look up VALUE in TABLE.  */
01852 
01853 static const char *
01854 lookup_value (const arg *table, int value)
01855 {
01856   const arg *p;
01857 
01858   for (p = table; p->name; ++p)
01859     if (value == p->value)
01860       return p->name;
01861 
01862   return NULL;
01863 }
01864 
01865 /* Handle ASI's.  */
01866 
01867 static arg asi_table[] =
01868 {
01869   /* These are in the v9 architecture manual.  */
01870   /* The shorter versions appear first, they're here because Sun's as has them.
01871      Sun's as uses #ASI_P_L instead of #ASI_PL (which appears in the
01872      UltraSPARC architecture manual).  */
01873   { 0x04, "#ASI_N" },
01874   { 0x0c, "#ASI_N_L" },
01875   { 0x10, "#ASI_AIUP" },
01876   { 0x11, "#ASI_AIUS" },
01877   { 0x18, "#ASI_AIUP_L" },
01878   { 0x19, "#ASI_AIUS_L" },
01879   { 0x80, "#ASI_P" },
01880   { 0x81, "#ASI_S" },
01881   { 0x82, "#ASI_PNF" },
01882   { 0x83, "#ASI_SNF" },
01883   { 0x88, "#ASI_P_L" },
01884   { 0x89, "#ASI_S_L" },
01885   { 0x8a, "#ASI_PNF_L" },
01886   { 0x8b, "#ASI_SNF_L" },
01887   { 0x04, "#ASI_NUCLEUS" },
01888   { 0x0c, "#ASI_NUCLEUS_LITTLE" },
01889   { 0x10, "#ASI_AS_IF_USER_PRIMARY" },
01890   { 0x11, "#ASI_AS_IF_USER_SECONDARY" },
01891   { 0x18, "#ASI_AS_IF_USER_PRIMARY_LITTLE" },
01892   { 0x19, "#ASI_AS_IF_USER_SECONDARY_LITTLE" },
01893   { 0x80, "#ASI_PRIMARY" },
01894   { 0x81, "#ASI_SECONDARY" },
01895   { 0x82, "#ASI_PRIMARY_NOFAULT" },
01896   { 0x83, "#ASI_SECONDARY_NOFAULT" },
01897   { 0x88, "#ASI_PRIMARY_LITTLE" },
01898   { 0x89, "#ASI_SECONDARY_LITTLE" },
01899   { 0x8a, "#ASI_PRIMARY_NOFAULT_LITTLE" },
01900   { 0x8b, "#ASI_SECONDARY_NOFAULT_LITTLE" },
01901   /* These are UltraSPARC extensions.  */
01902   /* FIXME: There are dozens of them.  Not sure we want them all.
01903      Most are for kernel building but some are for vis type stuff.  */
01904   { 0, 0 }
01905 };
01906 
01907 /* Return the value for ASI NAME, or -1 if not found.  */
01908 
01909 int
01910 sparc_encode_asi (const char *name)
01911 {
01912   return lookup_name (asi_table, name);
01913 }
01914 
01915 /* Return the name for ASI value VALUE or NULL if not found.  */
01916 
01917 const char *
01918 sparc_decode_asi (int value)
01919 {
01920   return lookup_value (asi_table, value);
01921 }
01922 
01923 /* Handle membar masks.  */
01924 
01925 static arg membar_table[] =
01926 {
01927   { 0x40, "#Sync" },
01928   { 0x20, "#MemIssue" },
01929   { 0x10, "#Lookaside" },
01930   { 0x08, "#StoreStore" },
01931   { 0x04, "#LoadStore" },
01932   { 0x02, "#StoreLoad" },
01933   { 0x01, "#LoadLoad" },
01934   { 0, 0 }
01935 };
01936 
01937 /* Return the value for membar arg NAME, or -1 if not found.  */
01938 
01939 int
01940 sparc_encode_membar (const char *name)
01941 {
01942   return lookup_name (membar_table, name);
01943 }
01944 
01945 /* Return the name for membar value VALUE or NULL if not found.  */
01946 
01947 const char *
01948 sparc_decode_membar (int value)
01949 {
01950   return lookup_value (membar_table, value);
01951 }
01952 
01953 /* Handle prefetch args.  */
01954 
01955 static arg prefetch_table[] =
01956 {
01957   { 0, "#n_reads" },
01958   { 1, "#one_read" },
01959   { 2, "#n_writes" },
01960   { 3, "#one_write" },
01961   { 4, "#page" },
01962   { 16, "#invalidate" },
01963   { 0, 0 }
01964 };
01965 
01966 /* Return the value for prefetch arg NAME, or -1 if not found.  */
01967 
01968 int
01969 sparc_encode_prefetch (const char *name)
01970 {
01971   return lookup_name (prefetch_table, name);
01972 }
01973 
01974 /* Return the name for prefetch value VALUE or NULL if not found.  */
01975 
01976 const char *
01977 sparc_decode_prefetch (int value)
01978 {
01979   return lookup_value (prefetch_table, value);
01980 }
01981 
01982 /* Handle sparclet coprocessor registers.  */
01983 
01984 static arg sparclet_cpreg_table[] =
01985 {
01986   { 0, "%ccsr" },
01987   { 1, "%ccfr" },
01988   { 2, "%cccrcr" },
01989   { 3, "%ccpr" },
01990   { 4, "%ccsr2" },
01991   { 5, "%cccrr" },
01992   { 6, "%ccrstr" },
01993   { 0, 0 }
01994 };
01995 
01996 /* Return the value for sparclet cpreg arg NAME, or -1 if not found.  */
01997 
01998 int
01999 sparc_encode_sparclet_cpreg (const char *name)
02000 {
02001   return lookup_name (sparclet_cpreg_table, name);
02002 }
02003 
02004 /* Return the name for sparclet cpreg value VALUE or NULL if not found.  */
02005 
02006 const char *
02007 sparc_decode_sparclet_cpreg (int value)
02008 {
02009   return lookup_value (sparclet_cpreg_table, value);
02010 }