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cell-binutils  2.17cvs20070401
sim-d10v.h
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00001 /* This file defines the interface between the d10v simulator and gdb.
00002 
00003    Copyright 1999, 2002, 2007 Free Software Foundation, Inc.
00004 
00005 This file is part of GDB.
00006 
00007 This program is free software; you can redistribute it and/or modify
00008 it under the terms of the GNU General Public License as published by
00009 the Free Software Foundation; either version 2 of the License, or
00010 (at your option) any later version.
00011 
00012 This program is distributed in the hope that it will be useful,
00013 but WITHOUT ANY WARRANTY; without even the implied warranty of
00014 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015 GNU General Public License for more details.
00016 
00017 You should have received a copy of the GNU General Public License
00018 along with this program; if not, write to the Free Software
00019 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
00020 
00021 #if !defined (SIM_D10V_H)
00022 #define SIM_D10V_H
00023 
00024 #ifdef __cplusplus
00025 extern "C" { // }
00026 #endif
00027 
00028 /* GDB interprets addresses as:
00029 
00030    0x00xxxxxx: Physical unified memory segment     (Unified memory)
00031    0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
00032    0x02xxxxxx: Physical data memory segment        (On-chip data memory)
00033    0x10xxxxxx: Logical data address segment        (DMAP translated memory)
00034    0x11xxxxxx: Logical instruction address segment (IMAP translated memory)
00035 
00036    The remote d10v board interprets addresses as:
00037 
00038    0x00xxxxxx: Physical unified memory segment     (Unified memory)
00039    0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
00040    0x02xxxxxx: Physical data memory segment        (On-chip data memory)
00041 
00042    The following translate a virtual DMAP/IMAP offset into a physical
00043    memory segment assigning the translated address to PHYS.  Since a
00044    memory access may cross a page boundrary the number of bytes for
00045    which the translation is applicable (or 0 for an invalid virtual
00046    offset) is returned. */
00047 
00048 enum
00049   {
00050     SIM_D10V_MEMORY_UNIFIED = 0x00000000,
00051     SIM_D10V_MEMORY_INSN = 0x01000000,
00052     SIM_D10V_MEMORY_DATA = 0x02000000,
00053     SIM_D10V_MEMORY_DMAP = 0x10000000,
00054     SIM_D10V_MEMORY_IMAP = 0x11000000
00055   };
00056 
00057 extern unsigned long sim_d10v_translate_dmap_addr
00058   (unsigned long offset,
00059    int nr_bytes,
00060    unsigned long *phys,
00061    void *regcache,
00062    unsigned long (*dmap_register) (void *regcache, int reg_nr));
00063 
00064 extern unsigned long sim_d10v_translate_imap_addr
00065   (unsigned long offset,
00066    int nr_bytes,
00067    unsigned long *phys,
00068    void *regcache,
00069    unsigned long (*imap_register) (void *regcache, int reg_nr));
00070 
00071 extern unsigned long sim_d10v_translate_addr
00072   (unsigned long vaddr,
00073    int nr_bytes,
00074    unsigned long *phys,
00075    void *regcache,
00076    unsigned long (*dmap_register) (void *regcache, int reg_nr),
00077    unsigned long (*imap_register) (void *regcache, int reg_nr));
00078 
00079 
00080 /* The simulator makes use of the following register information. */
00081 
00082 enum sim_d10v_regs
00083 {
00084   SIM_D10V_R0_REGNUM,
00085   SIM_D10V_R1_REGNUM,
00086   SIM_D10V_R2_REGNUM,
00087   SIM_D10V_R3_REGNUM,
00088   SIM_D10V_R4_REGNUM,
00089   SIM_D10V_R5_REGNUM,
00090   SIM_D10V_R6_REGNUM,
00091   SIM_D10V_R7_REGNUM,
00092   SIM_D10V_R8_REGNUM,
00093   SIM_D10V_R9_REGNUM,
00094   SIM_D10V_R10_REGNUM,
00095   SIM_D10V_R11_REGNUM,
00096   SIM_D10V_R12_REGNUM,
00097   SIM_D10V_R13_REGNUM,
00098   SIM_D10V_R14_REGNUM,
00099   SIM_D10V_R15_REGNUM,
00100   SIM_D10V_CR0_REGNUM,
00101   SIM_D10V_CR1_REGNUM,
00102   SIM_D10V_CR2_REGNUM,
00103   SIM_D10V_CR3_REGNUM,
00104   SIM_D10V_CR4_REGNUM,
00105   SIM_D10V_CR5_REGNUM,
00106   SIM_D10V_CR6_REGNUM,
00107   SIM_D10V_CR7_REGNUM,
00108   SIM_D10V_CR8_REGNUM,
00109   SIM_D10V_CR9_REGNUM,
00110   SIM_D10V_CR10_REGNUM,
00111   SIM_D10V_CR11_REGNUM,
00112   SIM_D10V_CR12_REGNUM,
00113   SIM_D10V_CR13_REGNUM,
00114   SIM_D10V_CR14_REGNUM,
00115   SIM_D10V_CR15_REGNUM,
00116   SIM_D10V_A0_REGNUM,
00117   SIM_D10V_A1_REGNUM,
00118   SIM_D10V_SPI_REGNUM,
00119   SIM_D10V_SPU_REGNUM,
00120   SIM_D10V_IMAP0_REGNUM,
00121   SIM_D10V_IMAP1_REGNUM,
00122   SIM_D10V_DMAP0_REGNUM,
00123   SIM_D10V_DMAP1_REGNUM,
00124   SIM_D10V_DMAP2_REGNUM,
00125   SIM_D10V_DMAP3_REGNUM,
00126   SIM_D10V_TS2_DMAP_REGNUM
00127 };
00128   
00129 enum
00130 {
00131   SIM_D10V_NR_R_REGS = 16,
00132   SIM_D10V_NR_A_REGS = 2,
00133   SIM_D10V_NR_IMAP_REGS = 2,
00134   SIM_D10V_NR_DMAP_REGS = 4,
00135   SIM_D10V_NR_CR_REGS = 16
00136 };
00137 
00138 #ifdef __cplusplus
00139 }
00140 #endif
00141 
00142 #endif