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cell-binutils  2.17cvs20070401
sh4a-dsp.d
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00001 #as: -dsp
00002 #objdump: -fdr --prefix-addresses --show-raw-insn
00003 #name: SH4al-dsp constructs shared with sh4a (and sh4)
00004 
00005 .*:     file format elf.*sh.*
00006 architecture: sh4a-nofpu, flags 0x00000010:
00007 HAS_SYMS
00008 start address 0x00000000
00009 
00010 Disassembly of section \.text:
00011 0x00000000 01 63            movli\.l      @r1,r0
00012 0x00000002 00 73            movco\.l      r0,@r0
00013 0x00000004 06 63            movli\.l      @r6,r0
00014 0x00000006 03 73            movco\.l      r0,@r3
00015 0x00000008 0a 63            movli\.l      @r10,r0
00016 0x0000000a 0c 73            movco\.l      r0,@r12
00017 0x0000000c 40 a9            movua\.l      @r0,r0
00018 0x0000000e 4d a9            movua\.l      @r13,r0
00019 0x00000010 47 a9            movua\.l      @r7,r0
00020 0x00000012 45 e9            movua\.l      @r5\+,r0
00021 0x00000014 42 e9            movua\.l      @r2\+,r0
00022 0x00000016 4b e9            movua\.l      @r11\+,r0
00023 0x00000018 04 e3            icbi   @r4
00024 0x0000001a 0f e3            icbi   @r15
00025 0x0000001c 02 e3            icbi   @r2
00026 0x0000001e 05 d3            prefi  @r5
00027 0x00000020 0a d3            prefi  @r10
00028 0x00000022 00 ab            synco  
00029 0x00000024 45 fa            ldc    r5,dbr
00030 0x00000026 4a f6            ldc.l  @r10\+,dbr
00031 0x00000028 0b 3a            stc    sgr,r11
00032 0x0000002a 49 32            stc.l  sgr,@-r9
00033 0x0000002c 02 fa            stc    dbr,r2
00034 0x0000002e 46 f2            stc.l  dbr,@-r6
00035 0x00000030 03 c3            movca.l       r0,@r3
00036 0x00000032 0c 93            ocbi   @r12
00037 0x00000034 07 a3            ocbp   @r7
00038 0x00000036 0d b3            ocbwb  @r13
00039 0x00000038 0e 83            pref   @r14
00040 0x0000003a 00 09            nop