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cell-binutils  2.17cvs20070401
rol.d
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00001 #objdump: -dr --prefix-addresses
00002 #name: MIPS macro rol/ror
00003 #as: -32
00004 
00005 # Test the rol and ror macros.
00006 
00007 .*: +file format .*mips.*
00008 
00009 Disassembly of section .text:
00010 0+0000 <[^>]*> negu  at,a1
00011 0+0004 <[^>]*> srlv  at,a0,at
00012 0+0008 <[^>]*> sllv  a0,a0,a1
00013 0+000c <[^>]*> or    a0,a0,at
00014 0+0010 <[^>]*> negu  at,a2
00015 0+0014 <[^>]*> srlv  at,a1,at
00016 0+0018 <[^>]*> sllv  a0,a1,a2
00017 0+001c <[^>]*> or    a0,a0,at
00018 0+0020 <[^>]*> sll   at,a0,0x1
00019 0+0024 <[^>]*> srl   a0,a0,0x1f
00020 0+0028 <[^>]*> or    a0,a0,at
00021 0+002c <[^>]*> sll   at,a1,0x1
00022 0+0030 <[^>]*> srl   a0,a1,0x1f
00023 0+0034 <[^>]*> or    a0,a0,at
00024 0+0038 <[^>]*> srl   a0,a1,0x0
00025 0+003c <[^>]*> negu  at,a1
00026 0+0040 <[^>]*> sllv  at,a0,at
00027 0+0044 <[^>]*> srlv  a0,a0,a1
00028 0+0048 <[^>]*> or    a0,a0,at
00029 0+004c <[^>]*> negu  at,a2
00030 0+0050 <[^>]*> sllv  at,a1,at
00031 0+0054 <[^>]*> srlv  a0,a1,a2
00032 0+0058 <[^>]*> or    a0,a0,at
00033 0+005c <[^>]*> srl   at,a0,0x1
00034 0+0060 <[^>]*> sll   a0,a0,0x1f
00035 0+0064 <[^>]*> or    a0,a0,at
00036 0+0068 <[^>]*> srl   at,a1,0x1
00037 0+006c <[^>]*> sll   a0,a1,0x1f
00038 0+0070 <[^>]*> or    a0,a0,at
00039 0+0074 <[^>]*> srl   a0,a1,0x0
00040 0+0078 <[^>]*> srl   a0,a1,0x0
00041 0+007c <[^>]*> sll   at,a1,0x1
00042 0+0080 <[^>]*> srl   a0,a1,0x1f
00043 0+0084 <[^>]*> or    a0,a0,at
00044 0+0088 <[^>]*> sll   at,a1,0x1f
00045 0+008c <[^>]*> srl   a0,a1,0x1
00046 0+0090 <[^>]*> or    a0,a0,at
00047 0+0094 <[^>]*> srl   a0,a1,0x0
00048 0+0098 <[^>]*> srl   at,a1,0x1
00049 0+009c <[^>]*> sll   a0,a1,0x1f
00050 0+00a0 <[^>]*> or    a0,a0,at
00051 0+00a4 <[^>]*> srl   at,a1,0x1f
00052 0+00a8 <[^>]*> sll   a0,a1,0x1
00053 0+00ac <[^>]*> or    a0,a0,at
00054        ...