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cell-binutils  2.17cvs20070401
relax-5-coff.d
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00001 # name: H8300 Relaxation Test 5 (for COFF)
00002 # source: relax-5.s
00003 # ld: --relax -m h8300s
00004 # objdump: -d --no-show-raw-insn
00005 
00006 .*:     file format .*-h8300
00007 
00008 Disassembly of section .text:
00009 
00010 00000100 <_start>:
00011  100:.*ldc    @0x0:16,ccr
00012  106:.*ldc    @0x7fff:16,ccr
00013  10c:.*ldc    @0x8000:32,ccr
00014  114:.*ldc    @0xff00:32,ccr
00015  11c:.*ldc    @0xffff00:32,ccr
00016  124:.*ldc    @0xffff7fff:32,ccr
00017  12c:.*ldc    @0x8000:16,ccr
00018  132:.*ldc    @0xfeff:16,ccr
00019  138:.*ldc    @0xff00:16,ccr
00020  13e:.*ldc    @0xffff:16,ccr
00021  144:.*stc    ccr,@0x0:16
00022  14a:.*stc    ccr,@0x7fff:16
00023  150:.*stc    ccr,@0x8000:32
00024  158:.*stc    ccr,@0xff00:32
00025  160:.*stc    ccr,@0xffff00:32
00026  168:.*stc    ccr,@0xffff7fff:32
00027  170:.*stc    ccr,@0x8000:16
00028  176:.*stc    ccr,@0xfeff:16
00029  17c:.*stc    ccr,@0xff00:16
00030  182:.*stc    ccr,@0xffff:16
00031  188:.*ldc    @0x0:16,exr
00032  18e:.*ldc    @0x7fff:16,exr
00033  194:.*ldc    @0x8000:32,exr
00034  19c:.*ldc    @0xff00:32,exr
00035  1a4:.*ldc    @0xffff00:32,exr
00036  1ac:.*ldc    @0xffff7fff:32,exr
00037  1b4:.*ldc    @0x8000:16,exr
00038  1ba:.*ldc    @0xfeff:16,exr
00039  1c0:.*ldc    @0xff00:16,exr
00040  1c6:.*ldc    @0xffff:16,exr
00041  1cc:.*stc    exr,@0x0:16
00042  1d2:.*stc    exr,@0x7fff:16
00043  1d8:.*stc    exr,@0x8000:32
00044  1e0:.*stc    exr,@0xff00:32
00045  1e8:.*stc    exr,@0xffff00:32
00046  1f0:.*stc    exr,@0xffff7fff:32
00047  1f8:.*stc    exr,@0x8000:16
00048  1fe:.*stc    exr,@0xfeff:16
00049  204:.*stc    exr,@0xff00:16
00050  20a:.*stc    exr,@0xffff:16