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cell-binutils  2.17cvs20070401
pdp11-opc.c
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00001 /* Opcode table for PDP-11.
00002    Copyright 2001, 2002, 2006 Free Software Foundation, Inc.
00003 
00004 This file is free software; you can redistribute it and/or modify
00005 it under the terms of the GNU General Public License as published by
00006 the Free Software Foundation; either version 2 of the License, or
00007 (at your option) any later version.
00008 
00009 This program is distributed in the hope that it will be useful,
00010 but WITHOUT ANY WARRANTY; without even the implied warranty of
00011 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012 GNU General Public License for more details.
00013 
00014 You should have received a copy of the GNU General Public License
00015 along with this program; if not, write to the Free Software
00016 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00017 
00018 #include "opcode/pdp11.h"
00019 
00020 const struct pdp11_opcode pdp11_opcodes[] =
00021 {
00022   /* name,    pattern, mask,       opcode type,         insn type,    alias */
00023   { "halt",   0x0000,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00024   { "wait",   0x0001,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00025   { "rti",    0x0002,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00026   { "bpt",    0x0003,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00027   { "iot",    0x0004,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00028   { "reset",  0x0005,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00029   { "rtt",    0x0006,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_LEIS },
00030   { "mfpt",   0x0007,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_MFPT },
00031   { "jmp",    0x0040,       0xffc0, PDP11_OPCODE_OP,    PDP11_BASIC },
00032   { "rts",    0x0080,       0xfff8, PDP11_OPCODE_REG,   PDP11_BASIC },
00033   { "",              0x0088, 0xfff8, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },
00034   { "",              0x0090, 0xfff8, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },
00035   { "spl",    0x0098,       0xfff8, PDP11_OPCODE_IMM3,  PDP11_SPL },
00036   { "nop",    0x00a0,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00037   { "clc",    0x00a1,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00038   { "clv",    0x00a2,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00039   { "cl_3",   0x00a3,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00040   { "clz",    0x00a4,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00041   { "cl_5",   0x00a5,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00042   { "cl_6",   0x00a6,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00043   { "cl_7",   0x00a7,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00044   { "cln",    0x00a8,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00045   { "cl_9",   0x00a9,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00046   { "cl_a",   0x00aa,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00047   { "cl_b",   0x00ab,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00048   { "cl_c",   0x00ac,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00049   { "cl_d",   0x00ad,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00050   { "cl_e",   0x00ae,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00051   { "ccc",    0x00af,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00052   { "se_0",   0x00b0,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00053   { "sec",    0x00b1,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00054   { "sev",    0x00b2,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00055   { "se_3",   0x00b3,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00056   { "sez",    0x00b4,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00057   { "se_5",   0x00b5,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00058   { "se_6",   0x00b6,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00059   { "se_7",   0x00b7,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00060   { "sen",    0x00b8,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00061   { "se_9",   0x00b9,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00062   { "se_a",   0x00ba,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00063   { "se_b",   0x00bb,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00064   { "se_c",   0x00bc,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00065   { "se_d",   0x00bd,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00066   { "se_e",   0x00be,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00067   { "scc",    0x00bf,       0xffff, PDP11_OPCODE_NO_OPS,       PDP11_BASIC },
00068   { "swab",   0x00c0,       0xffc0, PDP11_OPCODE_OP,    PDP11_BASIC },
00069   { "br",     0x0100, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00070   { "bne",    0x0200, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00071   { "beq",    0x0300, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00072   { "bge",    0x0400, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00073   { "blt",    0x0500, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00074   { "bgt",    0x0600, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00075   { "ble",    0x0700, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00076   { "jsr",    0x0800, 0xfe00, PDP11_OPCODE_REG_OP,      PDP11_BASIC },
00077   { "clr",    0x0a00, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00078   { "com",    0x0a40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00079   { "inc",    0x0a80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00080   { "dec",    0x0ac0, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00081   { "neg",    0x0b00, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00082   { "adc",    0x0b40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00083   { "sbc",    0x0b80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00084   { "tst",    0x0bc0, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00085   { "ror",    0x0c00, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00086   { "rol",    0x0c40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00087   { "asr",    0x0c80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00088   { "asl",    0x0cc0, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00089   { "mark",   0x0d00, 0xffc0, PDP11_OPCODE_IMM6, PDP11_LEIS },
00090   { "mfpi",   0x0d40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00091   { "mtpi",   0x0d80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00092   { "sxt",    0x0dc0, 0xffc0, PDP11_OPCODE_OP,   PDP11_LEIS },
00093   { "csm",    0x0e00, 0xffc0, PDP11_OPCODE_OP,   PDP11_CSM },
00094   { "tstset", 0x0e40, 0xffc0, PDP11_OPCODE_OP,   PDP11_MPROC },
00095   { "wrtlck", 0x0e80, 0xffc0, PDP11_OPCODE_OP,   PDP11_MPROC },
00096 /*{ "",              0x0ec0, 0xffe0, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },*/
00097   { "mov",    0x1000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00098   { "cmp",    0x2000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00099   { "bit",    0x3000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00100   { "bic",    0x4000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00101   { "bis",    0x5000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00102   { "add",    0x6000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00103   { "mul",    0x7000, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
00104   { "div",    0x7200, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
00105   { "ash",    0x7400, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
00106   { "ashc",   0x7600, 0xfe00, PDP11_OPCODE_REG_OP_REV,PDP11_EIS },
00107   { "xor",    0x7800, 0xfe00, PDP11_OPCODE_REG_OP,      PDP11_LEIS },
00108   { "fadd",   0x7a00, 0xfff8, PDP11_OPCODE_REG,  PDP11_FIS },
00109   { "fsub",   0x7a08, 0xfff8, PDP11_OPCODE_REG,  PDP11_FIS },
00110   { "fmul",   0x7a10, 0xfff8, PDP11_OPCODE_REG,  PDP11_FIS },
00111   { "fdiv",   0x7a18, 0xfff8, PDP11_OPCODE_REG,  PDP11_FIS },
00112 /*{ "",              0x7a20, 0xffe0, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },*/
00113 /*{ "",              0x7a40, 0xffc0, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },*/
00114 /*{ "",              0x7a80, 0xff80, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },*/
00115 /*{ "",              0x7b00, 0xffe0, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },*/
00116   { "l2dr",   0x7c10, 0xfff8, PDP11_OPCODE_REG,  PDP11_CIS },/*l2d*/
00117   { "movc",   0x7c18, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00118   { "movrc",  0x7c19, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00119   { "movtc",  0x7c1a, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00120   { "locc",   0x7c20, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00121   { "skpc",   0x7c21, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00122   { "scanc",  0x7c22, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00123   { "spanc",  0x7c23, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00124   { "cmpc",   0x7c24, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00125   { "matc",   0x7c25, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00126   { "addn",   0x7c28, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00127   { "subn",   0x7c29, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00128   { "cmpn",   0x7c2a, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00129   { "cvtnl",  0x7c2b, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00130   { "cvtpn",  0x7c2c, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00131   { "cvtnp",  0x7c2d, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00132   { "ashn",   0x7c2e, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00133   { "cvtln",  0x7c2f, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00134   { "l3dr",   0x7c30, 0xfff8, PDP11_OPCODE_REG,  PDP11_CIS },/*l3d*/
00135   { "addp",   0x7c38, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00136   { "subp",   0x7c39, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00137   { "cmpp",   0x7c3a, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00138   { "cvtpl",  0x7c3b, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00139   { "mulp",   0x7c3c, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00140   { "divp",   0x7c3d, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00141   { "ashp",   0x7c3e, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00142   { "cvtlp",  0x7c3f, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00143   { "movci",  0x7c58, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00144   { "movrci", 0x7c59, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00145   { "movtci", 0x7c5a, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00146   { "locci",  0x7c60, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00147   { "skpci",  0x7c61, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00148   { "scanci", 0x7c62, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00149   { "spanci", 0x7c63, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00150   { "cmpci",  0x7c64, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00151   { "matci",  0x7c65, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00152   { "addni",  0x7c68, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00153   { "subni",  0x7c69, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00154   { "cmpni",  0x7c6a, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00155   { "cvtnli", 0x7c6b, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00156   { "cvtpni", 0x7c6c, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00157   { "cvtnpi", 0x7c6d, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00158   { "ashni",  0x7c6e, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00159   { "cvtlni", 0x7c6f, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00160   { "addpi",  0x7c78, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00161   { "subpi",  0x7c79, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00162   { "cmppi",  0x7c7a, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00163   { "cvtpli", 0x7c7b, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00164   { "mulpi",  0x7c7c, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00165   { "divpi",  0x7c7d, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00166   { "ashpi",  0x7c7e, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00167   { "cvtlpi", 0x7c7f, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_CIS },
00168   { "med",    0x7d80, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_UCODE },
00169   { "xfc",    0x7dc0, 0xffc0, PDP11_OPCODE_IMM6, PDP11_UCODE },
00170   { "sob",    0x7e00, 0xfe00, PDP11_OPCODE_REG_DISPL,   PDP11_LEIS },
00171   { "bpl",    0x8000, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00172   { "bmi",    0x8100, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00173   { "bhi",    0x8200, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00174   { "blos",   0x8300, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00175   { "bvc",    0x8400, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00176   { "bvs",    0x8500, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00177   { "bcc",    0x8600, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },/*bhis*/
00178   { "bcs",    0x8700, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },/*blo*/
00179   { "emt",    0x8800, 0xff00, PDP11_OPCODE_IMM8, PDP11_BASIC },
00180   { "sys",    0x8900, 0xff00, PDP11_OPCODE_IMM8, PDP11_BASIC },/*trap*/
00181   { "clrb",   0x8a00, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00182   { "comb",   0x8a40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00183   { "incb",   0x8a80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00184   { "decb",   0x8ac0, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00185   { "negb",   0x8b00, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00186   { "adcb",   0x8b40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00187   { "sbcb",   0x8b80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00188   { "tstb",   0x8bc0, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00189   { "rorb",   0x8c00, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00190   { "rolb",   0x8c40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00191   { "asrb",   0x8c80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00192   { "aslb",   0x8cc0, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00193   { "mtps",   0x8d00, 0xffc0, PDP11_OPCODE_OP,   PDP11_MXPS },
00194   { "mfpd",   0x8d40, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00195   { "mtpd",   0x8d80, 0xffc0, PDP11_OPCODE_OP,   PDP11_BASIC },
00196   { "mfps",   0x8dc0, 0xffc0, PDP11_OPCODE_OP,   PDP11_MXPS },
00197   { "movb",   0x9000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00198   { "cmpb",   0xa000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00199   { "bitb",   0xb000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00200   { "bicb",   0xc000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00201   { "bisb",   0xd000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00202   { "sub",    0xe000, 0xf000, PDP11_OPCODE_OP_OP,       PDP11_BASIC },
00203   { "cfcc",   0xf000, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_FPP },
00204   { "setf",   0xf001, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_FPP },
00205   { "seti",   0xf002, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_FPP },
00206   { "ldub",   0xf003, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_UCODE },
00207   /* fpp trap 0xf004..0xf008 */
00208   { "setd",   0xf009, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_FPP },
00209   { "setl",   0xf00a, 0xffff, PDP11_OPCODE_NO_OPS,      PDP11_FPP },
00210   /* fpp trap 0xf00b..0xf03f */
00211   { "ldfps",  0xf040, 0xffc0, PDP11_OPCODE_OP,   PDP11_FPP },
00212   { "stfps",  0xf080, 0xffc0, PDP11_OPCODE_OP,   PDP11_FPP },
00213   { "stst",   0xf0c0, 0xffc0, PDP11_OPCODE_OP,   PDP11_FPP },
00214   { "clrf",   0xf100, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00215   { "tstf",   0xf140, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00216   { "absf",   0xf180, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00217   { "negf",   0xf1c0, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00218   { "mulf",   0xf200, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00219   { "modf",   0xf300, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00220   { "addf",   0xf400, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00221   { "ldf",    0xf500, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },/*movif*/
00222   { "subf",   0xf600, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00223   { "cmpf",   0xf700, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00224   { "stf",    0xf800, 0xff00, PDP11_OPCODE_AC_FOP,      PDP11_FPP },/*movfi*/
00225   { "divf",   0xf900, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00226   { "stexp",  0xfa00, 0xff00, PDP11_OPCODE_AC_OP,       PDP11_FPP },
00227   { "stcfi",  0xfb00, 0xff00, PDP11_OPCODE_AC_OP,       PDP11_FPP },
00228   { "stcff",  0xfc00, 0xff00, PDP11_OPCODE_AC_FOP,      PDP11_FPP },/* ? */
00229   { "ldexp",  0xfd00, 0xff00, PDP11_OPCODE_OP_AC,       PDP11_FPP },
00230   { "ldcif",  0xfe00, 0xff00, PDP11_OPCODE_OP_AC,       PDP11_FPP },
00231   { "ldcff",  0xff00, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },/* ? */
00232 /* This entry MUST be last; it is a "catch-all" entry that will match when no
00233  * other opcode entry matches during disassembly.
00234  */
00235   { "",              0x0000, 0x0000, PDP11_OPCODE_ILLEGAL,     PDP11_NONE },
00236 };
00237 
00238 const struct pdp11_opcode pdp11_aliases[] =
00239 {
00240   /* name,    pattern, mask,       opcode type,         insn type */
00241   { "l2d",    0x7c10, 0xfff8, PDP11_OPCODE_REG,  PDP11_CIS },
00242   { "l3d",    0x7c30, 0xfff8, PDP11_OPCODE_REG,  PDP11_CIS },
00243   { "bhis",   0x8600, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00244   { "blo",    0x8700, 0xff00, PDP11_OPCODE_DISPL,       PDP11_BASIC },
00245   { "trap",   0x8900, 0xff00, PDP11_OPCODE_IMM8, PDP11_BASIC },
00246   /* fpp xxxd alternate names to xxxf opcodes */
00247   { "clrd",   0xf100, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00248   { "tstd",   0xf140, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00249   { "absd",   0xf180, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00250   { "negd",   0xf1c0, 0xffc0, PDP11_OPCODE_FOP,  PDP11_FPP },
00251   { "muld",   0xf200, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00252   { "modd",   0xf300, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00253   { "addd",   0xf400, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00254   { "ldd",    0xf500, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },/*movif*/
00255   { "subd",   0xf600, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00256   { "cmpd",   0xf700, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00257   { "std",    0xf800, 0xff00, PDP11_OPCODE_AC_FOP,      PDP11_FPP },/*movfi*/
00258   { "divd",   0xf900, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },
00259   { "stcfl",  0xfb00, 0xff00, PDP11_OPCODE_AC_OP,       PDP11_FPP },
00260   { "stcdi",  0xfb00, 0xff00, PDP11_OPCODE_AC_OP,       PDP11_FPP },
00261   { "stcdl",  0xfb00, 0xff00, PDP11_OPCODE_AC_OP,       PDP11_FPP },
00262   { "stcfd",  0xfc00, 0xff00, PDP11_OPCODE_AC_FOP,      PDP11_FPP },/* ? */
00263   { "stcdf",  0xfc00, 0xff00, PDP11_OPCODE_AC_FOP,      PDP11_FPP },/* ? */
00264   { "ldcid",  0xfe00, 0xff00, PDP11_OPCODE_OP_AC,       PDP11_FPP },
00265   { "ldclf",  0xfe00, 0xff00, PDP11_OPCODE_OP_AC,       PDP11_FPP },
00266   { "ldcld",  0xfe00, 0xff00, PDP11_OPCODE_OP_AC,       PDP11_FPP },
00267   { "ldcfd",  0xff00, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },/* ? */
00268   { "ldcdf",  0xff00, 0xff00, PDP11_OPCODE_FOP_AC,      PDP11_FPP },/* ? */
00269 };
00270 
00271 const int pdp11_num_opcodes = sizeof pdp11_opcodes / sizeof pdp11_opcodes[0];
00272 const int pdp11_num_aliases = sizeof pdp11_aliases / sizeof pdp11_aliases[0];