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cell-binutils  2.17cvs20070401
ovl.d
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00001 #source: ovl.s
00002 #ld: -N -T ovl.lnk --emit-relocs
00003 #objdump: -D -r
00004 
00005 .*elf32-spu
00006 
00007 Disassembly of section \.text:
00008 
00009 00000100 <_start>:
00010  100:  1c f8 00 81   ai     \$1,\$1,-32
00011  104:  48 20 00 00   xor    \$0,\$0,\$0
00012  108:  24 00 00 80   stqd   \$0,0\(\$1\)
00013  10c:  24 00 40 80   stqd   \$0,16\(\$1\)
00014  110:  33 00 04 00   brsl   \$0,130 <00000000\.ovl_call\.f1_a1>       # 130
00015                      110: SPU_REL16       f1_a1
00016  114:  33 00 04 80   brsl   \$0,138 <00000000\.ovl_call\.f2_a1>       # 138
00017                      114: SPU_REL16       f2_a1
00018  118:  33 00 07 00   brsl   \$0,150 <00000000\.ovl_call\.f1_a2>       # 150
00019                      118: SPU_REL16       f1_a2
00020  11c:  42 00 ac 09   ila    \$9,344       # 158
00021                      11c: SPU_ADDR18      f2_a2
00022  120:  35 20 04 80   bisl   \$0,\$9
00023  124:  1c 08 00 81   ai     \$1,\$1,32    # 20
00024  128:  32 7f fb 00   br     100 <_start>  # 100
00025                      128: SPU_REL16       _start
00026 
00027 0000012c <f0>:
00028  12c:  35 00 00 00   bi     \$0
00029 00000130 <00000000\.ovl_call\.f1_a1>:
00030  130:  42 02 00 4f   ila    \$79,1024     # 400
00031  134:  32 00 02 80   br     148 .*
00032 00000138 <00000000\.ovl_call\.f2_a1>:
00033  138:  42 02 02 4f   ila    \$79,1028     # 404
00034  13c:  32 00 01 80   br     148 .*
00035 00000140 <00000000\.ovl_call\.f4_a1>:
00036  140:  42 02 08 4f   ila    \$79,1040     # 410
00037  144:  40 20 00 00   nop    \$0
00038  148:  42 00 00 ce   ila    \$78,1
00039  14c:  32 00 0a 80   br     1a0 <__ovly_load>    # 1a0
00040 00000150 <00000000\.ovl_call\.f1_a2>:
00041  150:  42 02 00 4f   ila    \$79,1024     # 400
00042  154:  32 00 02 80   br     168 .*
00043 00000158 <00000000\.ovl_call\.f2_a2>:
00044  158:  42 02 12 4f   ila    \$79,1060     # 424
00045  15c:  32 00 01 80   br     168 .*
00046 00000160 <00000000\.ovl_call\.14:8>:
00047  160:  42 02 1a 4f   ila    \$79,1076     # 434
00048  164:  40 20 00 00   nop    \$0
00049  168:  42 00 01 4e   ila    \$78,2
00050  16c:  32 00 06 80   br     1a0 <__ovly_load>    # 1a0
00051 #...
00052 [0-9a-f]+ <__ovly_return>:
00053 [0-9a-f ]+:   3f e1 00 4e   shlqbyi       \$78,\$0,4
00054 [0-9a-f ]+:   3f e2 00 4f   shlqbyi       \$79,\$0,8
00055 [0-9a-f ]+:   25 00 27 ce   biz    \$78,\$79
00056 
00057 [0-9a-f]+ <__ovly_load>:
00058 #...
00059 [0-9a-f]+ <_ovly_debug_event>:
00060 #...
00061 Disassembly of section \.ov_a1:
00062 
00063 00000400 <f1_a1>:
00064  400:  32 00 01 80   br     40c <f3_a1>   # 40c
00065                      400: SPU_REL16       f3_a1
00066 
00067 00000404 <f2_a1>:
00068  404:  42 00 a0 03   ila    \$3,320       # 140
00069                      404: SPU_ADDR18      f4_a1
00070  408:  35 00 00 00   bi     \$0
00071 
00072 0000040c <f3_a1>:
00073  40c:  35 00 00 00   bi     \$0
00074 
00075 00000410 <f4_a1>:
00076  410:  35 00 00 00   bi     \$0
00077        \.\.\.
00078 Disassembly of section \.ov_a2:
00079 
00080 00000400 <f1_a2>:
00081  400:  24 00 40 80   stqd   \$0,16\(\$1\)
00082  404:  24 ff 80 81   stqd   \$1,-32\(\$1\)
00083  408:  1c f8 00 81   ai     \$1,\$1,-32
00084  40c:  33 7f a4 00   brsl   \$0,12c <f0>  # 12c
00085                      40c: SPU_REL16       f0
00086  410:  33 7f a4 00   brsl   \$0,130 <00000000\.ovl_call\.f1_a1>       # 130
00087                      410: SPU_REL16       f1_a1
00088  414:  33 00 03 80   brsl   \$0,430 <f3_a2>      # 430
00089                      414: SPU_REL16       f3_a2
00090  418:  34 00 c0 80   lqd    \$0,48\(\$1\) # 30
00091  41c:  1c 08 00 81   ai     \$1,\$1,32    # 20
00092  420:  35 00 00 00   bi     \$0
00093 
00094 00000424 <f2_a2>:
00095  424:  41 00 00 03   ilhu   \$3,0
00096                      424: SPU_ADDR16_HI   f4_a2
00097  428:  60 80 b0 03   iohl   \$3,352       # 160
00098                      428: SPU_ADDR16_LO   f4_a2
00099  42c:  35 00 00 00   bi     \$0
00100 
00101 00000430 <f3_a2>:
00102  430:  35 00 00 00   bi     \$0
00103 
00104 00000434 <f4_a2>:
00105  434:  32 7f ff 80   br     430 <f3_a2>   # 430
00106                      434: SPU_REL16       f3_a2
00107        \.\.\.
00108 Disassembly of section .data:
00109 
00110 00000440 <_ovly_table>:
00111  440:  00 00 04 00 .*
00112  444:  00 00 00 20 .*
00113  448:  00 00 02 e0 .*
00114  44c:  00 00 00 01 .*
00115  450:  00 00 04 00 .*
00116  454:  00 00 00 40 .*
00117  458:  00 00 03 00 .*
00118  45c:  00 00 00 01 .*
00119 
00120 00000460 <_ovly_buf_table>:
00121  460:  00 00 00 00 .*
00122 Disassembly of section \.toe:
00123 
00124 00000470 <_EAR_>:
00125        \.\.\.
00126 Disassembly of section \.note\.spu_name:
00127 
00128 .* <\.note\.spu_name>:
00129 .*:    00 00 00 08 .*
00130 .*:    00 00 00 0c .*
00131 .*:    00 00 00 01 .*
00132 .*:    53 50 55 4e .*
00133 .*:    41 4d 45 00 .*
00134 .*:    74 6d 70 64 .*
00135 .*:    69 72 2f 64 .*
00136 .*:    75 6d 70 00 .*