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cell-binutils  2.17cvs20070401
openrisc-ibld.c
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00001 /* Instruction building/extraction support for openrisc. -*- C -*-
00002 
00003    THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
00004    - the resultant file is machine generated, cgen-ibld.in isn't
00005 
00006    Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
00007    Free Software Foundation, Inc.
00008 
00009    This file is part of the GNU Binutils and GDB, the GNU debugger.
00010 
00011    This program is free software; you can redistribute it and/or modify
00012    it under the terms of the GNU General Public License as published by
00013    the Free Software Foundation; either version 2, or (at your option)
00014    any later version.
00015 
00016    This program is distributed in the hope that it will be useful,
00017    but WITHOUT ANY WARRANTY; without even the implied warranty of
00018    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00019    GNU General Public License for more details.
00020 
00021    You should have received a copy of the GNU General Public License
00022    along with this program; if not, write to the Free Software Foundation, Inc.,
00023    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00024 
00025 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
00026    Keep that in mind.  */
00027 
00028 #include "sysdep.h"
00029 #include <stdio.h>
00030 #include "ansidecl.h"
00031 #include "dis-asm.h"
00032 #include "bfd.h"
00033 #include "symcat.h"
00034 #include "openrisc-desc.h"
00035 #include "openrisc-opc.h"
00036 #include "opintl.h"
00037 #include "safe-ctype.h"
00038 
00039 #undef  min
00040 #define min(a,b) ((a) < (b) ? (a) : (b))
00041 #undef  max
00042 #define max(a,b) ((a) > (b) ? (a) : (b))
00043 
00044 /* Used by the ifield rtx function.  */
00045 #define FLD(f) (fields->f)
00046 
00047 static const char * insert_normal
00048   (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
00049    unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
00050 static const char * insert_insn_normal
00051   (CGEN_CPU_DESC, const CGEN_INSN *,
00052    CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
00053 static int extract_normal
00054   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
00055    unsigned int, unsigned int, unsigned int, unsigned int,
00056    unsigned int, unsigned int, bfd_vma, long *);
00057 static int extract_insn_normal
00058   (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
00059    CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
00060 #if CGEN_INT_INSN_P
00061 static void put_insn_int_value
00062   (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
00063 #endif
00064 #if ! CGEN_INT_INSN_P
00065 static CGEN_INLINE void insert_1
00066   (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
00067 static CGEN_INLINE int fill_cache
00068   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *,  int, int, bfd_vma);
00069 static CGEN_INLINE long extract_1
00070   (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
00071 #endif
00072 
00073 /* Operand insertion.  */
00074 
00075 #if ! CGEN_INT_INSN_P
00076 
00077 /* Subroutine of insert_normal.  */
00078 
00079 static CGEN_INLINE void
00080 insert_1 (CGEN_CPU_DESC cd,
00081          unsigned long value,
00082          int start,
00083          int length,
00084          int word_length,
00085          unsigned char *bufp)
00086 {
00087   unsigned long x,mask;
00088   int shift;
00089 
00090   x = cgen_get_insn_value (cd, bufp, word_length);
00091 
00092   /* Written this way to avoid undefined behaviour.  */
00093   mask = (((1L << (length - 1)) - 1) << 1) | 1;
00094   if (CGEN_INSN_LSB0_P)
00095     shift = (start + 1) - length;
00096   else
00097     shift = (word_length - (start + length));
00098   x = (x & ~(mask << shift)) | ((value & mask) << shift);
00099 
00100   cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
00101 }
00102 
00103 #endif /* ! CGEN_INT_INSN_P */
00104 
00105 /* Default insertion routine.
00106 
00107    ATTRS is a mask of the boolean attributes.
00108    WORD_OFFSET is the offset in bits from the start of the insn of the value.
00109    WORD_LENGTH is the length of the word in bits in which the value resides.
00110    START is the starting bit number in the word, architecture origin.
00111    LENGTH is the length of VALUE in bits.
00112    TOTAL_LENGTH is the total length of the insn in bits.
00113 
00114    The result is an error message or NULL if success.  */
00115 
00116 /* ??? This duplicates functionality with bfd's howto table and
00117    bfd_install_relocation.  */
00118 /* ??? This doesn't handle bfd_vma's.  Create another function when
00119    necessary.  */
00120 
00121 static const char *
00122 insert_normal (CGEN_CPU_DESC cd,
00123               long value,
00124               unsigned int attrs,
00125               unsigned int word_offset,
00126               unsigned int start,
00127               unsigned int length,
00128               unsigned int word_length,
00129               unsigned int total_length,
00130               CGEN_INSN_BYTES_PTR buffer)
00131 {
00132   static char errbuf[100];
00133   /* Written this way to avoid undefined behaviour.  */
00134   unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
00135 
00136   /* If LENGTH is zero, this operand doesn't contribute to the value.  */
00137   if (length == 0)
00138     return NULL;
00139 
00140   if (word_length > 32)
00141     abort ();
00142 
00143   /* For architectures with insns smaller than the base-insn-bitsize,
00144      word_length may be too big.  */
00145   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
00146     {
00147       if (word_offset == 0
00148          && word_length > total_length)
00149        word_length = total_length;
00150     }
00151 
00152   /* Ensure VALUE will fit.  */
00153   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
00154     {
00155       long minval = - (1L << (length - 1));
00156       unsigned long maxval = mask;
00157       
00158       if ((value > 0 && (unsigned long) value > maxval)
00159          || value < minval)
00160        {
00161          /* xgettext:c-format */
00162          sprintf (errbuf,
00163                  _("operand out of range (%ld not between %ld and %lu)"),
00164                  value, minval, maxval);
00165          return errbuf;
00166        }
00167     }
00168   else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
00169     {
00170       unsigned long maxval = mask;
00171       unsigned long val = (unsigned long) value;
00172 
00173       /* For hosts with a word size > 32 check to see if value has been sign
00174         extended beyond 32 bits.  If so then ignore these higher sign bits
00175         as the user is attempting to store a 32-bit signed value into an
00176         unsigned 32-bit field which is allowed.  */
00177       if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
00178        val &= 0xFFFFFFFF;
00179 
00180       if (val > maxval)
00181        {
00182          /* xgettext:c-format */
00183          sprintf (errbuf,
00184                  _("operand out of range (0x%lx not between 0 and 0x%lx)"),
00185                  val, maxval);
00186          return errbuf;
00187        }
00188     }
00189   else
00190     {
00191       if (! cgen_signed_overflow_ok_p (cd))
00192        {
00193          long minval = - (1L << (length - 1));
00194          long maxval =   (1L << (length - 1)) - 1;
00195          
00196          if (value < minval || value > maxval)
00197            {
00198              sprintf
00199               /* xgettext:c-format */
00200               (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
00201                value, minval, maxval);
00202              return errbuf;
00203            }
00204        }
00205     }
00206 
00207 #if CGEN_INT_INSN_P
00208 
00209   {
00210     int shift;
00211 
00212     if (CGEN_INSN_LSB0_P)
00213       shift = (word_offset + start + 1) - length;
00214     else
00215       shift = total_length - (word_offset + start + length);
00216     *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
00217   }
00218 
00219 #else /* ! CGEN_INT_INSN_P */
00220 
00221   {
00222     unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
00223 
00224     insert_1 (cd, value, start, length, word_length, bufp);
00225   }
00226 
00227 #endif /* ! CGEN_INT_INSN_P */
00228 
00229   return NULL;
00230 }
00231 
00232 /* Default insn builder (insert handler).
00233    The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
00234    that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
00235    recorded in host byte order, otherwise BUFFER is an array of bytes
00236    and the value is recorded in target byte order).
00237    The result is an error message or NULL if success.  */
00238 
00239 static const char *
00240 insert_insn_normal (CGEN_CPU_DESC cd,
00241                   const CGEN_INSN * insn,
00242                   CGEN_FIELDS * fields,
00243                   CGEN_INSN_BYTES_PTR buffer,
00244                   bfd_vma pc)
00245 {
00246   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
00247   unsigned long value;
00248   const CGEN_SYNTAX_CHAR_TYPE * syn;
00249 
00250   CGEN_INIT_INSERT (cd);
00251   value = CGEN_INSN_BASE_VALUE (insn);
00252 
00253   /* If we're recording insns as numbers (rather than a string of bytes),
00254      target byte order handling is deferred until later.  */
00255 
00256 #if CGEN_INT_INSN_P
00257 
00258   put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
00259                     CGEN_FIELDS_BITSIZE (fields), value);
00260 
00261 #else
00262 
00263   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
00264                                    (unsigned) CGEN_FIELDS_BITSIZE (fields)),
00265                      value);
00266 
00267 #endif /* ! CGEN_INT_INSN_P */
00268 
00269   /* ??? It would be better to scan the format's fields.
00270      Still need to be able to insert a value based on the operand though;
00271      e.g. storing a branch displacement that got resolved later.
00272      Needs more thought first.  */
00273 
00274   for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
00275     {
00276       const char *errmsg;
00277 
00278       if (CGEN_SYNTAX_CHAR_P (* syn))
00279        continue;
00280 
00281       errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
00282                                    fields, buffer, pc);
00283       if (errmsg)
00284        return errmsg;
00285     }
00286 
00287   return NULL;
00288 }
00289 
00290 #if CGEN_INT_INSN_P
00291 /* Cover function to store an insn value into an integral insn.  Must go here
00292    because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
00293 
00294 static void
00295 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00296                   CGEN_INSN_BYTES_PTR buf,
00297                   int length,
00298                   int insn_length,
00299                   CGEN_INSN_INT value)
00300 {
00301   /* For architectures with insns smaller than the base-insn-bitsize,
00302      length may be too big.  */
00303   if (length > insn_length)
00304     *buf = value;
00305   else
00306     {
00307       int shift = insn_length - length;
00308       /* Written this way to avoid undefined behaviour.  */
00309       CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
00310 
00311       *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
00312     }
00313 }
00314 #endif
00315 
00316 /* Operand extraction.  */
00317 
00318 #if ! CGEN_INT_INSN_P
00319 
00320 /* Subroutine of extract_normal.
00321    Ensure sufficient bytes are cached in EX_INFO.
00322    OFFSET is the offset in bytes from the start of the insn of the value.
00323    BYTES is the length of the needed value.
00324    Returns 1 for success, 0 for failure.  */
00325 
00326 static CGEN_INLINE int
00327 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00328            CGEN_EXTRACT_INFO *ex_info,
00329            int offset,
00330            int bytes,
00331            bfd_vma pc)
00332 {
00333   /* It's doubtful that the middle part has already been fetched so
00334      we don't optimize that case.  kiss.  */
00335   unsigned int mask;
00336   disassemble_info *info = (disassemble_info *) ex_info->dis_info;
00337 
00338   /* First do a quick check.  */
00339   mask = (1 << bytes) - 1;
00340   if (((ex_info->valid >> offset) & mask) == mask)
00341     return 1;
00342 
00343   /* Search for the first byte we need to read.  */
00344   for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
00345     if (! (mask & ex_info->valid))
00346       break;
00347 
00348   if (bytes)
00349     {
00350       int status;
00351 
00352       pc += offset;
00353       status = (*info->read_memory_func)
00354        (pc, ex_info->insn_bytes + offset, bytes, info);
00355 
00356       if (status != 0)
00357        {
00358          (*info->memory_error_func) (status, pc, info);
00359          return 0;
00360        }
00361 
00362       ex_info->valid |= ((1 << bytes) - 1) << offset;
00363     }
00364 
00365   return 1;
00366 }
00367 
00368 /* Subroutine of extract_normal.  */
00369 
00370 static CGEN_INLINE long
00371 extract_1 (CGEN_CPU_DESC cd,
00372           CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
00373           int start,
00374           int length,
00375           int word_length,
00376           unsigned char *bufp,
00377           bfd_vma pc ATTRIBUTE_UNUSED)
00378 {
00379   unsigned long x;
00380   int shift;
00381 
00382   x = cgen_get_insn_value (cd, bufp, word_length);
00383 
00384   if (CGEN_INSN_LSB0_P)
00385     shift = (start + 1) - length;
00386   else
00387     shift = (word_length - (start + length));
00388   return x >> shift;
00389 }
00390 
00391 #endif /* ! CGEN_INT_INSN_P */
00392 
00393 /* Default extraction routine.
00394 
00395    INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
00396    or sometimes less for cases like the m32r where the base insn size is 32
00397    but some insns are 16 bits.
00398    ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
00399    but for generality we take a bitmask of all of them.
00400    WORD_OFFSET is the offset in bits from the start of the insn of the value.
00401    WORD_LENGTH is the length of the word in bits in which the value resides.
00402    START is the starting bit number in the word, architecture origin.
00403    LENGTH is the length of VALUE in bits.
00404    TOTAL_LENGTH is the total length of the insn in bits.
00405 
00406    Returns 1 for success, 0 for failure.  */
00407 
00408 /* ??? The return code isn't properly used.  wip.  */
00409 
00410 /* ??? This doesn't handle bfd_vma's.  Create another function when
00411    necessary.  */
00412 
00413 static int
00414 extract_normal (CGEN_CPU_DESC cd,
00415 #if ! CGEN_INT_INSN_P
00416               CGEN_EXTRACT_INFO *ex_info,
00417 #else
00418               CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
00419 #endif
00420               CGEN_INSN_INT insn_value,
00421               unsigned int attrs,
00422               unsigned int word_offset,
00423               unsigned int start,
00424               unsigned int length,
00425               unsigned int word_length,
00426               unsigned int total_length,
00427 #if ! CGEN_INT_INSN_P
00428               bfd_vma pc,
00429 #else
00430               bfd_vma pc ATTRIBUTE_UNUSED,
00431 #endif
00432               long *valuep)
00433 {
00434   long value, mask;
00435 
00436   /* If LENGTH is zero, this operand doesn't contribute to the value
00437      so give it a standard value of zero.  */
00438   if (length == 0)
00439     {
00440       *valuep = 0;
00441       return 1;
00442     }
00443 
00444   if (word_length > 32)
00445     abort ();
00446 
00447   /* For architectures with insns smaller than the insn-base-bitsize,
00448      word_length may be too big.  */
00449   if (cd->min_insn_bitsize < cd->base_insn_bitsize)
00450     {
00451       if (word_offset + word_length > total_length)
00452        word_length = total_length - word_offset;
00453     }
00454 
00455   /* Does the value reside in INSN_VALUE, and at the right alignment?  */
00456 
00457   if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
00458     {
00459       if (CGEN_INSN_LSB0_P)
00460        value = insn_value >> ((word_offset + start + 1) - length);
00461       else
00462        value = insn_value >> (total_length - ( word_offset + start + length));
00463     }
00464 
00465 #if ! CGEN_INT_INSN_P
00466 
00467   else
00468     {
00469       unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
00470 
00471       if (word_length > 32)
00472        abort ();
00473 
00474       if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
00475        return 0;
00476 
00477       value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
00478     }
00479 
00480 #endif /* ! CGEN_INT_INSN_P */
00481 
00482   /* Written this way to avoid undefined behaviour.  */
00483   mask = (((1L << (length - 1)) - 1) << 1) | 1;
00484 
00485   value &= mask;
00486   /* sign extend? */
00487   if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
00488       && (value & (1L << (length - 1))))
00489     value |= ~mask;
00490 
00491   *valuep = value;
00492 
00493   return 1;
00494 }
00495 
00496 /* Default insn extractor.
00497 
00498    INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
00499    The extracted fields are stored in FIELDS.
00500    EX_INFO is used to handle reading variable length insns.
00501    Return the length of the insn in bits, or 0 if no match,
00502    or -1 if an error occurs fetching data (memory_error_func will have
00503    been called).  */
00504 
00505 static int
00506 extract_insn_normal (CGEN_CPU_DESC cd,
00507                    const CGEN_INSN *insn,
00508                    CGEN_EXTRACT_INFO *ex_info,
00509                    CGEN_INSN_INT insn_value,
00510                    CGEN_FIELDS *fields,
00511                    bfd_vma pc)
00512 {
00513   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
00514   const CGEN_SYNTAX_CHAR_TYPE *syn;
00515 
00516   CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
00517 
00518   CGEN_INIT_EXTRACT (cd);
00519 
00520   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
00521     {
00522       int length;
00523 
00524       if (CGEN_SYNTAX_CHAR_P (*syn))
00525        continue;
00526 
00527       length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
00528                                    ex_info, insn_value, fields, pc);
00529       if (length <= 0)
00530        return length;
00531     }
00532 
00533   /* We recognized and successfully extracted this insn.  */
00534   return CGEN_INSN_BITSIZE (insn);
00535 }
00536 
00537 /* Machine generated code added here.  */
00538 
00539 const char * openrisc_cgen_insert_operand
00540   (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
00541 
00542 /* Main entry point for operand insertion.
00543 
00544    This function is basically just a big switch statement.  Earlier versions
00545    used tables to look up the function to use, but
00546    - if the table contains both assembler and disassembler functions then
00547      the disassembler contains much of the assembler and vice-versa,
00548    - there's a lot of inlining possibilities as things grow,
00549    - using a switch statement avoids the function call overhead.
00550 
00551    This function could be moved into `parse_insn_normal', but keeping it
00552    separate makes clear the interface between `parse_insn_normal' and each of
00553    the handlers.  It's also needed by GAS to insert operands that couldn't be
00554    resolved during parsing.  */
00555 
00556 const char *
00557 openrisc_cgen_insert_operand (CGEN_CPU_DESC cd,
00558                           int opindex,
00559                           CGEN_FIELDS * fields,
00560                           CGEN_INSN_BYTES_PTR buffer,
00561                           bfd_vma pc ATTRIBUTE_UNUSED)
00562 {
00563   const char * errmsg = NULL;
00564   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
00565 
00566   switch (opindex)
00567     {
00568     case OPENRISC_OPERAND_ABS_26 :
00569       {
00570         long value = fields->f_abs26;
00571         value = ((unsigned int) (pc) >> (2));
00572         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_ABS_ADDR), 0, 25, 26, 32, total_length, buffer);
00573       }
00574       break;
00575     case OPENRISC_OPERAND_DISP_26 :
00576       {
00577         long value = fields->f_disp26;
00578         value = ((int) (((value) - (pc))) >> (2));
00579         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
00580       }
00581       break;
00582     case OPENRISC_OPERAND_HI16 :
00583       errmsg = insert_normal (cd, fields->f_simm16, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer);
00584       break;
00585     case OPENRISC_OPERAND_LO16 :
00586       errmsg = insert_normal (cd, fields->f_lo16, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer);
00587       break;
00588     case OPENRISC_OPERAND_OP_F_23 :
00589       errmsg = insert_normal (cd, fields->f_op4, 0, 0, 23, 3, 32, total_length, buffer);
00590       break;
00591     case OPENRISC_OPERAND_OP_F_3 :
00592       errmsg = insert_normal (cd, fields->f_op5, 0, 0, 25, 5, 32, total_length, buffer);
00593       break;
00594     case OPENRISC_OPERAND_RA :
00595       errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
00596       break;
00597     case OPENRISC_OPERAND_RB :
00598       errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
00599       break;
00600     case OPENRISC_OPERAND_RD :
00601       errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
00602       break;
00603     case OPENRISC_OPERAND_SIMM_16 :
00604       errmsg = insert_normal (cd, fields->f_simm16, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer);
00605       break;
00606     case OPENRISC_OPERAND_UI16NC :
00607       {
00608 {
00609   FLD (f_i16_2) = ((((unsigned int) (FLD (f_i16nc)) >> (11))) & (31));
00610   FLD (f_i16_1) = ((FLD (f_i16nc)) & (2047));
00611 }
00612         errmsg = insert_normal (cd, fields->f_i16_1, 0, 0, 10, 11, 32, total_length, buffer);
00613         if (errmsg)
00614           break;
00615         errmsg = insert_normal (cd, fields->f_i16_2, 0, 0, 25, 5, 32, total_length, buffer);
00616         if (errmsg)
00617           break;
00618       }
00619       break;
00620     case OPENRISC_OPERAND_UIMM_16 :
00621       errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 15, 16, 32, total_length, buffer);
00622       break;
00623     case OPENRISC_OPERAND_UIMM_5 :
00624       errmsg = insert_normal (cd, fields->f_uimm5, 0, 0, 4, 5, 32, total_length, buffer);
00625       break;
00626 
00627     default :
00628       /* xgettext:c-format */
00629       fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
00630               opindex);
00631       abort ();
00632   }
00633 
00634   return errmsg;
00635 }
00636 
00637 int openrisc_cgen_extract_operand
00638   (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
00639 
00640 /* Main entry point for operand extraction.
00641    The result is <= 0 for error, >0 for success.
00642    ??? Actual values aren't well defined right now.
00643 
00644    This function is basically just a big switch statement.  Earlier versions
00645    used tables to look up the function to use, but
00646    - if the table contains both assembler and disassembler functions then
00647      the disassembler contains much of the assembler and vice-versa,
00648    - there's a lot of inlining possibilities as things grow,
00649    - using a switch statement avoids the function call overhead.
00650 
00651    This function could be moved into `print_insn_normal', but keeping it
00652    separate makes clear the interface between `print_insn_normal' and each of
00653    the handlers.  */
00654 
00655 int
00656 openrisc_cgen_extract_operand (CGEN_CPU_DESC cd,
00657                           int opindex,
00658                           CGEN_EXTRACT_INFO *ex_info,
00659                           CGEN_INSN_INT insn_value,
00660                           CGEN_FIELDS * fields,
00661                           bfd_vma pc)
00662 {
00663   /* Assume success (for those operands that are nops).  */
00664   int length = 1;
00665   unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
00666 
00667   switch (opindex)
00668     {
00669     case OPENRISC_OPERAND_ABS_26 :
00670       {
00671         long value;
00672         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_ABS_ADDR), 0, 25, 26, 32, total_length, pc, & value);
00673         value = ((value) << (2));
00674         fields->f_abs26 = value;
00675       }
00676       break;
00677     case OPENRISC_OPERAND_DISP_26 :
00678       {
00679         long value;
00680         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value);
00681         value = ((((value) << (2))) + (pc));
00682         fields->f_disp26 = value;
00683       }
00684       break;
00685     case OPENRISC_OPERAND_HI16 :
00686       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_simm16);
00687       break;
00688     case OPENRISC_OPERAND_LO16 :
00689       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_lo16);
00690       break;
00691     case OPENRISC_OPERAND_OP_F_23 :
00692       length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 3, 32, total_length, pc, & fields->f_op4);
00693       break;
00694     case OPENRISC_OPERAND_OP_F_3 :
00695       length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_op5);
00696       break;
00697     case OPENRISC_OPERAND_RA :
00698       length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
00699       break;
00700     case OPENRISC_OPERAND_RB :
00701       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
00702       break;
00703     case OPENRISC_OPERAND_RD :
00704       length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
00705       break;
00706     case OPENRISC_OPERAND_SIMM_16 :
00707       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & fields->f_simm16);
00708       break;
00709     case OPENRISC_OPERAND_UI16NC :
00710       {
00711         length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_i16_1);
00712         if (length <= 0) break;
00713         length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_i16_2);
00714         if (length <= 0) break;
00715 {
00716   FLD (f_i16nc) = openrisc_sign_extend_16bit (((((FLD (f_i16_2)) << (11))) | (FLD (f_i16_1))));
00717 }
00718       }
00719       break;
00720     case OPENRISC_OPERAND_UIMM_16 :
00721       length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm16);
00722       break;
00723     case OPENRISC_OPERAND_UIMM_5 :
00724       length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_uimm5);
00725       break;
00726 
00727     default :
00728       /* xgettext:c-format */
00729       fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
00730               opindex);
00731       abort ();
00732     }
00733 
00734   return length;
00735 }
00736 
00737 cgen_insert_fn * const openrisc_cgen_insert_handlers[] = 
00738 {
00739   insert_insn_normal,
00740 };
00741 
00742 cgen_extract_fn * const openrisc_cgen_extract_handlers[] = 
00743 {
00744   extract_insn_normal,
00745 };
00746 
00747 int openrisc_cgen_get_int_operand     (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
00748 bfd_vma openrisc_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
00749 
00750 /* Getting values from cgen_fields is handled by a collection of functions.
00751    They are distinguished by the type of the VALUE argument they return.
00752    TODO: floating point, inlining support, remove cases where result type
00753    not appropriate.  */
00754 
00755 int
00756 openrisc_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00757                           int opindex,
00758                           const CGEN_FIELDS * fields)
00759 {
00760   int value;
00761 
00762   switch (opindex)
00763     {
00764     case OPENRISC_OPERAND_ABS_26 :
00765       value = fields->f_abs26;
00766       break;
00767     case OPENRISC_OPERAND_DISP_26 :
00768       value = fields->f_disp26;
00769       break;
00770     case OPENRISC_OPERAND_HI16 :
00771       value = fields->f_simm16;
00772       break;
00773     case OPENRISC_OPERAND_LO16 :
00774       value = fields->f_lo16;
00775       break;
00776     case OPENRISC_OPERAND_OP_F_23 :
00777       value = fields->f_op4;
00778       break;
00779     case OPENRISC_OPERAND_OP_F_3 :
00780       value = fields->f_op5;
00781       break;
00782     case OPENRISC_OPERAND_RA :
00783       value = fields->f_r2;
00784       break;
00785     case OPENRISC_OPERAND_RB :
00786       value = fields->f_r3;
00787       break;
00788     case OPENRISC_OPERAND_RD :
00789       value = fields->f_r1;
00790       break;
00791     case OPENRISC_OPERAND_SIMM_16 :
00792       value = fields->f_simm16;
00793       break;
00794     case OPENRISC_OPERAND_UI16NC :
00795       value = fields->f_i16nc;
00796       break;
00797     case OPENRISC_OPERAND_UIMM_16 :
00798       value = fields->f_uimm16;
00799       break;
00800     case OPENRISC_OPERAND_UIMM_5 :
00801       value = fields->f_uimm5;
00802       break;
00803 
00804     default :
00805       /* xgettext:c-format */
00806       fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
00807                      opindex);
00808       abort ();
00809   }
00810 
00811   return value;
00812 }
00813 
00814 bfd_vma
00815 openrisc_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00816                           int opindex,
00817                           const CGEN_FIELDS * fields)
00818 {
00819   bfd_vma value;
00820 
00821   switch (opindex)
00822     {
00823     case OPENRISC_OPERAND_ABS_26 :
00824       value = fields->f_abs26;
00825       break;
00826     case OPENRISC_OPERAND_DISP_26 :
00827       value = fields->f_disp26;
00828       break;
00829     case OPENRISC_OPERAND_HI16 :
00830       value = fields->f_simm16;
00831       break;
00832     case OPENRISC_OPERAND_LO16 :
00833       value = fields->f_lo16;
00834       break;
00835     case OPENRISC_OPERAND_OP_F_23 :
00836       value = fields->f_op4;
00837       break;
00838     case OPENRISC_OPERAND_OP_F_3 :
00839       value = fields->f_op5;
00840       break;
00841     case OPENRISC_OPERAND_RA :
00842       value = fields->f_r2;
00843       break;
00844     case OPENRISC_OPERAND_RB :
00845       value = fields->f_r3;
00846       break;
00847     case OPENRISC_OPERAND_RD :
00848       value = fields->f_r1;
00849       break;
00850     case OPENRISC_OPERAND_SIMM_16 :
00851       value = fields->f_simm16;
00852       break;
00853     case OPENRISC_OPERAND_UI16NC :
00854       value = fields->f_i16nc;
00855       break;
00856     case OPENRISC_OPERAND_UIMM_16 :
00857       value = fields->f_uimm16;
00858       break;
00859     case OPENRISC_OPERAND_UIMM_5 :
00860       value = fields->f_uimm5;
00861       break;
00862 
00863     default :
00864       /* xgettext:c-format */
00865       fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
00866                      opindex);
00867       abort ();
00868   }
00869 
00870   return value;
00871 }
00872 
00873 void openrisc_cgen_set_int_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
00874 void openrisc_cgen_set_vma_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
00875 
00876 /* Stuffing values in cgen_fields is handled by a collection of functions.
00877    They are distinguished by the type of the VALUE argument they accept.
00878    TODO: floating point, inlining support, remove cases where argument type
00879    not appropriate.  */
00880 
00881 void
00882 openrisc_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00883                           int opindex,
00884                           CGEN_FIELDS * fields,
00885                           int value)
00886 {
00887   switch (opindex)
00888     {
00889     case OPENRISC_OPERAND_ABS_26 :
00890       fields->f_abs26 = value;
00891       break;
00892     case OPENRISC_OPERAND_DISP_26 :
00893       fields->f_disp26 = value;
00894       break;
00895     case OPENRISC_OPERAND_HI16 :
00896       fields->f_simm16 = value;
00897       break;
00898     case OPENRISC_OPERAND_LO16 :
00899       fields->f_lo16 = value;
00900       break;
00901     case OPENRISC_OPERAND_OP_F_23 :
00902       fields->f_op4 = value;
00903       break;
00904     case OPENRISC_OPERAND_OP_F_3 :
00905       fields->f_op5 = value;
00906       break;
00907     case OPENRISC_OPERAND_RA :
00908       fields->f_r2 = value;
00909       break;
00910     case OPENRISC_OPERAND_RB :
00911       fields->f_r3 = value;
00912       break;
00913     case OPENRISC_OPERAND_RD :
00914       fields->f_r1 = value;
00915       break;
00916     case OPENRISC_OPERAND_SIMM_16 :
00917       fields->f_simm16 = value;
00918       break;
00919     case OPENRISC_OPERAND_UI16NC :
00920       fields->f_i16nc = value;
00921       break;
00922     case OPENRISC_OPERAND_UIMM_16 :
00923       fields->f_uimm16 = value;
00924       break;
00925     case OPENRISC_OPERAND_UIMM_5 :
00926       fields->f_uimm5 = value;
00927       break;
00928 
00929     default :
00930       /* xgettext:c-format */
00931       fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
00932                      opindex);
00933       abort ();
00934   }
00935 }
00936 
00937 void
00938 openrisc_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00939                           int opindex,
00940                           CGEN_FIELDS * fields,
00941                           bfd_vma value)
00942 {
00943   switch (opindex)
00944     {
00945     case OPENRISC_OPERAND_ABS_26 :
00946       fields->f_abs26 = value;
00947       break;
00948     case OPENRISC_OPERAND_DISP_26 :
00949       fields->f_disp26 = value;
00950       break;
00951     case OPENRISC_OPERAND_HI16 :
00952       fields->f_simm16 = value;
00953       break;
00954     case OPENRISC_OPERAND_LO16 :
00955       fields->f_lo16 = value;
00956       break;
00957     case OPENRISC_OPERAND_OP_F_23 :
00958       fields->f_op4 = value;
00959       break;
00960     case OPENRISC_OPERAND_OP_F_3 :
00961       fields->f_op5 = value;
00962       break;
00963     case OPENRISC_OPERAND_RA :
00964       fields->f_r2 = value;
00965       break;
00966     case OPENRISC_OPERAND_RB :
00967       fields->f_r3 = value;
00968       break;
00969     case OPENRISC_OPERAND_RD :
00970       fields->f_r1 = value;
00971       break;
00972     case OPENRISC_OPERAND_SIMM_16 :
00973       fields->f_simm16 = value;
00974       break;
00975     case OPENRISC_OPERAND_UI16NC :
00976       fields->f_i16nc = value;
00977       break;
00978     case OPENRISC_OPERAND_UIMM_16 :
00979       fields->f_uimm16 = value;
00980       break;
00981     case OPENRISC_OPERAND_UIMM_5 :
00982       fields->f_uimm5 = value;
00983       break;
00984 
00985     default :
00986       /* xgettext:c-format */
00987       fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
00988                      opindex);
00989       abort ();
00990   }
00991 }
00992 
00993 /* Function to call before using the instruction builder tables.  */
00994 
00995 void
00996 openrisc_cgen_init_ibld_table (CGEN_CPU_DESC cd)
00997 {
00998   cd->insert_handlers = & openrisc_cgen_insert_handlers[0];
00999   cd->extract_handlers = & openrisc_cgen_extract_handlers[0];
01000 
01001   cd->insert_operand = openrisc_cgen_insert_operand;
01002   cd->extract_operand = openrisc_cgen_extract_operand;
01003 
01004   cd->get_int_operand = openrisc_cgen_get_int_operand;
01005   cd->set_int_operand = openrisc_cgen_set_int_operand;
01006   cd->get_vma_operand = openrisc_cgen_get_vma_operand;
01007   cd->set_vma_operand = openrisc_cgen_set_vma_operand;
01008 }