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cell-binutils  2.17cvs20070401
tic54x.h
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00001 /* tic54x.h -- Header file for TI TMS320C54X opcode table
00002    Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
00003    Written by Timothy Wall (twall@cygnus.com)
00004 
00005 This file is part of GDB, GAS, and the GNU binutils.
00006 
00007 GDB, GAS, and the GNU binutils are free software; you can redistribute
00008 them and/or modify them under the terms of the GNU General Public
00009 License as published by the Free Software Foundation; either version
00010 1, or (at your option) any later version.
00011 
00012 GDB, GAS, and the GNU binutils are distributed in the hope that they
00013 will be useful, but WITHOUT ANY WARRANTY; without even the implied
00014 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
00015 the GNU General Public License for more details.
00016 
00017 You should have received a copy of the GNU General Public License
00018 along with this file; see the file COPYING.  If not, write to the Free
00019 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
00020 02110-1301, USA.  */
00021 
00022 #ifndef _opcode_tic54x_h_
00023 #define _opcode_tic54x_h_
00024 
00025 typedef struct _symbol
00026 {
00027   const char *name;
00028   unsigned short value;
00029 } symbol;
00030 
00031 enum optype {
00032   OPT = 0x8000,
00033   OP_None = 0x0,
00034 
00035   OP_Xmem, /* AR3 or AR4, indirect */
00036   OP_Ymem, /* AR3 or AR4, indirect */
00037   OP_pmad, /* PROG mem, direct */
00038   OP_dmad, /* DATA mem, direct */
00039   OP_Smem,
00040   OP_Lmem, /* 32-bit single-addressed (direct/indirect) */
00041   OP_MMR,
00042   OP_PA,
00043   OP_Sind,
00044   OP_xpmad,
00045   OP_xpmad_ms7,
00046   OP_MMRX,
00047   OP_MMRY,
00048 
00049   OP_SRC1, /* src accumulator in bit 8 */
00050   OP_SRC, /* src accumulator in bit 9 */
00051   OP_RND, /* rounded result dst accumulator, opposite of bit 8 */
00052   OP_DST, /* dst accumulator in bit 8 */
00053   OP_ARX, /* arX in bits 0-3 */
00054   OP_SHIFT, /* -16 to 15 (SHIFT), bits 0-4 */
00055   OP_SHFT, /*   0 to 15 (SHIFT1 in summary), bits 0-3 */
00056   OP_B, /* ACC B only */
00057   OP_A, /* ACC A only */
00058 
00059   OP_lk, /* 16-bit immediate, '#' optional */
00060   OP_TS,
00061   OP_k8, /* -128 <= k <= 128 */
00062   OP_16, /* literal "16" */
00063   OP_BITC, /* 0 to 16 */
00064   OP_CC, /* condition code */
00065   OP_CC2, /* 4-bit condition code */
00066   OP_CC3, /* 2-bit condition code */
00067   OP_123, /* 1, 2, or 3 */
00068   OP_031, /* 0-31, numeric */
00069   OP_k5, /* 0 to 31 */
00070   OP_k8u, /* 0 to 255 */
00071   OP_ASM, /* "ASM" */
00072   OP_T, /* "T" */
00073   OP_DP, /* "DP" */
00074   OP_ARP, /* "ARP" */
00075   OP_k3, /* 0-7 */
00076   OP_lku, /* 0 to 65535 */
00077   OP_N, /* 0/1 or ST0/ST1 */
00078   OP_SBIT, /* status bit or 0-15 */
00079   OP_12, /* one or two */
00080   OP_k9, /* 9 bits of data page (DP) address */
00081   OP_TRN, /* "TRN" */
00082 
00083 };
00084 
00085 typedef struct _template
00086 {
00087   /* The opcode mnemonic */
00088   const char *name;
00089   unsigned int words; /* insn size in words */
00090   int minops, maxops; /* min/max operand count */
00091   /* The significant bits in the opcode.  Other bits are zero. 
00092      Instructions with more than 16 bits of opcode store the rest in the upper
00093      16 bits.
00094    */
00095   unsigned short opcode;
00096 #define INDIRECT(OP)    ((OP)&0x80)
00097 #define MOD(OP)         (((OP)>>3)&0xF)
00098 #define ARF(OP)         ((OP)&0x7)
00099 #define IS_LKADDR(OP)   (INDIRECT(OP) && MOD(OP)>=12)
00100 #define SRC(OP)         ((OP)&0x200)
00101 #define DST(OP)         ((OP)&0x100)
00102 #define SRC1(OP)        ((OP)&0x100)
00103 #define SHIFT(OP)       (((OP)&0x10)?(((OP)&0x1F)-32):((OP)&0x1F))
00104 #define SHFT(OP)        ((OP)&0xF)
00105 #define ARX(OP)         ((OP)&0x7)
00106 #define XMEM(OP)        (((OP)&0x00F0)>>4)
00107 #define YMEM(OP)        ((OP)&0x000F)
00108 #define XMOD(C)        (((C)&0xC)>>2)
00109 #define XARX(C)        (((C)&0x3)+2)
00110 #define CC3(OP)         (((OP)>>8)&0x3)
00111 #define SBIT(OP)        ((OP)&0xF)
00112 #define MMR(OP)         ((OP)&0x7F)
00113 #define MMRX(OP)        ((((OP)>>4)&0xF)+16)
00114 #define MMRY(OP)        (((OP)&0xF)+16)
00115 
00116 #define OPTYPE(X)       ((X)&~OPT)
00117 
00118   /* Ones in this mask indicate which bits must match the opcode field.
00119      Zeroes indicate don't care bits (operands and/or opcode options) */
00120   unsigned short mask;
00121 
00122   /* An array of operand codes (at most 4 operands) */
00123 #define MAX_OPERANDS 4
00124   enum optype operand_types[MAX_OPERANDS];
00125 
00126   /* Special purpose flags (e.g. branch type, parallel, delay, etc) 
00127    */
00128   unsigned short flags;
00129 #define B_NEXT      0 /* normal execution, next insn is next address */
00130 #define B_BRANCH    1 /* next insn is in opcode */
00131 #define B_RET       2 /* next insn is on stack */
00132 #define B_BACC      3 /* next insn is in acc */
00133 #define B_REPEAT    4 /* next insn repeats */
00134 #define FL_BMASK    0x07
00135 
00136 #define FL_DELAY    0x10 /* instruction uses delay slots */
00137 #define FL_EXT      0x20 /* instruction takes two words */   
00138 #define FL_FAR      0x40 /* far mode addressing */
00139 #define FL_LP       0x80 /* LP-only instruction */
00140 #define FL_NR       0x100 /* no repeat allowed */
00141 #define FL_SMR      0x200 /* Smem read (for flagging write-only *+ARx */
00142 
00143 #define FL_PAR      0x400 /* Parallel instruction. */
00144 
00145   unsigned short opcode2, mask2;   /* some insns have an extended opcode */
00146 
00147   const char* parname;
00148   enum optype paroperand_types[MAX_OPERANDS];
00149 
00150 } template;
00151 
00152 extern const template tic54x_unknown_opcode;
00153 extern const template tic54x_optab[];
00154 extern const template tic54x_paroptab[];
00155 extern const symbol mmregs[], regs[];
00156 extern const symbol condition_codes[], cc2_codes[], status_bits[];
00157 extern const symbol cc3_codes[];
00158 extern const char *misc_symbols[];
00159 struct disassemble_info;
00160 extern const template* tic54x_get_insn (struct disassemble_info *, 
00161                                         bfd_vma, unsigned short, int *);
00162 
00163 #endif /* _opcode_tic54x_h_ */