Back to index

cell-binutils  2.17cvs20070401
spu.h
Go to the documentation of this file.
00001 /* SPU ELF support for BFD.
00002 
00003    Copyright 2006 Free Software Foundation, Inc.
00004 
00005    This file is part of GDB, GAS, and the GNU binutils.
00006 
00007    This program is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 2 of the License, or
00010    (at your option) any later version.
00011 
00012    This program is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with this program; if not, write to the Free Software Foundation,
00019    Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00020 
00021 
00022 /* These two enums are from rel_apu/common/spu_asm_format.h */
00023 /* definition of instruction format */
00024 typedef enum {
00025   RRR,
00026   RI18,
00027   RI16,
00028   RI10,
00029   RI8,
00030   RI7,
00031   RR,
00032   LBT,
00033   LBTI,
00034   IDATA,
00035   UNKNOWN_IFORMAT
00036 } spu_iformat;
00037 
00038 /* These values describe assembly instruction arguments.  They indicate
00039  * how to encode, range checking and which relocation to use. */
00040 typedef enum {
00041   A_T,  /* register at pos 0 */
00042   A_A,  /* register at pos 7 */
00043   A_B,  /* register at pos 14 */
00044   A_C,  /* register at pos 21 */
00045   A_S,  /* special purpose register at pos 7 */
00046   A_H,  /* channel register at pos 7 */
00047   A_P,  /* parenthesis, this has to separate regs from immediates */
00048   A_S3,
00049   A_S6,
00050   A_S7N,
00051   A_S7,
00052   A_U7A,
00053   A_U7B,
00054   A_S10B,
00055   A_S10,
00056   A_S11,
00057   A_S11I,
00058   A_S14,
00059   A_S16,
00060   A_S18,
00061   A_R18,
00062   A_U3,
00063   A_U5,
00064   A_U6,
00065   A_U7,
00066   A_U14,
00067   A_X16,
00068   A_U18,
00069   A_MAX
00070 } spu_aformat;
00071 
00072 enum spu_insns {
00073 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
00074        TAG,
00075 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
00076        TAG,
00077 #include "opcode/spu-insns.h"
00078 #undef APUOP
00079 #undef APUOPFB
00080         M_SPU_MAX
00081 };
00082 
00083 struct spu_opcode
00084 {
00085    spu_iformat insn_type;
00086    unsigned int opcode;
00087    char *mnemonic;
00088    int arg[5];
00089 };
00090 
00091 #define SIGNED_EXTRACT(insn,size,pos) (((int)((insn) << (32-size-pos))) >> (32-size))
00092 #define UNSIGNED_EXTRACT(insn,size,pos) (((insn) >> pos) & ((1 << size)-1))
00093 
00094 #define DECODE_INSN_RT(insn) (insn & 0x7f)
00095 #define DECODE_INSN_RA(insn) ((insn >> 7) & 0x7f)
00096 #define DECODE_INSN_RB(insn) ((insn >> 14) & 0x7f)
00097 #define DECODE_INSN_RC(insn) ((insn >> 21) & 0x7f)
00098 
00099 #define DECODE_INSN_I10(insn) SIGNED_EXTRACT(insn,10,14)
00100 #define DECODE_INSN_U10(insn) UNSIGNED_EXTRACT(insn,10,14)
00101 
00102 /* For branching, immediate loads, hbr and  lqa/stqa. */
00103 #define DECODE_INSN_I16(insn) SIGNED_EXTRACT(insn,16,7)
00104 #define DECODE_INSN_U16(insn) UNSIGNED_EXTRACT(insn,16,7)
00105 
00106 /* for stop */
00107 #define DECODE_INSN_U14(insn) UNSIGNED_EXTRACT(insn,14,0)
00108 
00109 /* For ila */
00110 #define DECODE_INSN_I18(insn) SIGNED_EXTRACT(insn,18,7)
00111 #define DECODE_INSN_U18(insn) UNSIGNED_EXTRACT(insn,18,7)
00112 
00113 /* For rotate and shift and generate control mask */
00114 #define DECODE_INSN_I7(insn) SIGNED_EXTRACT(insn,7,14)
00115 #define DECODE_INSN_U7(insn) UNSIGNED_EXTRACT(insn,7,14)
00116 
00117 /* For float <-> int conversion */
00118 #define DECODE_INSN_I8(insn)  SIGNED_EXTRACT(insn,8,14)
00119 #define DECODE_INSN_U8(insn) UNSIGNED_EXTRACT(insn,8,14)
00120 
00121 /* For hbr  */
00122 #define DECODE_INSN_I9a(insn) ((SIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
00123 #define DECODE_INSN_I9b(insn) ((SIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
00124 #define DECODE_INSN_U9a(insn) ((UNSIGNED_EXTRACT(insn,2,23) << 7) | UNSIGNED_EXTRACT(insn,7,0))
00125 #define DECODE_INSN_U9b(insn) ((UNSIGNED_EXTRACT(insn,2,14) << 7) | UNSIGNED_EXTRACT(insn,7,0))
00126