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cell-binutils  2.17cvs20070401
mn10300.h
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00001 /* mn10300.h -- Header file for Matsushita 10300 opcode table
00002    Copyright 1996, 1997, 1998, 1999, 2003 Free Software Foundation, Inc.
00003    Written by Jeff Law, Cygnus Support
00004 
00005 This file is part of GDB, GAS, and the GNU binutils.
00006 
00007 GDB, GAS, and the GNU binutils are free software; you can redistribute
00008 them and/or modify them under the terms of the GNU General Public
00009 License as published by the Free Software Foundation; either version
00010 1, or (at your option) any later version.
00011 
00012 GDB, GAS, and the GNU binutils are distributed in the hope that they
00013 will be useful, but WITHOUT ANY WARRANTY; without even the implied
00014 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
00015 the GNU General Public License for more details.
00016 
00017 You should have received a copy of the GNU General Public License
00018 along with this file; see the file COPYING.  If not, write to the Free
00019 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00020 
00021 #ifndef MN10300_H
00022 #define MN10300_H
00023 
00024 /* The opcode table is an array of struct mn10300_opcode.  */
00025 
00026 #define MN10300_MAX_OPERANDS 8
00027 struct mn10300_opcode
00028 {
00029   /* The opcode name.  */
00030   const char *name;
00031 
00032   /* The opcode itself.  Those bits which will be filled in with
00033      operands are zeroes.  */
00034   unsigned long opcode;
00035 
00036   /* The opcode mask.  This is used by the disassembler.  This is a
00037      mask containing ones indicating those bits which must match the
00038      opcode field, and zeroes indicating those bits which need not
00039      match (and are presumably filled in by operands).  */
00040   unsigned long mask;
00041 
00042   /* A bitmask.  For each operand, nonzero if it must not have the same
00043      register specification as all other operands with a nonzero bit in
00044      this flag.  ie 0x81 would indicate that operands 7 and 0 must not
00045      match.  Note that we count operands from left to right as they appear
00046      in the operands specification below.  */
00047   unsigned int no_match_operands;
00048 
00049   /* The format of this opcode.  */
00050   unsigned char format;
00051 
00052   /* Bitmask indicating what cpu variants this opcode is available on.
00053      We assume mn10300 base opcodes are available everywhere, so we only
00054      have to note opcodes which are available on other variants.  */
00055   unsigned int machine;
00056 
00057   /* An array of operand codes.  Each code is an index into the
00058      operand table.  They appear in the order which the operands must
00059      appear in assembly code, and are terminated by a zero.  */
00060   unsigned char operands[MN10300_MAX_OPERANDS];
00061 };
00062 
00063 /* The table itself is sorted by major opcode number, and is otherwise
00064    in the order in which the disassembler should consider
00065    instructions.  */
00066 extern const struct mn10300_opcode mn10300_opcodes[];
00067 extern const int mn10300_num_opcodes;
00068 
00069 
00070 /* The operands table is an array of struct mn10300_operand.  */
00071 
00072 struct mn10300_operand
00073 {
00074   /* The number of bits in the operand.  */
00075   int bits;
00076 
00077   /* How far the operand is left shifted in the instruction.  */
00078   int shift;
00079 
00080   /* One bit syntax flags.  */
00081   int flags;
00082 };
00083 
00084 /* Elements in the table are retrieved by indexing with values from
00085    the operands field of the mn10300_opcodes table.  */
00086 
00087 extern const struct mn10300_operand mn10300_operands[];
00088 
00089 /* Values defined for the flags field of a struct mn10300_operand.  */
00090 #define MN10300_OPERAND_DREG 0x1
00091 
00092 #define MN10300_OPERAND_AREG 0x2
00093 
00094 #define MN10300_OPERAND_SP 0x4
00095 
00096 #define MN10300_OPERAND_PSW 0x8
00097 
00098 #define MN10300_OPERAND_MDR 0x10
00099 
00100 #define MN10300_OPERAND_SIGNED 0x20
00101 
00102 #define MN10300_OPERAND_PROMOTE 0x40
00103 
00104 #define MN10300_OPERAND_PAREN 0x80
00105 
00106 #define MN10300_OPERAND_REPEATED 0x100
00107 
00108 #define MN10300_OPERAND_EXTENDED 0x200
00109 
00110 #define MN10300_OPERAND_SPLIT 0x400
00111 
00112 #define MN10300_OPERAND_REG_LIST 0x800
00113 
00114 #define MN10300_OPERAND_PCREL 0x1000
00115 
00116 #define MN10300_OPERAND_MEMADDR 0x2000
00117 
00118 #define MN10300_OPERAND_RELAX 0x4000
00119 
00120 #define MN10300_OPERAND_USP 0x8000
00121 
00122 #define MN10300_OPERAND_SSP 0x10000
00123 
00124 #define MN10300_OPERAND_MSP 0x20000
00125 
00126 #define MN10300_OPERAND_PC 0x40000
00127 
00128 #define MN10300_OPERAND_EPSW 0x80000
00129 
00130 #define MN10300_OPERAND_RREG 0x100000
00131 
00132 #define MN10300_OPERAND_XRREG 0x200000
00133 
00134 #define MN10300_OPERAND_PLUS 0x400000
00135 
00136 #define MN10300_OPERAND_24BIT 0x800000
00137 
00138 #define MN10300_OPERAND_FSREG 0x1000000
00139 
00140 #define MN10300_OPERAND_FDREG 0x2000000
00141 
00142 #define MN10300_OPERAND_FPCR 0x4000000
00143 
00144 /* Opcode Formats.  */
00145 #define FMT_S0 1
00146 #define FMT_S1 2
00147 #define FMT_S2 3
00148 #define FMT_S4 4
00149 #define FMT_S6 5
00150 #define FMT_D0 6
00151 #define FMT_D1 7
00152 #define FMT_D2 8
00153 #define FMT_D4 9
00154 #define FMT_D5 10
00155 #define FMT_D6 11
00156 #define FMT_D7 12
00157 #define FMT_D8 13
00158 #define FMT_D9 14
00159 #define FMT_D10 15
00160 #define FMT_D3 16
00161 
00162 /* Variants of the mn10300 which have additional opcodes.  */
00163 #define MN103 300
00164 #define AM30  300
00165 
00166 #define AM33 330
00167 #define AM33_2 332
00168 
00169 #endif /* MN10300_H */