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cell-binutils  2.17cvs20070401
Classes | Defines | Typedefs | Enumerations | Functions
ia64.h File Reference
#include <sys/types.h>
#include "bfd.h"
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Classes

struct  ia64_dependency
struct  ia64_opcode_dependency
struct  ia64_templ_desc
struct  ia64_opcode
struct  ia64_operand
struct  ia64_operand::bit_field

Defines

#define REG_NONE   (-1)
#define RDEP(N, X)   (((N)<<11)|(X))
#define NOTE(X)   (((X)>>11)&0x1F)
#define DEP(X)   ((X)&0x7FF)
#define IA64_OPCODE_FIRST   (1<<0) /* must be first in an insn group */
#define IA64_OPCODE_X_IN_MLX   (1<<1) /* insn is allowed in X slot of MLX */
#define IA64_OPCODE_LAST   (1<<2) /* must be last in an insn group */
#define IA64_OPCODE_PRIV   (1<<3) /* privileged instruct */
#define IA64_OPCODE_SLOT2   (1<<4) /* insn allowed in slot 2 only */
#define IA64_OPCODE_NO_PRED   (1<<5) /* insn cannot be predicated */
#define IA64_OPCODE_PSEUDO   (1<<6) /* insn is a pseudo-op */
#define IA64_OPCODE_F2_EQ_F3   (1<<7) /* constraint: F2 == F3 */
#define IA64_OPCODE_LEN_EQ_64MCNT   (1<<8) /* constraint: LEN == 64-CNT */
#define IA64_OPCODE_MOD_RRBS   (1<<9) /* modifies all rrbs in CFM */
#define IA64_OPCODE_POSTINC   (1<<10) /* postincrement MR3 operand */
#define IA64_OP(i)   (((i) >> 37) & 0xf)
#define IA64_OPND_FLAG_DECIMAL_SIGNED   (1<<0)
#define IA64_OPND_FLAG_DECIMAL_UNSIGNED   (1<<1)

Typedefs

typedef BFD_HOST_U_64_BIT ia64_insn

Enumerations

enum  ia64_insn_type {
  IA64_TYPE_NIL = 0, IA64_TYPE_A, IA64_TYPE_I, IA64_TYPE_M,
  IA64_TYPE_B, IA64_TYPE_F, IA64_TYPE_X, IA64_TYPE_DYN,
  IA64_NUM_TYPES
}
enum  ia64_unit {
  IA64_UNIT_NIL = 0, IA64_UNIT_I, IA64_UNIT_M, IA64_UNIT_B,
  IA64_UNIT_F, IA64_UNIT_L, IA64_UNIT_X, IA64_NUM_UNITS
}
enum  ia64_opnd {
  IA64_OPND_NIL, IA64_OPND_AR_CSD, IA64_OPND_AR_CCV, IA64_OPND_AR_PFS,
  IA64_OPND_C1, IA64_OPND_C8, IA64_OPND_C16, IA64_OPND_GR0,
  IA64_OPND_IP, IA64_OPND_PR, IA64_OPND_PR_ROT, IA64_OPND_PSR,
  IA64_OPND_PSR_L, IA64_OPND_PSR_UM, IA64_OPND_AR3, IA64_OPND_B1,
  IA64_OPND_B2, IA64_OPND_CR3, IA64_OPND_F1, IA64_OPND_F2,
  IA64_OPND_F3, IA64_OPND_F4, IA64_OPND_P1, IA64_OPND_P2,
  IA64_OPND_R1, IA64_OPND_R2, IA64_OPND_R3, IA64_OPND_R3_2,
  IA64_OPND_MR3, IA64_OPND_CPUID_R3, IA64_OPND_DBR_R3, IA64_OPND_DTR_R3,
  IA64_OPND_ITR_R3, IA64_OPND_IBR_R3, IA64_OPND_MSR_R3, IA64_OPND_PKR_R3,
  IA64_OPND_PMC_R3, IA64_OPND_PMD_R3, IA64_OPND_RR_R3, IA64_OPND_CCNT5,
  IA64_OPND_CNT2a, IA64_OPND_CNT2b, IA64_OPND_CNT2c, IA64_OPND_CNT5,
  IA64_OPND_CNT6, IA64_OPND_CPOS6a, IA64_OPND_CPOS6b, IA64_OPND_CPOS6c,
  IA64_OPND_IMM1, IA64_OPND_IMMU2, IA64_OPND_IMMU5b, IA64_OPND_IMMU7a,
  IA64_OPND_IMMU7b, IA64_OPND_SOF, IA64_OPND_SOL, IA64_OPND_SOR,
  IA64_OPND_IMM8, IA64_OPND_IMM8U4, IA64_OPND_IMM8M1, IA64_OPND_IMM8M1U4,
  IA64_OPND_IMM8M1U8, IA64_OPND_IMMU9, IA64_OPND_IMM9a, IA64_OPND_IMM9b,
  IA64_OPND_IMM14, IA64_OPND_IMM17, IA64_OPND_IMMU21, IA64_OPND_IMM22,
  IA64_OPND_IMMU24, IA64_OPND_IMM44, IA64_OPND_IMMU62, IA64_OPND_IMMU64,
  IA64_OPND_INC3, IA64_OPND_LEN4, IA64_OPND_LEN6, IA64_OPND_MBTYPE4,
  IA64_OPND_MHTYPE8, IA64_OPND_POS6, IA64_OPND_TAG13, IA64_OPND_TAG13b,
  IA64_OPND_TGT25, IA64_OPND_TGT25b, IA64_OPND_TGT25c, IA64_OPND_TGT64,
  IA64_OPND_LDXMOV, IA64_OPND_COUNT
}
enum  ia64_dependency_mode { IA64_DV_RAW, IA64_DV_WAW, IA64_DV_WAR }
enum  ia64_dependency_semantics {
  IA64_DVS_NONE, IA64_DVS_IMPLIED, IA64_DVS_IMPLIEDF, IA64_DVS_DATA,
  IA64_DVS_INSTR, IA64_DVS_SPECIFIC, IA64_DVS_STOP, IA64_DVS_OTHER
}
enum  ia64_resource_specifier {
  IA64_RS_ANY, IA64_RS_AR_K, IA64_RS_AR_UNAT, IA64_RS_AR,
  IA64_RS_ARb, IA64_RS_BR, IA64_RS_CFM, IA64_RS_CPUID,
  IA64_RS_CR_IRR, IA64_RS_CR_LRR, IA64_RS_CR, IA64_RS_DBR,
  IA64_RS_FR, IA64_RS_FRb, IA64_RS_GR0, IA64_RS_GR,
  IA64_RS_IBR, IA64_RS_INSERVICE, IA64_RS_MSR, IA64_RS_PKR,
  IA64_RS_PMC, IA64_RS_PMD, IA64_RS_PR, IA64_RS_PRr,
  IA64_RS_PR63, IA64_RS_RR, IA64_RS_ARX, IA64_RS_CRX,
  IA64_RS_PSR, IA64_RS_RSE, IA64_RS_AR_FPSR
}
enum  ia64_rse_resource {
  IA64_RSE_N_STACKED_PHYS, IA64_RSE_BOF, IA64_RSE_STORE_REG, IA64_RSE_LOAD_REG,
  IA64_RSE_BSPLOAD, IA64_RSE_RNATBITINDEX, IA64_RSE_CFLE, IA64_RSE_NDIRTY
}
enum  ia64_operand_class {
  IA64_OPND_CLASS_CST, IA64_OPND_CLASS_REG, IA64_OPND_CLASS_IND, IA64_OPND_CLASS_ABS,
  IA64_OPND_CLASS_REL
}

Functions

struct ia64_opcodeia64_find_opcode (const char *name)
struct ia64_opcodeia64_find_next_opcode (struct ia64_opcode *ent)
struct ia64_opcodeia64_dis_opcode (ia64_insn insn, enum ia64_insn_type type)
void ia64_free_opcode (struct ia64_opcode *ent)
struct ia64_dependencyia64_find_dependency (int index)

Class Documentation

struct ia64_dependency

Definition at line 213 of file ia64.h.

Class Members
const char * name
struct ia64_opcode_dependency

Definition at line 236 of file ia64.h.

Class Members
const unsigned short * chks
int nchks
int nregs
const unsigned short * regs
struct ia64_templ_desc

Definition at line 252 of file ia64.h.

Class Members
int group_boundary
struct ia64_opcode

Definition at line 261 of file ia64.h.

Class Members
const char * name
struct ia64_operand::bit_field

Definition at line 349 of file ia64.h.

Class Members
int bits
int shift

Define Documentation

#define DEP (   X)    ((X)&0x7FF)

Definition at line 247 of file ia64.h.

#define IA64_OP (   i)    (((i) >> 37) & 0xf)

Definition at line 314 of file ia64.h.

#define IA64_OPCODE_F2_EQ_F3   (1<<7) /* constraint: F2 == F3 */

Definition at line 308 of file ia64.h.

#define IA64_OPCODE_FIRST   (1<<0) /* must be first in an insn group */

Definition at line 301 of file ia64.h.

#define IA64_OPCODE_LAST   (1<<2) /* must be last in an insn group */

Definition at line 303 of file ia64.h.

#define IA64_OPCODE_LEN_EQ_64MCNT   (1<<8) /* constraint: LEN == 64-CNT */

Definition at line 309 of file ia64.h.

#define IA64_OPCODE_MOD_RRBS   (1<<9) /* modifies all rrbs in CFM */

Definition at line 310 of file ia64.h.

#define IA64_OPCODE_NO_PRED   (1<<5) /* insn cannot be predicated */

Definition at line 306 of file ia64.h.

#define IA64_OPCODE_POSTINC   (1<<10) /* postincrement MR3 operand */

Definition at line 311 of file ia64.h.

#define IA64_OPCODE_PRIV   (1<<3) /* privileged instruct */

Definition at line 304 of file ia64.h.

#define IA64_OPCODE_PSEUDO   (1<<6) /* insn is a pseudo-op */

Definition at line 307 of file ia64.h.

#define IA64_OPCODE_SLOT2   (1<<4) /* insn allowed in slot 2 only */

Definition at line 305 of file ia64.h.

#define IA64_OPCODE_X_IN_MLX   (1<<1) /* insn is allowed in X slot of MLX */

Definition at line 302 of file ia64.h.

#define IA64_OPND_FLAG_DECIMAL_SIGNED   (1<<0)

Definition at line 367 of file ia64.h.

#define IA64_OPND_FLAG_DECIMAL_UNSIGNED   (1<<1)

Definition at line 369 of file ia64.h.

#define NOTE (   X)    (((X)>>11)&0x1F)

Definition at line 246 of file ia64.h.

#define RDEP (   N,
  X 
)    (((N)<<11)|(X))

Definition at line 245 of file ia64.h.

#define REG_NONE   (-1)

Typedef Documentation

typedef BFD_HOST_U_64_BIT ia64_insn

Definition at line 14 of file ia64.h.


Enumeration Type Documentation

Enumerator:
IA64_DV_RAW 
IA64_DV_WAW 
IA64_DV_WAR 

Definition at line 145 of file ia64.h.

Enumerator:
IA64_DVS_NONE 
IA64_DVS_IMPLIED 
IA64_DVS_IMPLIEDF 
IA64_DVS_DATA 
IA64_DVS_INSTR 
IA64_DVS_SPECIFIC 
IA64_DVS_STOP 
IA64_DVS_OTHER 

Definition at line 152 of file ia64.h.

Enumerator:
IA64_TYPE_NIL 
IA64_TYPE_A 
IA64_TYPE_I 
IA64_TYPE_M 
IA64_TYPE_B 
IA64_TYPE_F 
IA64_TYPE_X 
IA64_TYPE_DYN 
IA64_NUM_TYPES 

Definition at line 16 of file ia64.h.

  {
    IA64_TYPE_NIL = 0,      /* illegal type */
    IA64_TYPE_A,     /* integer alu (I- or M-unit) */
    IA64_TYPE_I,     /* non-alu integer (I-unit) */
    IA64_TYPE_M,     /* memory (M-unit) */
    IA64_TYPE_B,     /* branch (B-unit) */
    IA64_TYPE_F,     /* floating-point (F-unit) */
    IA64_TYPE_X,     /* long encoding (X-unit) */
    IA64_TYPE_DYN,   /* Dynamic opcode */
    IA64_NUM_TYPES
  };
Enumerator:
IA64_OPND_CLASS_CST 
IA64_OPND_CLASS_REG 
IA64_OPND_CLASS_IND 
IA64_OPND_CLASS_ABS 
IA64_OPND_CLASS_REL 

Definition at line 316 of file ia64.h.

  {
    IA64_OPND_CLASS_CST,    /* constant */
    IA64_OPND_CLASS_REG,    /* register */
    IA64_OPND_CLASS_IND,    /* indirect register */
    IA64_OPND_CLASS_ABS,    /* absolute value */
    IA64_OPND_CLASS_REL,    /* IP-relative value */
  };
enum ia64_opnd
Enumerator:
IA64_OPND_NIL 
IA64_OPND_AR_CSD 
IA64_OPND_AR_CCV 
IA64_OPND_AR_PFS 
IA64_OPND_C1 
IA64_OPND_C8 
IA64_OPND_C16 
IA64_OPND_GR0 
IA64_OPND_IP 
IA64_OPND_PR 
IA64_OPND_PR_ROT 
IA64_OPND_PSR 
IA64_OPND_PSR_L 
IA64_OPND_PSR_UM 
IA64_OPND_AR3 
IA64_OPND_B1 
IA64_OPND_B2 
IA64_OPND_CR3 
IA64_OPND_F1 
IA64_OPND_F2 
IA64_OPND_F3 
IA64_OPND_F4 
IA64_OPND_P1 
IA64_OPND_P2 
IA64_OPND_R1 
IA64_OPND_R2 
IA64_OPND_R3 
IA64_OPND_R3_2 
IA64_OPND_MR3 
IA64_OPND_CPUID_R3 
IA64_OPND_DBR_R3 
IA64_OPND_DTR_R3 
IA64_OPND_ITR_R3 
IA64_OPND_IBR_R3 
IA64_OPND_MSR_R3 
IA64_OPND_PKR_R3 
IA64_OPND_PMC_R3 
IA64_OPND_PMD_R3 
IA64_OPND_RR_R3 
IA64_OPND_CCNT5 
IA64_OPND_CNT2a 
IA64_OPND_CNT2b 
IA64_OPND_CNT2c 
IA64_OPND_CNT5 
IA64_OPND_CNT6 
IA64_OPND_CPOS6a 
IA64_OPND_CPOS6b 
IA64_OPND_CPOS6c 
IA64_OPND_IMM1 
IA64_OPND_IMMU2 
IA64_OPND_IMMU5b 
IA64_OPND_IMMU7a 
IA64_OPND_IMMU7b 
IA64_OPND_SOF 
IA64_OPND_SOL 
IA64_OPND_SOR 
IA64_OPND_IMM8 
IA64_OPND_IMM8U4 
IA64_OPND_IMM8M1 
IA64_OPND_IMM8M1U4 
IA64_OPND_IMM8M1U8 
IA64_OPND_IMMU9 
IA64_OPND_IMM9a 
IA64_OPND_IMM9b 
IA64_OPND_IMM14 
IA64_OPND_IMM17 
IA64_OPND_IMMU21 
IA64_OPND_IMM22 
IA64_OPND_IMMU24 
IA64_OPND_IMM44 
IA64_OPND_IMMU62 
IA64_OPND_IMMU64 
IA64_OPND_INC3 
IA64_OPND_LEN4 
IA64_OPND_LEN6 
IA64_OPND_MBTYPE4 
IA64_OPND_MHTYPE8 
IA64_OPND_POS6 
IA64_OPND_TAG13 
IA64_OPND_TAG13b 
IA64_OPND_TGT25 
IA64_OPND_TGT25b 
IA64_OPND_TGT25c 
IA64_OPND_TGT64 
IA64_OPND_LDXMOV 
IA64_OPND_COUNT 

Definition at line 44 of file ia64.h.

  {
    IA64_OPND_NIL,   /* no operand---MUST BE FIRST!*/

    /* constants */
    IA64_OPND_AR_CSD,       /* application register csd (ar.csd) */
    IA64_OPND_AR_CCV,       /* application register ccv (ar.ccv) */
    IA64_OPND_AR_PFS,       /* application register pfs (ar.pfs) */
    IA64_OPND_C1,    /* the constant 1 */
    IA64_OPND_C8,    /* the constant 8 */
    IA64_OPND_C16,   /* the constant 16 */
    IA64_OPND_GR0,   /* gr0 */
    IA64_OPND_IP,    /* instruction pointer (ip) */
    IA64_OPND_PR,    /* predicate register (pr) */
    IA64_OPND_PR_ROT,       /* rotating predicate register (pr.rot) */
    IA64_OPND_PSR,   /* processor status register (psr) */
    IA64_OPND_PSR_L, /* processor status register L (psr.l) */
    IA64_OPND_PSR_UM,       /* processor status register UM (psr.um) */

    /* register operands: */
    IA64_OPND_AR3,   /* third application register # (bits 20-26) */
    IA64_OPND_B1,    /* branch register # (bits 6-8) */
    IA64_OPND_B2,    /* branch register # (bits 13-15) */
    IA64_OPND_CR3,   /* third control register # (bits 20-26) */
    IA64_OPND_F1,    /* first floating-point register # */
    IA64_OPND_F2,    /* second floating-point register # */
    IA64_OPND_F3,    /* third floating-point register # */
    IA64_OPND_F4,    /* fourth floating-point register # */
    IA64_OPND_P1,    /* first predicate # */
    IA64_OPND_P2,    /* second predicate # */
    IA64_OPND_R1,    /* first register # */
    IA64_OPND_R2,    /* second register # */
    IA64_OPND_R3,    /* third register # */
    IA64_OPND_R3_2,  /* third register # (limited to gr0-gr3) */

    /* memory operands: */
    IA64_OPND_MR3,   /* memory at addr of third register # */

    /* indirect operands: */
    IA64_OPND_CPUID_R3,     /* cpuid[reg] */
    IA64_OPND_DBR_R3,       /* dbr[reg] */
    IA64_OPND_DTR_R3,       /* dtr[reg] */
    IA64_OPND_ITR_R3,       /* itr[reg] */
    IA64_OPND_IBR_R3,       /* ibr[reg] */
    IA64_OPND_MSR_R3,       /* msr[reg] */
    IA64_OPND_PKR_R3,       /* pkr[reg] */
    IA64_OPND_PMC_R3,       /* pmc[reg] */
    IA64_OPND_PMD_R3,       /* pmd[reg] */
    IA64_OPND_RR_R3, /* rr[reg] */

    /* immediate operands: */
    IA64_OPND_CCNT5, /* 5-bit count (31 - bits 20-24) */
    IA64_OPND_CNT2a, /* 2-bit count (1 + bits 27-28) */
    IA64_OPND_CNT2b, /* 2-bit count (bits 27-28): 1, 2, 3 */
    IA64_OPND_CNT2c, /* 2-bit count (bits 30-31): 0, 7, 15, or 16 */
    IA64_OPND_CNT5,  /* 5-bit count (bits 14-18) */
    IA64_OPND_CNT6,  /* 6-bit count (bits 27-32) */
    IA64_OPND_CPOS6a,       /* 6-bit count (63 - bits 20-25) */
    IA64_OPND_CPOS6b,       /* 6-bit count (63 - bits 14-19) */
    IA64_OPND_CPOS6c,       /* 6-bit count (63 - bits 31-36) */
    IA64_OPND_IMM1,  /* signed 1-bit immediate (bit 36) */
    IA64_OPND_IMMU2, /* unsigned 2-bit immediate (bits 13-14) */
    IA64_OPND_IMMU5b,       /* unsigned 5-bit immediate (32 + bits 14-18) */
    IA64_OPND_IMMU7a,       /* unsigned 7-bit immediate (bits 13-19) */
    IA64_OPND_IMMU7b,       /* unsigned 7-bit immediate (bits 20-26) */
    IA64_OPND_SOF,   /* 8-bit stack frame size */
    IA64_OPND_SOL,   /* 8-bit size of locals */
    IA64_OPND_SOR,   /* 6-bit number of rotating registers (scaled by 8) */
    IA64_OPND_IMM8,  /* signed 8-bit immediate (bits 13-19 & 36) */
    IA64_OPND_IMM8U4,       /* cmp4*u signed 8-bit immediate (bits 13-19 & 36) */
    IA64_OPND_IMM8M1,       /* signed 8-bit immediate -1 (bits 13-19 & 36) */
    IA64_OPND_IMM8M1U4,     /* cmp4*u signed 8-bit immediate -1 (bits 13-19 & 36)*/
    IA64_OPND_IMM8M1U8,     /* cmp*u signed 8-bit immediate -1 (bits 13-19 & 36) */
    IA64_OPND_IMMU9, /* unsigned 9-bit immediate (bits 33-34, 20-26) */
    IA64_OPND_IMM9a, /* signed 9-bit immediate (bits 6-12, 27, 36) */
    IA64_OPND_IMM9b, /* signed 9-bit immediate (bits 13-19, 27, 36) */
    IA64_OPND_IMM14, /* signed 14-bit immediate (bits 13-19, 27-32, 36) */
    IA64_OPND_IMM17, /* signed 17-bit immediate (2*bits 6-12, 24-31, 36) */
    IA64_OPND_IMMU21,       /* unsigned 21-bit immediate (bits 6-25, 36) */
    IA64_OPND_IMM22, /* signed 22-bit immediate (bits 13-19, 22-36) */
    IA64_OPND_IMMU24,       /* unsigned 24-bit immediate (bits 6-26, 31-32, 36) */
    IA64_OPND_IMM44, /* signed 44-bit immediate (2^16*bits 6-32, 36) */
    IA64_OPND_IMMU62,       /* unsigned 62-bit immediate */
    IA64_OPND_IMMU64,       /* unsigned 64-bit immediate (lotsa bits...) */
    IA64_OPND_INC3,  /* signed 3-bit (bits 13-15): +/-1, 4, 8, 16 */
    IA64_OPND_LEN4,  /* 4-bit count (bits 27-30 + 1) */
    IA64_OPND_LEN6,  /* 6-bit count (bits 27-32 + 1) */
    IA64_OPND_MBTYPE4,      /* 4-bit mux type (bits 20-23) */
    IA64_OPND_MHTYPE8,      /* 8-bit mux type (bits 20-27) */
    IA64_OPND_POS6,  /* 6-bit count (bits 14-19) */
    IA64_OPND_TAG13, /* signed 13-bit tag (ip + 16*bits 6-12, 33-34) */
    IA64_OPND_TAG13b,       /* signed 13-bit tag (ip + 16*bits 24-32) */
    IA64_OPND_TGT25, /* signed 25-bit (ip + 16*bits 6-25, 36) */
    IA64_OPND_TGT25b,       /* signed 25-bit (ip + 16*bits 6-12, 20-32, 36) */
    IA64_OPND_TGT25c,       /* signed 25-bit (ip + 16*bits 13-32, 36) */
    IA64_OPND_TGT64,    /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */
    IA64_OPND_LDXMOV,       /* any symbol, generates R_IA64_LDXMOV.  */

    IA64_OPND_COUNT  /* # of operand types (MUST BE LAST!) */
  };
Enumerator:
IA64_RS_ANY 
IA64_RS_AR_K 
IA64_RS_AR_UNAT 
IA64_RS_AR 
IA64_RS_ARb 
IA64_RS_BR 
IA64_RS_CFM 
IA64_RS_CPUID 
IA64_RS_CR_IRR 
IA64_RS_CR_LRR 
IA64_RS_CR 
IA64_RS_DBR 
IA64_RS_FR 
IA64_RS_FRb 
IA64_RS_GR0 
IA64_RS_GR 
IA64_RS_IBR 
IA64_RS_INSERVICE 
IA64_RS_MSR 
IA64_RS_PKR 
IA64_RS_PMC 
IA64_RS_PMD 
IA64_RS_PR 
IA64_RS_PRr 
IA64_RS_PR63 
IA64_RS_RR 
IA64_RS_ARX 
IA64_RS_CRX 
IA64_RS_PSR 
IA64_RS_RSE 
IA64_RS_AR_FPSR 

Definition at line 164 of file ia64.h.

{
  IA64_RS_ANY,
  IA64_RS_AR_K,
  IA64_RS_AR_UNAT,
  IA64_RS_AR, /* 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111 */
  IA64_RS_ARb, /* 48-63, 112-127 */
  IA64_RS_BR,
  IA64_RS_CFM,
  IA64_RS_CPUID,
  IA64_RS_CR_IRR,
  IA64_RS_CR_LRR,
  IA64_RS_CR, /* 3-7,10-15,18,26-63,75-79,82-127 */
  IA64_RS_DBR,
  IA64_RS_FR,
  IA64_RS_FRb,
  IA64_RS_GR0,
  IA64_RS_GR,
  IA64_RS_IBR,
  IA64_RS_INSERVICE, /* CR[EOI] or CR[IVR] */
  IA64_RS_MSR,
  IA64_RS_PKR,
  IA64_RS_PMC,
  IA64_RS_PMD,
  IA64_RS_PR,  /* non-rotating, 1-15 */
  IA64_RS_PRr, /* rotating, 16-62 */
  IA64_RS_PR63,
  IA64_RS_RR,

  IA64_RS_ARX, /* ARs not in RS_AR or RS_ARb */
  IA64_RS_CRX, /* CRs not in RS_CR */
  IA64_RS_PSR, /* PSR bits */
  IA64_RS_RSE, /* implementation-specific RSE resources */
  IA64_RS_AR_FPSR,
};
Enumerator:
IA64_RSE_N_STACKED_PHYS 
IA64_RSE_BOF 
IA64_RSE_STORE_REG 
IA64_RSE_LOAD_REG 
IA64_RSE_BSPLOAD 
IA64_RSE_RNATBITINDEX 
IA64_RSE_CFLE 
IA64_RSE_NDIRTY 

Definition at line 200 of file ia64.h.

enum ia64_unit
Enumerator:
IA64_UNIT_NIL 
IA64_UNIT_I 
IA64_UNIT_M 
IA64_UNIT_B 
IA64_UNIT_F 
IA64_UNIT_L 
IA64_UNIT_X 
IA64_NUM_UNITS 

Definition at line 29 of file ia64.h.

  {
    IA64_UNIT_NIL = 0,      /* illegal unit */
    IA64_UNIT_I,     /* integer unit */
    IA64_UNIT_M,     /* memory unit */
    IA64_UNIT_B,     /* branching unit */
    IA64_UNIT_F,     /* floating-point unit */
    IA64_UNIT_L,     /* long "unit" */
    IA64_UNIT_X,     /* may be integer or branch unit */
    IA64_NUM_UNITS
  };

Function Documentation

struct ia64_opcode* ia64_dis_opcode ( ia64_insn  insn,
enum ia64_insn_type  type 
) [read]

Definition at line 551 of file ia64-opc.c.

{
  int disent = locate_opcode_ent (insn, type);

  if (disent < 0)
    {
      return NULL;
    }
  else
    {
      unsigned int cb = ia64_dis_names[disent].completer_index;
      static char name[128];
      int place = ia64_dis_names[disent].insn_index;
      int ci = main_table[place].completers;
      ia64_insn tinsn = main_table[place].opcode;

      strcpy (name, ia64_strings [main_table[place].name_index]);

      while (cb)
       {
         if (cb & 1)
           {
             int cname = completer_table[ci].name_index;

             tinsn = apply_completer (tinsn, ci);

             if (ia64_strings[cname][0] != '\0')
              {
                strcat (name, ".");
                strcat (name, ia64_strings[cname]);
              }
             if (cb != 1)
              {
                ci = completer_table[ci].subentries;
              }
           }
         else
           {
             ci = completer_table[ci].alternative;
           }
         if (ci < 0)
           {
             abort ();
           }
         cb = cb >> 1;
       }
      if (tinsn != (insn & main_table[place].mask))
       {
         abort ();
       }
      return make_ia64_opcode (insn, name, place,
                               completer_table[ci].dependencies);
    }
}

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Definition at line 721 of file ia64-opc.c.

{
  index = DEP(index);

  if (index < 0
      || index >= (int)(sizeof(dependencies) / sizeof(dependencies[0])))
    return NULL;

  return &dependencies[index];
}

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Definition at line 671 of file ia64-opc.c.

{
  return ia64_find_matching_opcode (prev_ent->name,
                                prev_ent->ent_index + 1);
}

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struct ia64_opcode* ia64_find_opcode ( const char *  name) [read]

Definition at line 684 of file ia64-opc.c.

{
  char op[129];
  const char *suffix;
  short place;
  short name_index;

  if (strlen (name) > 128)
    {
      return NULL;
    }
  suffix = name;
  get_opc_prefix (&suffix, op);
  name_index = find_string_ent (op);
  if (name_index < 0)
    {
      return NULL;
    }

  place = find_main_ent (name_index);

  if (place < 0)
    {
      return NULL;
    }
  return ia64_find_matching_opcode (name, place);
}

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Definition at line 714 of file ia64-opc.c.

{
  free ((void *)ent->name);
  free (ent);
}

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