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cell-binutils  2.17cvs20070401
Classes | Defines
i960.h File Reference
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Classes

struct  i960_opcode

Defines

#define CTRL   0
#define COBR   1
#define COJ   2
#define REG   3
#define MEM1   4
#define MEM2   5
#define MEM4   6
#define MEM8   7
#define MEM12   8
#define MEM16   9
#define FBRA   10
#define CALLJ   11
#define M1   0x0800
#define M2   0x1000
#define M3   0x2000
#define REG_OPC(opc)   ((opc & 0xff0) << 20) | ((opc & 0xf) << 7)
#define R_0(opc)   ( REG_OPC(opc) | M1 | M2 | M3 ) /* No operands */
#define R_1(opc)   ( REG_OPC(opc) | M2 | M3 ) /* 1 operand: src1 */
#define R_1D(opc)   ( REG_OPC(opc) | M1 | M2 ) /* 1 operand: dst */
#define R_2(opc)   ( REG_OPC(opc) | M3 ) /* 2 ops: src1/src2 */
#define R_2D(opc)   ( REG_OPC(opc) | M2 ) /* 2 ops: src1/dst */
#define R_3(opc)   ( REG_OPC(opc) ) /* 3 operands */
#define SFR   0x10 /* Mask for the "sfr-OK" bit */
#define LIT   0x08 /* Mask for the "literal-OK" bit */
#define FP   0x04 /* Mask for "floating-point-OK" bit */
#define OP(align, lit, fp, sfr)   ( align | lit | fp | sfr )
#define R   OP( 0, 0, 0, 0 )
#define RS   OP( 0, 0, 0, SFR )
#define RL   OP( 0, LIT, 0, 0 )
#define RSL   OP( 0, LIT, 0, SFR )
#define F   OP( 0, 0, FP, 0 )
#define FL   OP( 0, LIT, FP, 0 )
#define R2   OP( 1, 0, 0, 0 )
#define RL2   OP( 1, LIT, 0, 0 )
#define F2   OP( 1, 0, FP, 0 )
#define FL2   OP( 1, LIT, FP, 0 )
#define R4   OP( 3, 0, 0, 0 )
#define RL4   OP( 3, LIT, 0, 0 )
#define F4   OP( 3, 0, FP, 0 )
#define FL4   OP( 3, LIT, FP, 0 )
#define M   0x7f /* Memory operand (MEMA & MEMB format instructions) */
#define SFR_OK(od)   (od & SFR) /* TRUE if sfr operand allowed */
#define LIT_OK(od)   (od & LIT) /* TRUE if literal operand allowed */
#define FP_OK(od)   (od & FP) /* TRUE if floating-point op allowed */
#define REG_ALIGN(od, n)   ((od & 0x3 & n) == 0)
#define MEMOP(od)   (od == M) /* TRUE if operand is a memory operand*/
#define I_BASE   0x01 /* 80960 base instruction set */
#define I_CX   0x02 /* 80960Cx instruction */
#define I_DEC   0x04 /* Decimal instruction */
#define I_FP   0x08 /* Floating point instruction */
#define I_KX   0x10 /* 80960Kx instruction */
#define I_MIL   0x20 /* Military instruction */
#define I_CASIM   0x40 /* CA simulator instruction */
#define I_CX2   0x80 /* Cx/Jx/Hx instructions */
#define I_JX   0x100 /* Jx/Hx instruction */
#define I_HX   0x200 /* Hx instructions */

Class Documentation

struct i960_opcode

Definition at line 135 of file i960.h.

Class Members
char format
short iclass
char * name
char num_ops
long opcode
char operand

Define Documentation

#define CALLJ   11

Definition at line 48 of file i960.h.

#define COBR   1

Definition at line 38 of file i960.h.

#define COJ   2

Definition at line 39 of file i960.h.

#define CTRL   0

Definition at line 37 of file i960.h.

#define F   OP( 0, 0, FP, 0 )

Definition at line 112 of file i960.h.

#define F2   OP( 1, 0, FP, 0 )

Definition at line 116 of file i960.h.

#define F4   OP( 3, 0, FP, 0 )

Definition at line 120 of file i960.h.

#define FBRA   10

Definition at line 47 of file i960.h.

#define FL   OP( 0, LIT, FP, 0 )

Definition at line 113 of file i960.h.

#define FL2   OP( 1, LIT, FP, 0 )

Definition at line 117 of file i960.h.

#define FL4   OP( 3, LIT, FP, 0 )

Definition at line 121 of file i960.h.

#define FP   0x04 /* Mask for "floating-point-OK" bit */

Definition at line 101 of file i960.h.

#define FP_OK (   od)    (od & FP) /* TRUE if floating-point op allowed */

Definition at line 129 of file i960.h.

#define I_BASE   0x01 /* 80960 base instruction set */

Definition at line 150 of file i960.h.

#define I_CASIM   0x40 /* CA simulator instruction */

Definition at line 156 of file i960.h.

#define I_CX   0x02 /* 80960Cx instruction */

Definition at line 151 of file i960.h.

#define I_CX2   0x80 /* Cx/Jx/Hx instructions */

Definition at line 157 of file i960.h.

#define I_DEC   0x04 /* Decimal instruction */

Definition at line 152 of file i960.h.

#define I_FP   0x08 /* Floating point instruction */

Definition at line 153 of file i960.h.

#define I_HX   0x200 /* Hx instructions */

Definition at line 159 of file i960.h.

#define I_JX   0x100 /* Jx/Hx instruction */

Definition at line 158 of file i960.h.

#define I_KX   0x10 /* 80960Kx instruction */

Definition at line 154 of file i960.h.

#define I_MIL   0x20 /* Military instruction */

Definition at line 155 of file i960.h.

#define LIT   0x08 /* Mask for the "literal-OK" bit */

Definition at line 100 of file i960.h.

#define LIT_OK (   od)    (od & LIT) /* TRUE if literal operand allowed */

Definition at line 128 of file i960.h.

#define M   0x7f /* Memory operand (MEMA & MEMB format instructions) */

Definition at line 123 of file i960.h.

#define M1   0x0800

Definition at line 51 of file i960.h.

#define M2   0x1000

Definition at line 52 of file i960.h.

#define M3   0x2000

Definition at line 53 of file i960.h.

#define MEM1   4

Definition at line 41 of file i960.h.

#define MEM12   8

Definition at line 45 of file i960.h.

#define MEM16   9

Definition at line 46 of file i960.h.

#define MEM2   5

Definition at line 42 of file i960.h.

#define MEM4   6

Definition at line 43 of file i960.h.

#define MEM8   7

Definition at line 44 of file i960.h.

#define MEMOP (   od)    (od == M) /* TRUE if operand is a memory operand*/

Definition at line 132 of file i960.h.

#define OP (   align,
  lit,
  fp,
  sfr 
)    ( align | lit | fp | sfr )

Definition at line 106 of file i960.h.

R3 R   OP( 0, 0, 0, 0 )

Definition at line 108 of file i960.h.

relocs R3< local >< dummy1 >< dummy2 > R2   OP( 1, 0, 0, 0 )

Definition at line 114 of file i960.h.

f0 R4   OP( 3, 0, 0, 0 )

Definition at line 118 of file i960.h.

#define R_0 (   opc)    ( REG_OPC(opc) | M1 | M2 | M3 ) /* No operands */

Definition at line 74 of file i960.h.

#define R_1 (   opc)    ( REG_OPC(opc) | M2 | M3 ) /* 1 operand: src1 */

Definition at line 75 of file i960.h.

#define R_1D (   opc)    ( REG_OPC(opc) | M1 | M2 ) /* 1 operand: dst */

Definition at line 76 of file i960.h.

#define R_2 (   opc)    ( REG_OPC(opc) | M3 ) /* 2 ops: src1/src2 */

Definition at line 77 of file i960.h.

#define R_2D (   opc)    ( REG_OPC(opc) | M2 ) /* 2 ops: src1/dst */

Definition at line 78 of file i960.h.

#define R_3 (   opc)    ( REG_OPC(opc) ) /* 3 operands */

Definition at line 79 of file i960.h.

#define REG   3

Definition at line 40 of file i960.h.

#define REG_ALIGN (   od,
  n 
)    ((od & 0x3 & n) == 0)

Definition at line 130 of file i960.h.

#define REG_OPC (   opc)    ((opc & 0xff0) << 20) | ((opc & 0xf) << 7)

Definition at line 60 of file i960.h.

#define RL   OP( 0, LIT, 0, 0 )

Definition at line 110 of file i960.h.

#define RL2   OP( 1, LIT, 0, 0 )

Definition at line 115 of file i960.h.

#define RL4   OP( 3, LIT, 0, 0 )

Definition at line 119 of file i960.h.

#define RS   OP( 0, 0, 0, SFR )

Definition at line 109 of file i960.h.

#define RSL   OP( 0, LIT, 0, SFR )

Definition at line 111 of file i960.h.

#define SFR   0x10 /* Mask for the "sfr-OK" bit */

Definition at line 99 of file i960.h.

#define SFR_OK (   od)    (od & SFR) /* TRUE if sfr operand allowed */

Definition at line 127 of file i960.h.