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cell-binutils  2.17cvs20070401
i860.h
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00001 /* Table of opcodes for the i860.
00002    Copyright 1989, 1991, 2000, 2002, 2003 Free Software Foundation, Inc.
00003 
00004 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
00005 
00006 GAS/GDB is free software; you can redistribute it and/or modify
00007 it under the terms of the GNU General Public License as published by
00008 the Free Software Foundation; either version 1, or (at your option)
00009 any later version.
00010 
00011 GAS/GDB is distributed in the hope that it will be useful,
00012 but WITHOUT ANY WARRANTY; without even the implied warranty of
00013 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014 GNU General Public License for more details.
00015 
00016 You should have received a copy of the GNU General Public License
00017 along with GAS or GDB; see the file COPYING.  If not, write to
00018 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
00019 Boston, MA 02110-1301, USA.  */
00020 
00021 
00022 /* Structure of an opcode table entry.  */
00023 struct i860_opcode
00024 {
00025     /* The opcode name.  */
00026     const char *name;
00027 
00028     /* Bits that must be set.  */
00029     unsigned long match;
00030 
00031     /* Bits that must not be set.  */
00032     unsigned long lose;
00033 
00034     const char *args;
00035 
00036     /* Nonzero if this is a possible expand-instruction.  */
00037     char expand;
00038 };
00039 
00040 
00041 enum expand_type
00042 {
00043     E_MOV = 1, E_ADDR, E_U32, E_AND, E_S32, E_DELAY, XP_ONLY
00044 };
00045 
00046 
00047 /* All i860 opcodes are 32 bits, except for the pseudo-instructions
00048    and the operations utilizing a 32-bit address expression, an
00049    unsigned 32-bit constant, or a signed 32-bit constant.
00050    These opcodes are expanded into a two-instruction sequence for
00051    any situation where the immediate operand does not fit in 32 bits.
00052    In the case of the add and subtract operations the expansion is
00053    to a three-instruction sequence (ex: orh, or, adds).  In cases
00054    where the address is to be relocated, the instruction is
00055    expanded to handle the worse case, this could be optimized at
00056    the final link if the actual address were known.
00057 
00058    The pseudoinstructions are:  mov, fmov, pmov, nop, and fnop.
00059    These instructions are implemented as a one or two instruction
00060    sequence of other operations.
00061 
00062    The match component is a mask saying which bits must match a
00063    particular opcode in order for an instruction to be an instance
00064    of that opcode.
00065 
00066    The args component is a string containing one character
00067    for each operand of the instruction.
00068 
00069 Kinds of operands:
00070    #    Number used by optimizer.  It is ignored.
00071    1    src1 integer register.
00072    2    src2 integer register.
00073    d    dest register.
00074    c   ctrlreg control register.
00075    i    16 bit immediate.
00076    I    16 bit immediate, aligned 2^0. (ld.b)
00077    J    16 bit immediate, aligned 2^1. (ld.s)
00078    K    16 bit immediate, aligned 2^2. (ld.l, {p}fld.l, fst.l)
00079    L    16 bit immediate, aligned 2^3. ({p}fld.d, fst.d)
00080    M    16 bit immediate, aligned 2^4. ({p}fld.q, fst.q)
00081    5    5 bit immediate.
00082    l    lbroff 26 bit PC relative immediate.
00083    r    sbroff 16 bit PC relative immediate.
00084    s   split 16 bit immediate.
00085    S   split 16 bit immediate, aligned 2^0. (st.b)
00086    T   split 16 bit immediate, aligned 2^1. (st.s)
00087    U   split 16 bit immediate, aligned 2^2. (st.l)
00088    e    src1 floating point register.
00089    f    src2 floating point register.
00090    g    dest floating point register.  */
00091 
00092 
00093 /* The order of the opcodes in this table is significant. The assembler
00094    requires that all instances of the same mnemonic must be consecutive.
00095    If they aren't, the assembler will not function properly.
00096  
00097    The order of opcodes does not affect the disassembler.  */
00098 
00099 static const struct i860_opcode i860_opcodes[] =
00100 {
00101 /* REG-Format Instructions.  */
00102 { "ld.c",     0x30000000, 0xcc000000, "c,d", 0 },       /* ld.c csrc2,idest */
00103 { "ld.b",     0x00000000, 0xfc000000, "1(2),d", 0 },    /* ld.b isrc1(isrc2),idest */
00104 { "ld.b",     0x04000000, 0xf8000000, "I(2),d", E_ADDR },      /* ld.b #const(isrc2),idest */
00105 { "ld.s",     0x10000000, 0xec000001, "1(2),d", 0 },    /* ld.s isrc1(isrc2),idest */
00106 { "ld.s",     0x14000000, 0xe8000001, "J(2),d", E_ADDR },      /* ld.s #const(isrc2),idest */
00107 { "ld.l",     0x10000001, 0xec000000, "1(2),d", 0 },    /* ld.l isrc1(isrc2),idest */
00108 { "ld.l",     0x14000001, 0xe8000000, "K(2),d", E_ADDR },      /* ld.l #const(isrc2),idest */
00109 
00110 { "st.c",     0x38000000, 0xc4000000, "1,c", 0 },       /* st.c isrc1ni,csrc2 */
00111 { "st.b",     0x0c000000, 0xf0000000, "1,S(2)", E_ADDR },      /* st.b isrc1ni,#const(isrc2) */
00112 { "st.s",     0x1c000000, 0xe0000001, "1,T(2)", E_ADDR },      /* st.s isrc1ni,#const(isrc2) */
00113 { "st.l",     0x1c000001, 0xe0000000, "1,U(2)", E_ADDR },      /* st.l isrc1ni,#const(isrc2) */
00114 
00115 { "ixfr",     0x08000000, 0xf4000000, "1,g", 0 },       /* ixfr isrc1ni,fdest */
00116 
00117 { "fld.l",    0x20000002, 0xdc000001, "1(2),g", 0 },    /* fld.l isrc1(isrc2),fdest */
00118 { "fld.l",    0x24000002, 0xd8000001, "K(2),g", E_ADDR },      /* fld.l #const(isrc2),fdest */
00119 { "fld.l",    0x20000003, 0xdc000000, "1(2)++,g", 0 },  /* fld.l isrc1(isrc2)++,fdest */
00120 { "fld.l",    0x24000003, 0xd8000000, "K(2)++,g", E_ADDR },    /* fld.l #const(isrc2)++,fdest */
00121 { "fld.d",    0x20000000, 0xdc000007, "1(2),g", 0 },    /* fld.d isrc1(isrc2),fdest */
00122 { "fld.d",    0x24000000, 0xd8000007, "L(2),g", E_ADDR },      /* fld.d #const(isrc2),fdest */
00123 { "fld.d",    0x20000001, 0xdc000006, "1(2)++,g", 0 },  /* fld.d isrc1(isrc2)++,fdest */
00124 { "fld.d",    0x24000001, 0xd8000006, "L(2)++,g", E_ADDR },    /* fld.d #const(isrc2)++,fdest */
00125 { "fld.q",    0x20000004, 0xdc000003, "1(2),g", 0 },    /* fld.q isrc1(isrc2),fdest */
00126 { "fld.q",    0x24000004, 0xd8000003, "M(2),g", E_ADDR },      /* fld.q #const(isrc2),fdest */
00127 { "fld.q",    0x20000005, 0xdc000002, "1(2)++,g", 0 },  /* fld.q isrc1(isrc2)++,fdest */
00128 { "fld.q",    0x24000005, 0xd8000002, "M(2)++,g", E_ADDR },    /* fld.q #const(isrc2)++,fdest */
00129 
00130 { "pfld.l",   0x60000002, 0x9c000001, "1(2),g", 0 },    /* pfld.l isrc1(isrc2),fdest */
00131 { "pfld.l",   0x64000002, 0x98000001, "K(2),g", E_ADDR },      /* pfld.l #const(isrc2),fdest */
00132 { "pfld.l",   0x60000003, 0x9c000000, "1(2)++,g", 0 },  /* pfld.l isrc1(isrc2)++,fdest */
00133 { "pfld.l",   0x64000003, 0x98000000, "K(2)++,g", E_ADDR },    /* pfld.l #const(isrc2)++,fdest */
00134 { "pfld.d",   0x60000000, 0x9c000007, "1(2),g", 0 },    /* pfld.d isrc1(isrc2),fdest */
00135 { "pfld.d",   0x64000000, 0x98000007, "L(2),g", E_ADDR },      /* pfld.d #const(isrc2),fdest */
00136 { "pfld.d",   0x60000001, 0x9c000006, "1(2)++,g", 0 },  /* pfld.d isrc1(isrc2)++,fdest */
00137 { "pfld.d",   0x64000001, 0x98000006, "L(2)++,g", E_ADDR },    /* pfld.d #const(isrc2)++,fdest */
00138 { "pfld.q",   0x60000004, 0x9c000003, "1(2),g", XP_ONLY },     /* pfld.q isrc1(isrc2),fdest */
00139 { "pfld.q",   0x64000004, 0x98000003, "L(2),g", XP_ONLY },     /* pfld.q #const(isrc2),fdest */
00140 { "pfld.q",   0x60000005, 0x9c000002, "1(2)++,g", XP_ONLY },   /* pfld.q isrc1(isrc2)++,fdest */
00141 { "pfld.q",   0x64000005, 0x98000002, "L(2)++,g", XP_ONLY },   /* pfld.q #const(isrc2)++,fdest */
00142 
00143 { "fst.l",    0x28000002, 0xd4000001, "g,1(2)", 0 },    /* fst.l fdest,isrc1(isrc2) */
00144 { "fst.l",    0x2c000002, 0xd0000001, "g,K(2)", E_ADDR },      /* fst.l fdest,#const(isrc2) */
00145 { "fst.l",    0x28000003, 0xd4000000, "g,1(2)++", 0 },  /* fst.l fdest,isrc1(isrc2)++ */
00146 { "fst.l",    0x2c000003, 0xd0000000, "g,K(2)++", E_ADDR },    /* fst.l fdest,#const(isrc2)++ */
00147 { "fst.d",    0x28000000, 0xd4000007, "g,1(2)", 0 },    /* fst.d fdest,isrc1(isrc2) */
00148 { "fst.d",    0x2c000000, 0xd0000007, "g,L(2)", E_ADDR },      /* fst.d fdest,#const(isrc2) */
00149 { "fst.d",    0x28000001, 0xd4000006, "g,1(2)++", 0 },  /* fst.d fdest,isrc1(isrc2)++ */
00150 { "fst.d",    0x2c000001, 0xd0000006, "g,L(2)++", E_ADDR },    /* fst.d fdest,#const(isrc2)++ */
00151 { "fst.q",    0x28000004, 0xd4000003, "g,1(2)", 0 },    /* fst.d fdest,isrc1(isrc2) */
00152 { "fst.q",    0x2c000004, 0xd0000003, "g,M(2)", E_ADDR },      /* fst.d fdest,#const(isrc2) */
00153 { "fst.q",    0x28000005, 0xd4000002, "g,1(2)++", 0 },  /* fst.d fdest,isrc1(isrc2)++ */
00154 { "fst.q",    0x2c000005, 0xd0000002, "g,M(2)++", E_ADDR },    /* fst.d fdest,#const(isrc2)++ */
00155 
00156 { "pst.d",    0x3c000000, 0xc0000007, "g,L(2)", E_ADDR },      /* pst.d fdest,#const(isrc2) */
00157 { "pst.d",    0x3c000001, 0xc0000006, "g,L(2)++", E_ADDR },    /* pst.d fdest,#const(isrc2)++ */
00158 
00159 { "addu",     0x80000000, 0x7c000000, "1,2,d", 0 },     /* addu isrc1,isrc2,idest */
00160 { "addu",     0x84000000, 0x78000000, "i,2,d", E_S32 }, /* addu #const,isrc2,idest */
00161 { "adds",     0x90000000, 0x6c000000, "1,2,d", 0 },     /* adds isrc1,isrc2,idest */
00162 { "adds",     0x94000000, 0x68000000, "i,2,d", E_S32 }, /* adds #const,isrc2,idest */
00163 { "subu",     0x88000000, 0x74000000, "1,2,d", 0 },     /* subu isrc1,isrc2,idest */
00164 { "subu",     0x8c000000, 0x70000000, "i,2,d", E_S32 }, /* subu #const,isrc2,idest */
00165 { "subs",     0x98000000, 0x64000000, "1,2,d", 0 },     /* subs isrc1,isrc2,idest */
00166 { "subs",     0x9c000000, 0x60000000, "i,2,d", E_S32 }, /* subs #const,isrc2,idest */
00167 
00168 { "shl",      0xa0000000, 0x5c000000, "1,2,d", 0 },     /* shl isrc1,isrc2,idest */
00169 { "shl",      0xa4000000, 0x58000000, "i,2,d", 0 },     /* shl #const,isrc2,idest */
00170 { "shr",      0xa8000000, 0x54000000, "1,2,d", 0 },     /* shr isrc1,isrc2,idest */
00171 { "shr",      0xac000000, 0x50000000, "i,2,d", 0 },     /* shr #const,isrc2,idest */
00172 { "shrd",     0xb0000000, 0x4c000000, "1,2,d", 0 },     /* shrd isrc1,isrc2,idest */
00173 { "shra",     0xb8000000, 0x44000000, "1,2,d", 0 },     /* shra isrc1,isrc2,idest */
00174 { "shra",     0xbc000000, 0x40000000, "i,2,d", 0 },     /* shra #const,isrc2,idest */
00175 
00176 { "mov",      0xa0000000, 0x5c00f800, "2,d", 0 },       /* shl r0,isrc2,idest */
00177 { "mov",      0x94000000, 0x69e00000, "i,d", E_MOV },   /* adds #const,r0,idest */
00178 { "nop",      0xa0000000, 0x5ffff800, "", 0 },   /* shl r0,r0,r0 */
00179 { "fnop",     0xb0000000, 0x4ffff800, "", 0 },   /* shrd r0,r0,r0 */
00180 
00181 { "trap",     0x44000000, 0xb8000000, "1,2,d", 0 },     /* trap isrc1ni,isrc2,idest */
00182 
00183 { "flush",    0x34000004, 0xc81f0003, "L(2)", E_ADDR }, /* flush #const(isrc2) */
00184 { "flush",    0x34000005, 0xc81f0002, "L(2)++", E_ADDR },      /* flush #const(isrc2)++ */
00185 
00186 { "and",      0xc0000000, 0x3c000000, "1,2,d", 0 },     /* and isrc1,isrc2,idest */
00187 { "and",      0xc4000000, 0x38000000, "i,2,d", E_AND }, /* and #const,isrc2,idest */
00188 { "andh",     0xcc000000, 0x30000000, "i,2,d", 0 },     /* andh #const,isrc2,idest */
00189 { "andnot",   0xd0000000, 0x2c000000, "1,2,d", 0 },     /* andnot isrc1,isrc2,idest */
00190 { "andnot",   0xd4000000, 0x28000000, "i,2,d", E_U32 }, /* andnot #const,isrc2,idest */
00191 { "andnoth",  0xdc000000, 0x20000000, "i,2,d", 0 },     /* andnoth #const,isrc2,idest */
00192 { "or",              0xe0000000, 0x1c000000, "1,2,d", 0 },     /* or isrc1,isrc2,idest */
00193 { "or",              0xe4000000, 0x18000000, "i,2,d", E_U32 }, /* or #const,isrc2,idest */
00194 { "orh",      0xec000000, 0x10000000, "i,2,d", 0 },     /* orh #const,isrc2,idest */
00195 { "xor",      0xf0000000, 0x0c000000, "1,2,d", 0 },     /* xor isrc1,isrc2,idest */
00196 { "xor",      0xf4000000, 0x08000000, "i,2,d", E_U32 }, /* xor #const,isrc2,idest */
00197 { "xorh",     0xfc000000, 0x00000000, "i,2,d", 0 },     /* xorh #const,isrc2,idest */
00198 
00199 { "bte",      0x58000000, 0xa4000000, "1,2,r", 0 },     /* bte isrc1s,isrc2,sbroff */
00200 { "bte",      0x5c000000, 0xa0000000, "5,2,r", 0 },     /* bte #const5,isrc2,sbroff */
00201 { "btne",     0x50000000, 0xac000000, "1,2,r", 0 },     /* btne isrc1s,isrc2,sbroff */
00202 { "btne",     0x54000000, 0xa8000000, "5,2,r", 0 },     /* btne #const5,isrc2,sbroff */
00203 { "bla",      0xb4000000, 0x48000000, "1,2,r", E_DELAY },      /* bla isrc1s,isrc2,sbroff */
00204 { "bri",      0x40000000, 0xbc000000, "1", E_DELAY },   /* bri isrc1ni */
00205 
00206 /* Core Escape Instruction Format */
00207 { "lock",     0x4c000001, 0xb000001e, "", 0 },   /* lock set BL in dirbase */
00208 { "calli",    0x4c000002, 0xb000001d, "1", E_DELAY },   /* calli isrc1ni */
00209 { "intovr",   0x4c000004, 0xb000001b, "", 0 },   /* intovr trap on integer overflow */
00210 { "unlock",   0x4c000007, 0xb0000018, "", 0 },   /* unlock clear BL in dirbase */
00211 { "ldio.l",   0x4c000408, 0xb00003f7, "2,d", XP_ONLY }, /* ldio.l isrc2,idest */
00212 { "ldio.s",   0x4c000208, 0xb00005f7, "2,d", XP_ONLY }, /* ldio.s isrc2,idest */
00213 { "ldio.b",   0x4c000008, 0xb00007f7, "2,d", XP_ONLY }, /* ldio.b isrc2,idest */
00214 { "stio.l",   0x4c000409, 0xb00003f6, "1,2", XP_ONLY }, /* stio.l isrc1ni,isrc2 */
00215 { "stio.s",   0x4c000209, 0xb00005f6, "1,2", XP_ONLY }, /* stio.s isrc1ni,isrc2 */
00216 { "stio.b",   0x4c000009, 0xb00007f6, "1,2", XP_ONLY }, /* stio.b isrc1ni,isrc2 */
00217 { "ldint.l",  0x4c00040a, 0xb00003f5, "2,d", XP_ONLY }, /* ldint.l isrc2,idest */
00218 { "ldint.s",  0x4c00020a, 0xb00005f5, "2,d", XP_ONLY }, /* ldint.s isrc2,idest */
00219 { "ldint.b",  0x4c00000a, 0xb00007f5, "2,d", XP_ONLY }, /* ldint.b isrc2,idest */
00220 { "scyc.b",   0x4c00000b, 0xb00007f4, "2", XP_ONLY },          /* scyc.b isrc2 */
00221 
00222 /* CTRL-Format Instructions */
00223 { "br",              0x68000000, 0x94000000, "l", E_DELAY },   /* br lbroff */
00224 { "call",     0x6c000000, 0x90000000, "l", E_DELAY },   /* call lbroff */
00225 { "bc",              0x70000000, 0x8c000000, "l", 0 },  /* bc lbroff */
00226 { "bc.t",     0x74000000, 0x88000000, "l", E_DELAY },   /* bc.t lbroff */
00227 { "bnc",      0x78000000, 0x84000000, "l", 0 },  /* bnc lbroff */
00228 { "bnc.t",    0x7c000000, 0x80000000, "l", E_DELAY },   /* bnc.t lbroff */
00229 
00230 /* Floating Point Escape Instruction Format - pfam.p fsrc1,fsrc2,fdest.  */
00231 { "r2p1.ss",  0x48000400, 0xb40001ff, "e,f,g", 0 },
00232 { "r2p1.sd",  0x48000480, 0xb400017f, "e,f,g", 0 },
00233 { "r2p1.dd",  0x48000580, 0xb400007f, "e,f,g", 0 },
00234 { "r2pt.ss",  0x48000401, 0xb40001fe, "e,f,g", 0 },
00235 { "r2pt.sd",  0x48000481, 0xb400017e, "e,f,g", 0 },
00236 { "r2pt.dd",  0x48000581, 0xb400007e, "e,f,g", 0 },
00237 { "r2ap1.ss", 0x48000402, 0xb40001fd, "e,f,g", 0 },
00238 { "r2ap1.sd", 0x48000482, 0xb400017d, "e,f,g", 0 },
00239 { "r2ap1.dd", 0x48000582, 0xb400007d, "e,f,g", 0 },
00240 { "r2apt.ss", 0x48000403, 0xb40001fc, "e,f,g", 0 },
00241 { "r2apt.sd", 0x48000483, 0xb400017c, "e,f,g", 0 },
00242 { "r2apt.dd", 0x48000583, 0xb400007c, "e,f,g", 0 },
00243 { "i2p1.ss",  0x48000404, 0xb40001fb, "e,f,g", 0 },
00244 { "i2p1.sd",  0x48000484, 0xb400017b, "e,f,g", 0 },
00245 { "i2p1.dd",  0x48000584, 0xb400007b, "e,f,g", 0 },
00246 { "i2pt.ss",  0x48000405, 0xb40001fa, "e,f,g", 0 },
00247 { "i2pt.sd",  0x48000485, 0xb400017a, "e,f,g", 0 },
00248 { "i2pt.dd",  0x48000585, 0xb400007a, "e,f,g", 0 },
00249 { "i2ap1.ss", 0x48000406, 0xb40001f9, "e,f,g", 0 },
00250 { "i2ap1.sd", 0x48000486, 0xb4000179, "e,f,g", 0 },
00251 { "i2ap1.dd", 0x48000586, 0xb4000079, "e,f,g", 0 },
00252 { "i2apt.ss", 0x48000407, 0xb40001f8, "e,f,g", 0 },
00253 { "i2apt.sd", 0x48000487, 0xb4000178, "e,f,g", 0 },
00254 { "i2apt.dd", 0x48000587, 0xb4000078, "e,f,g", 0 },
00255 { "rat1p2.ss",       0x48000408, 0xb40001f7, "e,f,g", 0 },
00256 { "rat1p2.sd",       0x48000488, 0xb4000177, "e,f,g", 0 },
00257 { "rat1p2.dd",       0x48000588, 0xb4000077, "e,f,g", 0 },
00258 { "m12apm.ss",       0x48000409, 0xb40001f6, "e,f,g", 0 },
00259 { "m12apm.sd",       0x48000489, 0xb4000176, "e,f,g", 0 },
00260 { "m12apm.dd",       0x48000589, 0xb4000076, "e,f,g", 0 },
00261 { "ra1p2.ss", 0x4800040a, 0xb40001f5, "e,f,g", 0 },
00262 { "ra1p2.sd", 0x4800048a, 0xb4000175, "e,f,g", 0 },
00263 { "ra1p2.dd", 0x4800058a, 0xb4000075, "e,f,g", 0 },
00264 { "m12ttpa.ss",      0x4800040b, 0xb40001f4, "e,f,g", 0 },
00265 { "m12ttpa.sd",      0x4800048b, 0xb4000174, "e,f,g", 0 },
00266 { "m12ttpa.dd",      0x4800058b, 0xb4000074, "e,f,g", 0 },
00267 { "iat1p2.ss",       0x4800040c, 0xb40001f3, "e,f,g", 0 },
00268 { "iat1p2.sd",       0x4800048c, 0xb4000173, "e,f,g", 0 },
00269 { "iat1p2.dd",       0x4800058c, 0xb4000073, "e,f,g", 0 },
00270 { "m12tpm.ss",       0x4800040d, 0xb40001f2, "e,f,g", 0 },
00271 { "m12tpm.sd",       0x4800048d, 0xb4000172, "e,f,g", 0 },
00272 { "m12tpm.dd",       0x4800058d, 0xb4000072, "e,f,g", 0 },
00273 { "ia1p2.ss", 0x4800040e, 0xb40001f1, "e,f,g", 0 },
00274 { "ia1p2.sd", 0x4800048e, 0xb4000171, "e,f,g", 0 },
00275 { "ia1p2.dd", 0x4800058e, 0xb4000071, "e,f,g", 0 },
00276 { "m12tpa.ss",       0x4800040f, 0xb40001f0, "e,f,g", 0 },
00277 { "m12tpa.sd",       0x4800048f, 0xb4000170, "e,f,g", 0 },
00278 { "m12tpa.dd",       0x4800058f, 0xb4000070, "e,f,g", 0 },
00279 
00280 /* Floating Point Escape Instruction Format - pfsm.p fsrc1,fsrc2,fdest.  */
00281 { "r2s1.ss",  0x48000410, 0xb40001ef, "e,f,g", 0 },
00282 { "r2s1.sd",  0x48000490, 0xb400016f, "e,f,g", 0 },
00283 { "r2s1.dd",  0x48000590, 0xb400006f, "e,f,g", 0 },
00284 { "r2st.ss",  0x48000411, 0xb40001ee, "e,f,g", 0 },
00285 { "r2st.sd",  0x48000491, 0xb400016e, "e,f,g", 0 },
00286 { "r2st.dd",  0x48000591, 0xb400006e, "e,f,g", 0 },
00287 { "r2as1.ss", 0x48000412, 0xb40001ed, "e,f,g", 0 },
00288 { "r2as1.sd", 0x48000492, 0xb400016d, "e,f,g", 0 },
00289 { "r2as1.dd", 0x48000592, 0xb400006d, "e,f,g", 0 },
00290 { "r2ast.ss", 0x48000413, 0xb40001ec, "e,f,g", 0 },
00291 { "r2ast.sd", 0x48000493, 0xb400016c, "e,f,g", 0 },
00292 { "r2ast.dd", 0x48000593, 0xb400006c, "e,f,g", 0 },
00293 { "i2s1.ss",  0x48000414, 0xb40001eb, "e,f,g", 0 },
00294 { "i2s1.sd",  0x48000494, 0xb400016b, "e,f,g", 0 },
00295 { "i2s1.dd",  0x48000594, 0xb400006b, "e,f,g", 0 },
00296 { "i2st.ss",  0x48000415, 0xb40001ea, "e,f,g", 0 },
00297 { "i2st.sd",  0x48000495, 0xb400016a, "e,f,g", 0 },
00298 { "i2st.dd",  0x48000595, 0xb400006a, "e,f,g", 0 },
00299 { "i2as1.ss", 0x48000416, 0xb40001e9, "e,f,g", 0 },
00300 { "i2as1.sd", 0x48000496, 0xb4000169, "e,f,g", 0 },
00301 { "i2as1.dd", 0x48000596, 0xb4000069, "e,f,g", 0 },
00302 { "i2ast.ss", 0x48000417, 0xb40001e8, "e,f,g", 0 },
00303 { "i2ast.sd", 0x48000497, 0xb4000168, "e,f,g", 0 },
00304 { "i2ast.dd", 0x48000597, 0xb4000068, "e,f,g", 0 },
00305 { "rat1s2.ss",       0x48000418, 0xb40001e7, "e,f,g", 0 },
00306 { "rat1s2.sd",       0x48000498, 0xb4000167, "e,f,g", 0 },
00307 { "rat1s2.dd",       0x48000598, 0xb4000067, "e,f,g", 0 },
00308 { "m12asm.ss",       0x48000419, 0xb40001e6, "e,f,g", 0 },
00309 { "m12asm.sd",       0x48000499, 0xb4000166, "e,f,g", 0 },
00310 { "m12asm.dd",       0x48000599, 0xb4000066, "e,f,g", 0 },
00311 { "ra1s2.ss", 0x4800041a, 0xb40001e5, "e,f,g", 0 },
00312 { "ra1s2.sd", 0x4800049a, 0xb4000165, "e,f,g", 0 },
00313 { "ra1s2.dd", 0x4800059a, 0xb4000065, "e,f,g", 0 },
00314 { "m12ttsa.ss",      0x4800041b, 0xb40001e4, "e,f,g", 0 },
00315 { "m12ttsa.sd",      0x4800049b, 0xb4000164, "e,f,g", 0 },
00316 { "m12ttsa.dd",      0x4800059b, 0xb4000064, "e,f,g", 0 },
00317 { "iat1s2.ss",       0x4800041c, 0xb40001e3, "e,f,g", 0 },
00318 { "iat1s2.sd",       0x4800049c, 0xb4000163, "e,f,g", 0 },
00319 { "iat1s2.dd",       0x4800059c, 0xb4000063, "e,f,g", 0 },
00320 { "m12tsm.ss",       0x4800041d, 0xb40001e2, "e,f,g", 0 },
00321 { "m12tsm.sd",       0x4800049d, 0xb4000162, "e,f,g", 0 },
00322 { "m12tsm.dd",       0x4800059d, 0xb4000062, "e,f,g", 0 },
00323 { "ia1s2.ss", 0x4800041e, 0xb40001e1, "e,f,g", 0 },
00324 { "ia1s2.sd", 0x4800049e, 0xb4000161, "e,f,g", 0 },
00325 { "ia1s2.dd", 0x4800059e, 0xb4000061, "e,f,g", 0 },
00326 { "m12tsa.ss",       0x4800041f, 0xb40001e0, "e,f,g", 0 },
00327 { "m12tsa.sd",       0x4800049f, 0xb4000160, "e,f,g", 0 },
00328 { "m12tsa.dd",       0x4800059f, 0xb4000060, "e,f,g", 0 },
00329 
00330 /* Floating Point Escape Instruction Format - pfmam.p fsrc1,fsrc2,fdest.  */
00331 { "mr2p1.ss", 0x48000000, 0xb40005ff, "e,f,g", 0 },
00332 { "mr2p1.sd", 0x48000080, 0xb400057f, "e,f,g", 0 },
00333 { "mr2p1.dd", 0x48000180, 0xb400047f, "e,f,g", 0 },
00334 { "mr2pt.ss", 0x48000001, 0xb40005fe, "e,f,g", 0 },
00335 { "mr2pt.sd", 0x48000081, 0xb400057e, "e,f,g", 0 },
00336 { "mr2pt.dd", 0x48000181, 0xb400047e, "e,f,g", 0 },
00337 { "mr2mp1.ss",       0x48000002, 0xb40005fd, "e,f,g", 0 },
00338 { "mr2mp1.sd",       0x48000082, 0xb400057d, "e,f,g", 0 },
00339 { "mr2mp1.dd",       0x48000182, 0xb400047d, "e,f,g", 0 },
00340 { "mr2mpt.ss",       0x48000003, 0xb40005fc, "e,f,g", 0 },
00341 { "mr2mpt.sd",       0x48000083, 0xb400057c, "e,f,g", 0 },
00342 { "mr2mpt.dd",       0x48000183, 0xb400047c, "e,f,g", 0 },
00343 { "mi2p1.ss", 0x48000004, 0xb40005fb, "e,f,g", 0 },
00344 { "mi2p1.sd", 0x48000084, 0xb400057b, "e,f,g", 0 },
00345 { "mi2p1.dd", 0x48000184, 0xb400047b, "e,f,g", 0 },
00346 { "mi2pt.ss", 0x48000005, 0xb40005fa, "e,f,g", 0 },
00347 { "mi2pt.sd", 0x48000085, 0xb400057a, "e,f,g", 0 },
00348 { "mi2pt.dd", 0x48000185, 0xb400047a, "e,f,g", 0 },
00349 { "mi2mp1.ss",       0x48000006, 0xb40005f9, "e,f,g", 0 },
00350 { "mi2mp1.sd",       0x48000086, 0xb4000579, "e,f,g", 0 },
00351 { "mi2mp1.dd",       0x48000186, 0xb4000479, "e,f,g", 0 },
00352 { "mi2mpt.ss",       0x48000007, 0xb40005f8, "e,f,g", 0 },
00353 { "mi2mpt.sd",       0x48000087, 0xb4000578, "e,f,g", 0 },
00354 { "mi2mpt.dd",       0x48000187, 0xb4000478, "e,f,g", 0 },
00355 { "mrmt1p2.ss",      0x48000008, 0xb40005f7, "e,f,g", 0 },
00356 { "mrmt1p2.sd",      0x48000088, 0xb4000577, "e,f,g", 0 },
00357 { "mrmt1p2.dd",      0x48000188, 0xb4000477, "e,f,g", 0 },
00358 { "mm12mpm.ss",      0x48000009, 0xb40005f6, "e,f,g", 0 },
00359 { "mm12mpm.sd",      0x48000089, 0xb4000576, "e,f,g", 0 },
00360 { "mm12mpm.dd",      0x48000189, 0xb4000476, "e,f,g", 0 },
00361 { "mrm1p2.ss",       0x4800000a, 0xb40005f5, "e,f,g", 0 },
00362 { "mrm1p2.sd",       0x4800008a, 0xb4000575, "e,f,g", 0 },
00363 { "mrm1p2.dd",       0x4800018a, 0xb4000475, "e,f,g", 0 },
00364 { "mm12ttpm.ss",0x4800000b, 0xb40005f4, "e,f,g", 0 },
00365 { "mm12ttpm.sd",0x4800008b, 0xb4000574, "e,f,g", 0 },
00366 { "mm12ttpm.dd",0x4800018b, 0xb4000474, "e,f,g", 0 },
00367 { "mimt1p2.ss",      0x4800000c, 0xb40005f3, "e,f,g", 0 },
00368 { "mimt1p2.sd",      0x4800008c, 0xb4000573, "e,f,g", 0 },
00369 { "mimt1p2.dd",      0x4800018c, 0xb4000473, "e,f,g", 0 },
00370 { "mm12tpm.ss",      0x4800000d, 0xb40005f2, "e,f,g", 0 },
00371 { "mm12tpm.sd",      0x4800008d, 0xb4000572, "e,f,g", 0 },
00372 { "mm12tpm.dd",      0x4800018d, 0xb4000472, "e,f,g", 0 },
00373 { "mim1p2.ss",       0x4800000e, 0xb40005f1, "e,f,g", 0 },
00374 { "mim1p2.sd",       0x4800008e, 0xb4000571, "e,f,g", 0 },
00375 { "mim1p2.dd",       0x4800018e, 0xb4000471, "e,f,g", 0 },
00376 
00377 /* Floating Point Escape Instruction Format - pfmsm.p fsrc1,fsrc2,fdest.  */
00378 { "mr2s1.ss", 0x48000010, 0xb40005ef, "e,f,g", 0 },
00379 { "mr2s1.sd", 0x48000090, 0xb400056f, "e,f,g", 0 },
00380 { "mr2s1.dd", 0x48000190, 0xb400046f, "e,f,g", 0 },
00381 { "mr2st.ss", 0x48000011, 0xb40005ee, "e,f,g", 0 },
00382 { "mr2st.sd", 0x48000091, 0xb400056e, "e,f,g", 0 },
00383 { "mr2st.dd", 0x48000191, 0xb400046e, "e,f,g", 0 },
00384 { "mr2ms1.ss",       0x48000012, 0xb40005ed, "e,f,g", 0 },
00385 { "mr2ms1.sd",       0x48000092, 0xb400056d, "e,f,g", 0 },
00386 { "mr2ms1.dd",       0x48000192, 0xb400046d, "e,f,g", 0 },
00387 { "mr2mst.ss",       0x48000013, 0xb40005ec, "e,f,g", 0 },
00388 { "mr2mst.sd",       0x48000093, 0xb400056c, "e,f,g", 0 },
00389 { "mr2mst.dd",       0x48000193, 0xb400046c, "e,f,g", 0 },
00390 { "mi2s1.ss", 0x48000014, 0xb40005eb, "e,f,g", 0 },
00391 { "mi2s1.sd", 0x48000094, 0xb400056b, "e,f,g", 0 },
00392 { "mi2s1.dd", 0x48000194, 0xb400046b, "e,f,g", 0 },
00393 { "mi2st.ss", 0x48000015, 0xb40005ea, "e,f,g", 0 },
00394 { "mi2st.sd", 0x48000095, 0xb400056a, "e,f,g", 0 },
00395 { "mi2st.dd", 0x48000195, 0xb400046a, "e,f,g", 0 },
00396 { "mi2ms1.ss",       0x48000016, 0xb40005e9, "e,f,g", 0 },
00397 { "mi2ms1.sd",       0x48000096, 0xb4000569, "e,f,g", 0 },
00398 { "mi2ms1.dd",       0x48000196, 0xb4000469, "e,f,g", 0 },
00399 { "mi2mst.ss",       0x48000017, 0xb40005e8, "e,f,g", 0 },
00400 { "mi2mst.sd",       0x48000097, 0xb4000568, "e,f,g", 0 },
00401 { "mi2mst.dd",       0x48000197, 0xb4000468, "e,f,g", 0 },
00402 { "mrmt1s2.ss",      0x48000018, 0xb40005e7, "e,f,g", 0 },
00403 { "mrmt1s2.sd",      0x48000098, 0xb4000567, "e,f,g", 0 },
00404 { "mrmt1s2.dd",      0x48000198, 0xb4000467, "e,f,g", 0 },
00405 { "mm12msm.ss",      0x48000019, 0xb40005e6, "e,f,g", 0 },
00406 { "mm12msm.sd",      0x48000099, 0xb4000566, "e,f,g", 0 },
00407 { "mm12msm.dd",      0x48000199, 0xb4000466, "e,f,g", 0 },
00408 { "mrm1s2.ss",       0x4800001a, 0xb40005e5, "e,f,g", 0 },
00409 { "mrm1s2.sd",       0x4800009a, 0xb4000565, "e,f,g", 0 },
00410 { "mrm1s2.dd",       0x4800019a, 0xb4000465, "e,f,g", 0 },
00411 { "mm12ttsm.ss",0x4800001b, 0xb40005e4, "e,f,g", 0 },
00412 { "mm12ttsm.sd",0x4800009b, 0xb4000564, "e,f,g", 0 },
00413 { "mm12ttsm.dd",0x4800019b, 0xb4000464, "e,f,g", 0 },
00414 { "mimt1s2.ss",      0x4800001c, 0xb40005e3, "e,f,g", 0 },
00415 { "mimt1s2.sd",      0x4800009c, 0xb4000563, "e,f,g", 0 },
00416 { "mimt1s2.dd",      0x4800019c, 0xb4000463, "e,f,g", 0 },
00417 { "mm12tsm.ss",      0x4800001d, 0xb40005e2, "e,f,g", 0 },
00418 { "mm12tsm.sd",      0x4800009d, 0xb4000562, "e,f,g", 0 },
00419 { "mm12tsm.dd",      0x4800019d, 0xb4000462, "e,f,g", 0 },
00420 { "mim1s2.ss",       0x4800001e, 0xb40005e1, "e,f,g", 0 },
00421 { "mim1s2.sd",       0x4800009e, 0xb4000561, "e,f,g", 0 },
00422 { "mim1s2.dd",       0x4800019e, 0xb4000461, "e,f,g", 0 },
00423 
00424 { "fmul.ss",  0x48000020, 0xb40005df, "e,f,g", 0 },     /* fmul.p fsrc1,fsrc2,fdest */
00425 { "fmul.sd",  0x480000a0, 0xb400055f, "e,f,g", 0 },     /* fmul.p fsrc1,fsrc2,fdest */
00426 { "fmul.dd",  0x480001a0, 0xb400045f, "e,f,g", 0 },     /* fmul.p fsrc1,fsrc2,fdest */
00427 { "pfmul.ss", 0x48000420, 0xb40001df, "e,f,g", 0 },     /* pfmul.p fsrc1,fsrc2,fdest */
00428 { "pfmul.sd", 0x480004a0, 0xb400015f, "e,f,g", 0 },     /* pfmul.p fsrc1,fsrc2,fdest */
00429 { "pfmul.dd", 0x480005a0, 0xb400005f, "e,f,g", 0 },     /* pfmul.p fsrc1,fsrc2,fdest */
00430 { "pfmul3.dd",       0x480005a4, 0xb400005b, "e,f,g", 0 },     /* pfmul3.p fsrc1,fsrc2,fdest */
00431 { "fmlow.dd", 0x480001a1, 0xb400045e, "e,f,g", 0 },     /* fmlow.dd fsrc1,fsrc2,fdest */
00432 { "frcp.ss",  0x48000022, 0xb40005dd, "f,g", 0 },       /* frcp.p fsrc2,fdest */
00433 { "frcp.sd",  0x480000a2, 0xb400055d, "f,g", 0 },       /* frcp.p fsrc2,fdest */
00434 { "frcp.dd",  0x480001a2, 0xb400045d, "f,g", 0 },       /* frcp.p fsrc2,fdest */
00435 { "frsqr.ss", 0x48000023, 0xb40005dc, "f,g", 0 },       /* frsqr.p fsrc2,fdest */
00436 { "frsqr.sd", 0x480000a3, 0xb400055c, "f,g", 0 },       /* frsqr.p fsrc2,fdest */
00437 { "frsqr.dd", 0x480001a3, 0xb400045c, "f,g", 0 },       /* frsqr.p fsrc2,fdest */
00438 { "fadd.ss",  0x48000030, 0xb40005cf, "e,f,g", 0 },     /* fadd.p fsrc1,fsrc2,fdest */
00439 { "fadd.sd",  0x480000b0, 0xb400054f, "e,f,g", 0 },     /* fadd.p fsrc1,fsrc2,fdest */
00440 { "fadd.dd",  0x480001b0, 0xb400044f, "e,f,g", 0 },     /* fadd.p fsrc1,fsrc2,fdest */
00441 { "pfadd.ss", 0x48000430, 0xb40001cf, "e,f,g", 0 },     /* pfadd.p fsrc1,fsrc2,fdest */
00442 { "pfadd.sd", 0x480004b0, 0xb400014f, "e,f,g", 0 },     /* pfadd.p fsrc1,fsrc2,fdest */
00443 { "pfadd.dd", 0x480005b0, 0xb400004f, "e,f,g", 0 },     /* pfadd.p fsrc1,fsrc2,fdest */
00444 { "fsub.ss",  0x48000031, 0xb40005ce, "e,f,g", 0 },     /* fsub.p fsrc1,fsrc2,fdest */
00445 { "fsub.sd",  0x480000b1, 0xb400054e, "e,f,g", 0 },     /* fsub.p fsrc1,fsrc2,fdest */
00446 { "fsub.dd",  0x480001b1, 0xb400044e, "e,f,g", 0 },     /* fsub.p fsrc1,fsrc2,fdest */
00447 { "pfsub.ss", 0x48000431, 0xb40001ce, "e,f,g", 0 },     /* pfsub.p fsrc1,fsrc2,fdest */
00448 { "pfsub.sd", 0x480004b1, 0xb400014e, "e,f,g", 0 },     /* pfsub.p fsrc1,fsrc2,fdest */
00449 { "pfsub.dd", 0x480005b1, 0xb400004e, "e,f,g", 0 },     /* pfsub.p fsrc1,fsrc2,fdest */
00450 { "fix.sd",   0x480000b2, 0xb400054d, "e,g", 0 },       /* fix.p fsrc1,fdest */
00451 { "fix.dd",   0x480001b2, 0xb400044d, "e,g", 0 },       /* fix.p fsrc1,fdest */
00452 { "pfix.sd",  0x480004b2, 0xb400014d, "e,g", 0 },       /* pfix.p fsrc1,fdest */
00453 { "pfix.dd",  0x480005b2, 0xb400004d, "e,g", 0 },       /* pfix.p fsrc1,fdest */
00454 { "famov.ss", 0x48000033, 0xb40005cc, "e,g", 0 },       /* famov.p fsrc1,fdest */
00455 { "famov.ds", 0x48000133, 0xb40004cc, "e,g", 0 },       /* famov.p fsrc1,fdest */
00456 { "famov.sd", 0x480000b3, 0xb400054c, "e,g", 0 },       /* famov.p fsrc1,fdest */
00457 { "famov.dd", 0x480001b3, 0xb400044c, "e,g", 0 },       /* famov.p fsrc1,fdest */
00458 { "pfamov.ss",       0x48000433, 0xb40001cc, "e,g", 0 },       /* pfamov.p fsrc1,fdest */
00459 { "pfamov.ds",       0x48000533, 0xb40000cc, "e,g", 0 },       /* pfamov.p fsrc1,fdest */
00460 { "pfamov.sd",       0x480004b3, 0xb400014c, "e,g", 0 },       /* pfamov.p fsrc1,fdest */
00461 { "pfamov.dd",       0x480005b3, 0xb400004c, "e,g", 0 },       /* pfamov.p fsrc1,fdest */
00462 /* Opcode pfgt has R bit cleared; pfle has R bit set.  */
00463 { "pfgt.ss",  0x48000434, 0xb40001cb, "e,f,g", 0 },     /* pfgt.p fsrc1,fsrc2,fdest */
00464 { "pfgt.dd",  0x48000534, 0xb40000cb, "e,f,g", 0 },     /* pfgt.p fsrc1,fsrc2,fdest */
00465 /* Opcode pfgt has R bit cleared; pfle has R bit set.  */
00466 { "pfle.ss",  0x480004b4, 0xb400014b, "e,f,g", 0 },     /* pfle.p fsrc1,fsrc2,fdest */
00467 { "pfle.dd",  0x480005b4, 0xb400004b, "e,f,g", 0 },     /* pfle.p fsrc1,fsrc2,fdest */
00468 { "pfeq.ss",  0x48000435, 0xb40001ca, "e,f,g", 0 },     /* pfeq.p fsrc1,fsrc2,fdest */
00469 { "pfeq.dd",  0x48000535, 0xb40000ca, "e,f,g", 0 },     /* pfeq.p fsrc1,fsrc2,fdest */
00470 { "ftrunc.sd",       0x480000ba, 0xb4000545, "e,g", 0 },       /* ftrunc.p fsrc1,fdest */
00471 { "ftrunc.dd",       0x480001ba, 0xb4000445, "e,g", 0 },       /* ftrunc.p fsrc1,fdest */
00472 { "pftrunc.sd",      0x480004ba, 0xb4000145, "e,g", 0 },       /* pftrunc.p fsrc1,fdest */
00473 { "pftrunc.dd",      0x480005ba, 0xb4000045, "e,g", 0 },       /* pftrunc.p fsrc1,fdest */
00474 { "fxfr",     0x48000040, 0xb40005bf, "e,d", 0 },       /* fxfr fsrc1,idest */
00475 { "fiadd.ss", 0x48000049, 0xb40005b6, "e,f,g", 0 },     /* fiadd.w fsrc1,fsrc2,fdest */
00476 { "fiadd.dd", 0x480001c9, 0xb4000436, "e,f,g", 0 },     /* fiadd.w fsrc1,fsrc2,fdest */
00477 { "pfiadd.ss",       0x48000449, 0xb40001b6, "e,f,g", 0 },     /* pfiadd.w fsrc1,fsrc2,fdest */
00478 { "pfiadd.dd",       0x480005c9, 0xb4000036, "e,f,g", 0 },     /* pfiadd.w fsrc1,fsrc2,fdest */
00479 { "fisub.ss", 0x4800004d, 0xb40005b2, "e,f,g", 0 },     /* fisub.w fsrc1,fsrc2,fdest */
00480 { "fisub.dd", 0x480001cd, 0xb4000432, "e,f,g", 0 },     /* fisub.w fsrc1,fsrc2,fdest */
00481 { "pfisub.ss",       0x4800044d, 0xb40001b2, "e,f,g", 0 },     /* pfisub.w fsrc1,fsrc2,fdest */
00482 { "pfisub.dd",       0x480005cd, 0xb4000032, "e,f,g", 0 },     /* pfisub.w fsrc1,fsrc2,fdest */
00483 { "fzchkl",   0x480001d7, 0xb4000428, "e,f,g", 0 },     /* fzchkl fsrc1,fsrc2,fdest */
00484 { "pfzchkl",  0x480005d7, 0xb4000028, "e,f,g", 0 },     /* pfzchkl fsrc1,fsrc2,fdest */
00485 { "fzchks",   0x480001df, 0xb4000420, "e,f,g", 0 },     /* fzchks fsrc1,fsrc2,fdest */
00486 { "pfzchks",  0x480005df, 0xb4000020, "e,f,g", 0 },     /* pfzchks fsrc1,fsrc2,fdest */
00487 { "faddp",    0x480001d0, 0xb400042f, "e,f,g", 0 },     /* faddp fsrc1,fsrc2,fdest */
00488 { "pfaddp",   0x480005d0, 0xb400002f, "e,f,g", 0 },     /* pfaddp fsrc1,fsrc2,fdest */
00489 { "faddz",    0x480001d1, 0xb400042e, "e,f,g", 0 },     /* faddz fsrc1,fsrc2,fdest */
00490 { "pfaddz",   0x480005d1, 0xb400002e, "e,f,g", 0 },     /* pfaddz fsrc1,fsrc2,fdest */
00491 { "form",     0x480001da, 0xb4000425, "e,g", 0 },       /* form fsrc1,fdest */
00492 { "pform",    0x480005da, 0xb4000025, "e,g", 0 },       /* pform fsrc1,fdest */
00493 
00494 /* Floating point pseudo-instructions.  */
00495 { "fmov.ss",  0x48000049, 0xb7e005b6, "e,g", 0 },       /* fiadd.ss fsrc1,f0,fdest */
00496 { "fmov.dd",  0x480001c9, 0xb7e00436, "e,g", 0 },       /* fiadd.dd fsrc1,f0,fdest */
00497 { "fmov.sd",  0x480000b3, 0xb400054c, "e,g", 0 },       /* famov.sd fsrc1,fdest */
00498 { "fmov.ds",  0x48000133, 0xb40004cc, "e,g", 0 },       /* famov.ds fsrc1,fdest */
00499 { "pfmov.ds", 0x48000533, 0xb40000cc, "e,g", 0 },       /* pfamov.ds fsrc1,fdest */
00500 { "pfmov.dd", 0x480005c9, 0xb7e00036, "e,g", 0 },       /* pfiadd.dd fsrc1,f0,fdest */
00501 { 0, 0, 0, 0, 0 },
00502 
00503 };
00504 
00505 #define NUMOPCODES ((sizeof i860_opcodes)/(sizeof i860_opcodes[0]))
00506 
00507