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i370.h
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00001 /* i370.h -- Header file for S/390 opcode table
00002    Copyright 1994, 1995, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
00003    PowerPC version written by Ian Lance Taylor, Cygnus Support
00004    Rewritten for i370 ESA/390 support, Linas Vepstas <linas@linas.org>
00005 
00006 This file is part of GDB, GAS, and the GNU binutils.
00007 
00008 GDB, GAS, and the GNU binutils are free software; you can redistribute
00009 them and/or modify them under the terms of the GNU General Public
00010 License as published by the Free Software Foundation; either version
00011 1, or (at your option) any later version.
00012 
00013 GDB, GAS, and the GNU binutils are distributed in the hope that they
00014 will be useful, but WITHOUT ANY WARRANTY; without even the implied
00015 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
00016 the GNU General Public License for more details.
00017 
00018 You should have received a copy of the GNU General Public License
00019 along with this file; see the file COPYING.  If not, write to the Free
00020 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00021 
00022 #ifndef I370_H
00023 #define I370_H
00024 
00025 /* The opcode table is an array of struct i370_opcode.  */
00026 typedef union
00027 {
00028    unsigned int   i[2];
00029    unsigned short s[4];
00030    unsigned char  b[8];
00031 }  i370_insn_t;
00032 
00033 struct i370_opcode
00034 {
00035   /* The opcode name.  */
00036   const char *name;
00037 
00038   /* the length of the instruction */
00039   char len;
00040 
00041   /* The opcode itself.  Those bits which will be filled in with
00042      operands are zeroes.  */
00043   i370_insn_t opcode;
00044 
00045   /* The opcode mask.  This is used by the disassembler.  This is a
00046      mask containing ones indicating those bits which must match the
00047      opcode field, and zeroes indicating those bits which need not
00048      match (and are presumably filled in by operands).  */
00049   i370_insn_t mask;
00050 
00051   /* One bit flags for the opcode.  These are used to indicate which
00052      specific processors support the instructions.  The defined values
00053      are listed below.  */
00054   unsigned long flags;
00055 
00056   /* An array of operand codes.  Each code is an index into the
00057      operand table.  They appear in the order which the operands must
00058      appear in assembly code, and are terminated by a zero.  */
00059   unsigned char operands[8];
00060 };
00061 
00062 /* The table itself is sorted by major opcode number, and is otherwise
00063    in the order in which the disassembler should consider
00064    instructions.  */
00065 extern const struct i370_opcode i370_opcodes[];
00066 extern const int i370_num_opcodes;
00067 
00068 /* Values defined for the flags field of a struct i370_opcode.  */
00069 
00070 /* Opcode is defined for the original 360 architecture.  */
00071 #define I370_OPCODE_360 (0x01)
00072 
00073 /* Opcode is defined for the 370 architecture.  */
00074 #define I370_OPCODE_370 (0x02)
00075 
00076 /* Opcode is defined for the 370-XA architecture.  */
00077 #define I370_OPCODE_370_XA (0x04)
00078 
00079 /* Opcode is defined for the ESA/370 architecture.  */
00080 #define I370_OPCODE_ESA370 (0x08)
00081 
00082 /* Opcode is defined for the ESA/390 architecture.  */
00083 #define I370_OPCODE_ESA390 (0x10)
00084 
00085 /* Opcode is defined for the ESA/390 w/ BFP facility.  */
00086 #define I370_OPCODE_ESA390_BF (0x20)
00087 
00088 /* Opcode is defined for the ESA/390 w/ branch & set authority facility.  */
00089 #define I370_OPCODE_ESA390_BS (0x40)
00090 
00091 /* Opcode is defined for the ESA/390 w/ checksum facility.  */
00092 #define I370_OPCODE_ESA390_CK (0x80)
00093 
00094 /* Opcode is defined for the ESA/390 w/ compare & move extended facility.  */
00095 #define I370_OPCODE_ESA390_CM (0x100)
00096 
00097 /* Opcode is defined for the ESA/390 w/ flt.pt. support extensions facility. */
00098 #define I370_OPCODE_ESA390_FX (0x200)
00099 
00100 /* Opcode is defined for the ESA/390 w/ HFP facility. */
00101 #define I370_OPCODE_ESA390_HX (0x400)
00102 
00103 /* Opcode is defined for the ESA/390 w/ immediate & relative facility.  */
00104 #define I370_OPCODE_ESA390_IR (0x800)
00105 
00106 /* Opcode is defined for the ESA/390 w/ move-inverse facility.  */
00107 #define I370_OPCODE_ESA390_MI (0x1000)
00108 
00109 /* Opcode is defined for the ESA/390 w/ program-call-fast facility.  */
00110 #define I370_OPCODE_ESA390_PC (0x2000)
00111 
00112 /* Opcode is defined for the ESA/390 w/ perform-locked-op facility.  */
00113 #define I370_OPCODE_ESA390_PL (0x4000)
00114 
00115 /* Opcode is defined for the ESA/390 w/ square-root facility.  */
00116 #define I370_OPCODE_ESA390_QR (0x8000)
00117 
00118 /* Opcode is defined for the ESA/390 w/ resume-program facility.  */
00119 #define I370_OPCODE_ESA390_RP (0x10000)
00120 
00121 /* Opcode is defined for the ESA/390 w/ set-address-space-fast facility.  */
00122 #define I370_OPCODE_ESA390_SA (0x20000)
00123 
00124 /* Opcode is defined for the ESA/390 w/ subspace group facility.  */
00125 #define I370_OPCODE_ESA390_SG (0x40000)
00126 
00127 /* Opcode is defined for the ESA/390 w/ string facility.  */
00128 #define I370_OPCODE_ESA390_SR (0x80000)
00129 
00130 /* Opcode is defined for the ESA/390 w/ trap facility.  */
00131 #define I370_OPCODE_ESA390_TR (0x100000)
00132 
00133 #define I370_OPCODE_ESA390_SUPERSET (0x1fffff)
00134 
00135 
00136 /* The operands table is an array of struct i370_operand.  */
00137 
00138 struct i370_operand
00139 {
00140   /* The number of bits in the operand.  */
00141   int bits;
00142 
00143   /* How far the operand is left shifted in the instruction.  */
00144   int shift;
00145 
00146   /* Insertion function.  This is used by the assembler.  To insert an
00147      operand value into an instruction, check this field.
00148 
00149      If it is NULL, execute
00150          i |= (op & ((1 << o->bits) - 1)) << o->shift;
00151      (i is the instruction which we are filling in, o is a pointer to
00152      this structure, and op is the opcode value; this assumes twos
00153      complement arithmetic).
00154 
00155      If this field is not NULL, then simply call it with the
00156      instruction and the operand value.  It will return the new value
00157      of the instruction.  If the ERRMSG argument is not NULL, then if
00158      the operand value is illegal, *ERRMSG will be set to a warning
00159      string (the operand will be inserted in any case).  If the
00160      operand value is legal, *ERRMSG will be unchanged (most operands
00161      can accept any value).  */
00162   i370_insn_t (*insert)
00163     (i370_insn_t instruction, long op, const char **errmsg);
00164 
00165   /* Extraction function.  This is used by the disassembler.  To
00166      extract this operand type from an instruction, check this field.
00167 
00168      If it is NULL, compute
00169          op = ((i) >> o->shift) & ((1 << o->bits) - 1);
00170         if ((o->flags & I370_OPERAND_SIGNED) != 0
00171            && (op & (1 << (o->bits - 1))) != 0)
00172           op -= 1 << o->bits;
00173      (i is the instruction, o is a pointer to this structure, and op
00174      is the result; this assumes twos complement arithmetic).
00175 
00176      If this field is not NULL, then simply call it with the
00177      instruction value.  It will return the value of the operand.  If
00178      the INVALID argument is not NULL, *INVALID will be set to
00179      non-zero if this operand type can not actually be extracted from
00180      this operand (i.e., the instruction does not match).  If the
00181      operand is valid, *INVALID will not be changed.  */
00182   long (*extract) (i370_insn_t instruction, int *invalid);
00183 
00184   /* One bit syntax flags.  */
00185   unsigned long flags;
00186 
00187   /* name -- handy for debugging, otherwise pointless */
00188   char * name;
00189 };
00190 
00191 /* Elements in the table are retrieved by indexing with values from
00192    the operands field of the i370_opcodes table.  */
00193 
00194 extern const struct i370_operand i370_operands[];
00195 
00196 /* Values defined for the flags field of a struct i370_operand.  */
00197 
00198 /* This operand should be wrapped in parentheses rather than
00199    separated from the previous by a comma.  This is used for S, RS and
00200    SS form instructions which want their operands to look like
00201    reg,displacement(basereg) */
00202 #define I370_OPERAND_SBASE (0x01)
00203 
00204 /* This operand is a base register.  It may or may not appear next
00205    to an index register, i.e. either of the two forms
00206    reg,displacement(basereg)
00207    reg,displacement(index,basereg) */
00208 #define I370_OPERAND_BASE (0x02)
00209 
00210 /* This pair of operands should be wrapped in parentheses rather than
00211    separated from the last by a comma.  This is used for the RX form
00212    instructions which want their operands to look like
00213    reg,displacement(index,basereg) */
00214 #define I370_OPERAND_INDEX (0x04)
00215 
00216 /* This operand names a register.  The disassembler uses this to print
00217    register names with a leading 'r'.  */
00218 #define I370_OPERAND_GPR (0x08)
00219 
00220 /* This operand names a floating point register.  The disassembler
00221    prints these with a leading 'f'.  */
00222 #define I370_OPERAND_FPR (0x10)
00223 
00224 /* This operand is a displacement.  */
00225 #define I370_OPERAND_RELATIVE (0x20)
00226 
00227 /* This operand is a length, such as that in SS form instructions.  */
00228 #define I370_OPERAND_LENGTH (0x40)
00229 
00230 /* This operand is optional, and is zero if omitted.  This is used for
00231    the optional B2 field in the shift-left, shift-right instructions.  The
00232    assembler must count the number of operands remaining on the line,
00233    and the number of operands remaining for the opcode, and decide
00234    whether this operand is present or not.  The disassembler should
00235    print this operand out only if it is not zero.  */
00236 #define I370_OPERAND_OPTIONAL (0x80)
00237 
00238 
00239 /* Define some misc macros.  We keep them with the operands table
00240    for simplicity.  The macro table is an array of struct i370_macro.  */
00241 
00242 struct i370_macro
00243 {
00244   /* The macro name.  */
00245   const char *name;
00246 
00247   /* The number of operands the macro takes.  */
00248   unsigned int operands;
00249 
00250   /* One bit flags for the opcode.  These are used to indicate which
00251      specific processors support the instructions.  The values are the
00252      same as those for the struct i370_opcode flags field.  */
00253   unsigned long flags;
00254 
00255   /* A format string to turn the macro into a normal instruction.
00256      Each %N in the string is replaced with operand number N (zero
00257      based).  */
00258   const char *format;
00259 };
00260 
00261 extern const struct i370_macro i370_macros[];
00262 extern const int i370_num_macros;
00263 
00264 
00265 #endif /* I370_H */