Back to index

cell-binutils  2.17cvs20070401
hppa.h
Go to the documentation of this file.
00001 /* Table of opcodes for the PA-RISC.
00002    Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
00003    2001, 2002, 2003, 2004, 2005
00004    Free Software Foundation, Inc.
00005 
00006    Contributed by the Center for Software Science at the
00007    University of Utah (pa-gdb-bugs@cs.utah.edu).
00008 
00009 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
00010 
00011 GAS/GDB is free software; you can redistribute it and/or modify
00012 it under the terms of the GNU General Public License as published by
00013 the Free Software Foundation; either version 1, or (at your option)
00014 any later version.
00015 
00016 GAS/GDB is distributed in the hope that it will be useful,
00017 but WITHOUT ANY WARRANTY; without even the implied warranty of
00018 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00019 GNU General Public License for more details.
00020 
00021 You should have received a copy of the GNU General Public License
00022 along with GAS or GDB; see the file COPYING.  If not, write to
00023 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00024 
00025 #if !defined(__STDC__) && !defined(const)
00026 #define const
00027 #endif
00028 
00029 /*
00030  * Structure of an opcode table entry.
00031  */
00032 
00033 /* There are two kinds of delay slot nullification: normal which is
00034  * controled by the nullification bit, and conditional, which depends
00035  * on the direction of the branch and its success or failure.
00036  *
00037  * NONE is unfortunately #defined in the hiux system include files.  
00038  * #undef it away.
00039  */
00040 #undef NONE
00041 struct pa_opcode
00042 {
00043     const char *name;
00044     unsigned long int match;       /* Bits that must be set...  */
00045     unsigned long int mask; /* ... in these bits. */
00046     char *args;
00047     enum pa_arch arch;
00048     char flags;
00049 };
00050 
00051 /* Enables strict matching.  Opcodes with match errors are skipped
00052    when this bit is set.  */
00053 #define FLAG_STRICT 0x1
00054 
00055 /*
00056    All hppa opcodes are 32 bits.
00057 
00058    The match component is a mask saying which bits must match a
00059    particular opcode in order for an instruction to be an instance
00060    of that opcode.
00061 
00062    The args component is a string containing one character for each operand of
00063    the instruction.  Characters used as a prefix allow any second character to
00064    be used without conflicting with the main operand characters.
00065 
00066    Bit positions in this description follow HP usage of lsb = 31,
00067    "at" is lsb of field.
00068 
00069    In the args field, the following characters must match exactly:
00070 
00071        '+,() '
00072 
00073    In the args field, the following characters are unused:
00074 
00075        '  "         -  /   34 6789:;    '
00076        '@  C         M             [\]  '
00077        '`    e g                     }  '
00078 
00079    Here are all the characters:
00080 
00081        ' !"#$%&'()*+-,./0123456789:;<=>?'
00082        '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
00083        '`abcdefghijklmnopqrstuvwxyz{|}~ '
00084 
00085 Kinds of operands:
00086    x    integer register field at 15.
00087    b    integer register field at 10.
00088    t    integer register field at 31.
00089    a   integer register field at 10 and 15 (for PERMH)
00090    5    5 bit immediate at 15.
00091    s    2 bit space specifier at 17.
00092    S    3 bit space specifier at 18.
00093    V    5 bit immediate value at 31
00094    i    11 bit immediate value at 31
00095    j    14 bit immediate value at 31
00096    k    21 bit immediate value at 31
00097    l    16 bit immediate value at 31 (wide mode only, unusual encoding).
00098    n   nullification for branch instructions
00099    N   nullification for spop and copr instructions
00100    w    12 bit branch displacement
00101    W    17 bit branch displacement (PC relative)
00102    X    22 bit branch displacement (PC relative)
00103    z    17 bit branch displacement (just a number, not an address)
00104 
00105 Also these:
00106 
00107    .    2 bit shift amount at 25
00108    *    4 bit shift amount at 25
00109    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
00110         31-p
00111    ~    6 bit shift count at 20,22:26 encoded as 63-~.
00112    P    5 bit bit position at 26
00113    q    6 bit bit position at 20,22:26
00114    T    5 bit field length at 31 (encoded as 32-T)
00115    %   6 bit field length at 23,27:31 (variable extract/deposit)
00116    |   6 bit field length at 19,27:31 (fixed extract/deposit)
00117    A    13 bit immediate at 18 (to support the BREAK instruction)
00118    ^   like b, but describes a control register
00119    !    sar (cr11) register
00120    D    26 bit immediate at 31 (to support the DIAG instruction)
00121    $    9 bit immediate at 28 (to support POPBTS)
00122 
00123    v    3 bit Special Function Unit identifier at 25
00124    O    20 bit Special Function Unit operation split between 15 bits at 20
00125         and 5 bits at 31
00126    o    15 bit Special Function Unit operation at 20
00127    2    22 bit Special Function Unit operation split between 17 bits at 20
00128         and 5 bits at 31
00129    1    15 bit Special Function Unit operation split between 10 bits at 20
00130         and 5 bits at 31
00131    0    10 bit Special Function Unit operation split between 5 bits at 20
00132         and 5 bits at 31
00133    u    3 bit coprocessor unit identifier at 25
00134    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
00135    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
00136        (for 0xe format FP instructions)
00137    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
00138    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
00139         (very similar to 'F')
00140 
00141    r   5 bit immediate value at 31 (for the break instruction)
00142        (very similar to V above, except the value is unsigned instead of
00143        low_sign_ext)
00144    R   5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
00145        (same as r above, except the value is in a different location)
00146    U   10 bit immediate value at 15 (for SSM, RSM on pa2.0)
00147    Q   5 bit immediate value at 10 (a bit position specified in
00148        the bb instruction. It's the same as r above, except the
00149         value is in a different location)
00150    B   5 bit immediate value at 10 (a bit position specified in
00151        the bb instruction. Similar to Q, but 64 bit handling is
00152        different.
00153    Z    %r1 -- implicit target of addil instruction.
00154    L    ,%r2 completer for new syntax branch
00155    {    Source format completer for fcnv
00156    _    Destination format completer for fcnv
00157    h    cbit for fcmp
00158    =    gfx tests for ftest
00159    d    14 bit offset for single precision FP long load/store.
00160    #    14 bit offset for double precision FP load long/store.
00161    J    Yet another 14 bit offset for load/store with ma,mb completers.
00162    K    Yet another 14 bit offset for load/store with ma,mb completers.
00163    y    16 bit offset for word aligned load/store (PA2.0 wide).
00164    &    16 bit offset for dword aligned load/store (PA2.0 wide).
00165    <    16 bit offset for load/store with ma,mb completers (PA2.0 wide).
00166    >    16 bit offset for load/store with ma,mb completers (PA2.0 wide).
00167    Y    %sr0,%r31 -- implicit target of be,l instruction.
00168    @   implicit immediate value of 0
00169 
00170 Completer operands all have 'c' as the prefix:
00171 
00172    cx   indexed load and store completer.
00173    cX   indexed load and store completer.  Like cx, but emits a space
00174        after in disassembler.
00175    cm   short load and store completer.
00176    cM   short load and store completer.  Like cm, but emits a space
00177         after in disassembler.
00178    cq   long load and store completer (like cm, but inserted into a
00179        different location in the target instruction).
00180    cs   store bytes short completer.
00181    cA   store bytes short completer.  Like cs, but emits a space
00182         after in disassembler.
00183    ce   long load/store completer for LDW/STW with a different encoding
00184        than the others
00185    cc   load cache control hint
00186    cd   load and clear cache control hint
00187    cC   store cache control hint
00188    co  ordered access
00189 
00190    cp  branch link and push completer
00191    cP  branch pop completer
00192    cl  branch link completer
00193    cg  branch gate completer
00194 
00195    cw  read/write completer for PROBE
00196    cW  wide completer for MFCTL
00197    cL  local processor completer for cache control
00198    cZ   System Control Completer (to support LPA, LHA, etc.)
00199 
00200    ci  correction completer for DCOR
00201    ca  add completer
00202    cy  32 bit add carry completer
00203    cY  64 bit add carry completer
00204    cv  signed overflow trap completer
00205    ct  trap on condition completer for ADDI, SUB
00206    cT  trap on condition completer for UADDCM
00207    cb  32 bit borrow completer for SUB
00208    cB  64 bit borrow completer for SUB
00209 
00210    ch  left/right half completer
00211    cH  signed/unsigned saturation completer
00212    cS  signed/unsigned completer at 21
00213    cz  zero/sign extension completer.
00214    c*  permutation completer
00215 
00216 Condition operands all have '?' as the prefix:
00217 
00218    ?f   Floating point compare conditions (encoded as 5 bits at 31)
00219 
00220    ?a  add conditions
00221    ?A  64 bit add conditions
00222    ?@   add branch conditions followed by nullify
00223    ?d  non-negated add branch conditions
00224    ?D  negated add branch conditions
00225    ?w  wide mode non-negated add branch conditions
00226    ?W  wide mode negated add branch conditions
00227 
00228    ?s   compare/subtract conditions
00229    ?S  64 bit compare/subtract conditions
00230    ?t   non-negated compare and branch conditions
00231    ?n   32 bit compare and branch conditions followed by nullify
00232    ?N   64 bit compare and branch conditions followed by nullify
00233    ?Q  64 bit compare and branch conditions for CMPIB instruction
00234 
00235    ?l   logical conditions
00236    ?L  64 bit logical conditions
00237 
00238    ?b   branch on bit conditions
00239    ?B  64 bit branch on bit conditions
00240 
00241    ?x   shift/extract/deposit conditions
00242    ?X  64 bit shift/extract/deposit conditions
00243    ?y   shift/extract/deposit conditions followed by nullify for conditional
00244         branches
00245 
00246    ?u   unit conditions
00247    ?U   64 bit unit conditions
00248 
00249 Floating point registers all have 'f' as a prefix:
00250 
00251    ft  target register at 31
00252    fT  target register with L/R halves at 31
00253    fa  operand 1 register at 10
00254    fA   operand 1 register with L/R halves at 10
00255    fX   Same as fA, except prints a space before register during disasm
00256    fb  operand 2 register at 15
00257    fB   operand 2 register with L/R halves at 15
00258    fC   operand 3 register with L/R halves at 16:18,21:23
00259    fe   Like fT, but encoding is different.
00260    fE   Same as fe, except prints a space before register during disasm.
00261    fx  target register at 15 (only for PA 2.0 long format FLDD/FSTD). 
00262 
00263 Float registers for fmpyadd and fmpysub:
00264 
00265    fi  mult operand 1 register at 10
00266    fj  mult operand 2 register at 15
00267    fk  mult target register at 20
00268    fl  add/sub operand register at 25
00269    fm  add/sub target register at 31
00270 
00271 */
00272 
00273 
00274 #if 0
00275 /* List of characters not to put a space after.  Note that
00276    "," is included, as the "spopN" operations use literal
00277    commas in their completer sections.  */
00278 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
00279 #endif
00280 
00281 /* The order of the opcodes in this table is significant:
00282 
00283    * The assembler requires that all instances of the same mnemonic be
00284      consecutive.  If they aren't, the assembler will bomb at runtime.
00285 
00286    * Immediate fields use pa_get_absolute_expression to parse the
00287      string.  It will generate a "bad expression" error if passed
00288      a register name.  Thus, register index variants of an opcode
00289      need to precede immediate variants.
00290 
00291    * The disassembler does not care about the order of the opcodes
00292      except in cases where implicit addressing is used.
00293 
00294    Here are the rules for ordering the opcodes of a mnemonic:
00295 
00296    1) Opcodes with FLAG_STRICT should precede opcodes without
00297       FLAG_STRICT.
00298 
00299    2) Opcodes with FLAG_STRICT should be ordered as follows:
00300       register index opcodes, short immediate opcodes, and finally
00301       long immediate opcodes.  When both pa10 and pa11 variants
00302       of the same opcode are available, the pa10 opcode should
00303       come first for correct architectural promotion.
00304 
00305    3) When implicit addressing is available for an opcode, the
00306       implicit opcode should precede the explicit opcode.
00307 
00308    4) Opcodes without FLAG_STRICT should be ordered as follows:
00309       register index opcodes, long immediate opcodes, and finally
00310       short immediate opcodes.  */
00311        
00312 static const struct pa_opcode pa_opcodes[] =
00313 {
00314 
00315 /* Pseudo-instructions.  */
00316 
00317 { "ldi",      0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */
00318 { "ldi",      0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
00319 
00320 { "cmpib",    0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT},
00321 { "cmpib",    0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT},
00322 { "comib",    0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
00323 /* This entry is for the disassembler only.  It will never be used by
00324    assembler.  */
00325 { "comib",    0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
00326 { "cmpb",     0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT},
00327 { "cmpb",     0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT},
00328 { "comb",     0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
00329 /* This entry is for the disassembler only.  It will never be used by
00330    assembler.  */
00331 { "comb",     0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
00332 { "addb",     0xa0000000, 0xf4000000, "?Wnx,b,w", pa20w, FLAG_STRICT},
00333 { "addb",     0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
00334 /* This entry is for the disassembler only.  It will never be used by
00335    assembler.  */
00336 { "addb",     0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
00337 { "addib",    0xa4000000, 0xf4000000, "?Wn5,b,w", pa20w, FLAG_STRICT},
00338 { "addib",    0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
00339 /* This entry is for the disassembler only.  It will never be used by
00340    assembler.  */
00341 { "addib",    0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
00342 { "nop",      0x08000240, 0xffffffff, "", pa10, 0},      /* or 0,0,0 */
00343 { "copy",     0x08000240, 0xffe0ffe0, "x,t", pa10, 0},   /* or r,0,t */
00344 { "mtsar",    0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
00345 
00346 /* Loads and Stores for integer registers.  */
00347 
00348 { "ldd",      0x0c0000c0, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
00349 { "ldd",      0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT},
00350 { "ldd",      0x0c0010e0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
00351 { "ldd",      0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
00352 { "ldd",      0x0c0010c0, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
00353 { "ldd",      0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT},
00354 { "ldd",      0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT},
00355 { "ldd",      0x50000000, 0xfc00c002, "cq#(b),x", pa20, FLAG_STRICT},
00356 { "ldd",      0x50000000, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT},
00357 { "ldw",      0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00358 { "ldw",      0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00359 { "ldw",      0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00360 { "ldw",      0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
00361 { "ldw",      0x0c0010a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
00362 { "ldw",      0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
00363 { "ldw",      0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00364 { "ldw",      0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00365 { "ldw",      0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00366 { "ldw",      0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
00367 { "ldw",      0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT},
00368 { "ldw",      0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT},
00369 { "ldw",      0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
00370 { "ldw",      0x5c000004, 0xfc00c006, "ceK(b),x", pa20, FLAG_STRICT},
00371 { "ldw",      0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
00372 { "ldw",      0x4c000000, 0xfc00c000, "ceJ(b),x", pa10, FLAG_STRICT},
00373 { "ldw",      0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
00374 { "ldw",      0x48000000, 0xfc00c000, "j(b),x", pa10, 0},
00375 { "ldw",      0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
00376 { "ldh",      0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00377 { "ldh",      0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00378 { "ldh",      0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00379 { "ldh",      0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
00380 { "ldh",      0x0c001060, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
00381 { "ldh",      0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
00382 { "ldh",      0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00383 { "ldh",      0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00384 { "ldh",      0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00385 { "ldh",      0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
00386 { "ldh",      0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
00387 { "ldh",      0x44000000, 0xfc00c000, "j(b),x", pa10, 0},
00388 { "ldh",      0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
00389 { "ldb",      0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00390 { "ldb",      0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00391 { "ldb",      0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00392 { "ldb",      0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
00393 { "ldb",      0x0c001020, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
00394 { "ldb",      0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
00395 { "ldb",      0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00396 { "ldb",      0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00397 { "ldb",      0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00398 { "ldb",      0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
00399 { "ldb",      0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
00400 { "ldb",      0x40000000, 0xfc00c000, "j(b),x", pa10, 0},
00401 { "ldb",      0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
00402 { "std",      0x0c0012e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
00403 { "std",      0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
00404 { "std",      0x0c0012c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
00405 { "std",      0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
00406 { "std",      0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT},
00407 { "std",      0x70000000, 0xfc00c002, "cqx,#(b)", pa20, FLAG_STRICT},
00408 { "std",      0x70000000, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT},
00409 { "stw",      0x0c0012a0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
00410 { "stw",      0x0c0012a0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
00411 { "stw",      0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00412 { "stw",      0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
00413 { "stw",      0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00414 { "stw",      0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
00415 { "stw",      0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT},
00416 { "stw",      0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT},
00417 { "stw",      0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
00418 { "stw",      0x7c000004, 0xfc00c006, "cex,K(b)", pa20, FLAG_STRICT},
00419 { "stw",      0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
00420 { "stw",      0x6c000000, 0xfc00c000, "cex,J(b)", pa10, FLAG_STRICT},
00421 { "stw",      0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
00422 { "stw",      0x68000000, 0xfc00c000, "x,j(b)", pa10, 0},
00423 { "stw",      0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
00424 { "sth",      0x0c001260, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
00425 { "sth",      0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
00426 { "sth",      0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00427 { "sth",      0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
00428 { "sth",      0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00429 { "sth",      0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
00430 { "sth",      0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
00431 { "sth",      0x64000000, 0xfc00c000, "x,j(b)", pa10, 0},
00432 { "sth",      0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
00433 { "stb",      0x0c001220, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
00434 { "stb",      0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
00435 { "stb",      0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00436 { "stb",      0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
00437 { "stb",      0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00438 { "stb",      0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
00439 { "stb",      0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
00440 { "stb",      0x60000000, 0xfc00c000, "x,j(b)", pa10, 0},
00441 { "stb",      0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
00442 { "ldwm",     0x4c000000, 0xfc00c000, "j(b),x", pa10, 0},
00443 { "ldwm",     0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
00444 { "stwm",     0x6c000000, 0xfc00c000, "x,j(b)", pa10, 0},
00445 { "stwm",     0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
00446 { "ldwx",     0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00447 { "ldwx",     0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00448 { "ldwx",     0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00449 { "ldwx",     0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
00450 { "ldwx",     0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, 0},
00451 { "ldwx",     0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
00452 { "ldhx",     0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00453 { "ldhx",     0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00454 { "ldhx",     0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00455 { "ldhx",     0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
00456 { "ldhx",     0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, 0},
00457 { "ldhx",     0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
00458 { "ldbx",     0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00459 { "ldbx",     0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00460 { "ldbx",     0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00461 { "ldbx",     0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT},
00462 { "ldbx",     0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, 0},
00463 { "ldbx",     0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
00464 { "ldwa",     0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00465 { "ldwa",     0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00466 { "ldwa",     0x0c0011a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
00467 { "ldwa",     0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00468 { "ldwa",     0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00469 { "ldcw",     0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00470 { "ldcw",     0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00471 { "ldcw",     0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT},
00472 { "ldcw",     0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT},
00473 { "ldcw",     0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00474 { "ldcw",     0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00475 { "ldcw",     0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT},
00476 { "ldcw",     0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT},
00477 { "stwa",     0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
00478 { "stwa",     0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00479 { "stwa",     0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00480 { "stby",     0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT},
00481 { "stby",     0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT},
00482 { "stby",     0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT},
00483 { "stby",     0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT},
00484 { "ldda",     0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
00485 { "ldda",     0x0c001120, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
00486 { "ldda",     0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
00487 { "ldcd",     0x0c000140, 0xfc00d3c0, "cxcdx(b),t", pa20, FLAG_STRICT},
00488 { "ldcd",     0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT},
00489 { "ldcd",     0x0c001140, 0xfc00d3c0, "cmcd5(b),t", pa20, FLAG_STRICT},
00490 { "ldcd",     0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
00491 { "stda",     0x0c0013e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
00492 { "stda",     0x0c0013c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
00493 { "ldwax",    0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00494 { "ldwax",    0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT},
00495 { "ldwax",    0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0},
00496 { "ldcwx",    0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT},
00497 { "ldcwx",    0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT},
00498 { "ldcwx",    0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT},
00499 { "ldcwx",    0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT},
00500 { "ldcwx",    0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, 0},
00501 { "ldcwx",    0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
00502 { "ldws",     0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00503 { "ldws",     0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00504 { "ldws",     0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00505 { "ldws",     0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
00506 { "ldws",     0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, 0},
00507 { "ldws",     0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
00508 { "ldhs",     0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00509 { "ldhs",     0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00510 { "ldhs",     0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00511 { "ldhs",     0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
00512 { "ldhs",     0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, 0},
00513 { "ldhs",     0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
00514 { "ldbs",     0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00515 { "ldbs",     0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00516 { "ldbs",     0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00517 { "ldbs",     0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT},
00518 { "ldbs",     0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, 0},
00519 { "ldbs",     0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
00520 { "ldwas",    0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00521 { "ldwas",    0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT},
00522 { "ldwas",    0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0},
00523 { "ldcws",    0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT},
00524 { "ldcws",    0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT},
00525 { "ldcws",    0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT},
00526 { "ldcws",    0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT},
00527 { "ldcws",    0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, 0},
00528 { "ldcws",    0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
00529 { "stws",     0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00530 { "stws",     0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
00531 { "stws",     0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00532 { "stws",     0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
00533 { "stws",     0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
00534 { "stws",     0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
00535 { "sths",     0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00536 { "sths",     0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
00537 { "sths",     0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00538 { "sths",     0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
00539 { "sths",     0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
00540 { "sths",     0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
00541 { "stbs",     0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00542 { "stbs",     0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT},
00543 { "stbs",     0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00544 { "stbs",     0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT},
00545 { "stbs",     0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
00546 { "stbs",     0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
00547 { "stwas",    0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT},
00548 { "stwas",    0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT},
00549 { "stwas",    0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
00550 { "stdby",    0x0c001340, 0xfc00d3c0, "cscCx,V(b)", pa20, FLAG_STRICT},
00551 { "stdby",    0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
00552 { "stbys",    0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT},
00553 { "stbys",    0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT},
00554 { "stbys",    0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT},
00555 { "stbys",    0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT},
00556 { "stbys",    0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, 0},
00557 { "stbys",    0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0},
00558 
00559 /* Immediate instructions.  */
00560 { "ldo",      0x34000000, 0xfc000000, "l(b),x", pa20w, 0},
00561 { "ldo",      0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
00562 { "ldil",     0x20000000, 0xfc000000, "k,b", pa10, 0},
00563 { "addil",    0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
00564 { "addil",    0x28000000, 0xfc000000, "k,b", pa10, 0},
00565 
00566 /* Branching instructions.  */
00567 { "b",        0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
00568 { "b",        0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
00569 { "b",        0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
00570 { "b",        0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
00571 { "b",        0xe8000000, 0xffe0e000, "nW", pa10, 0},  /* b,l foo,r0 */
00572 { "bl",              0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
00573 { "gate",     0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
00574 { "blr",      0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
00575 { "bv",              0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
00576 { "bv",              0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
00577 { "bve",      0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
00578 { "bve",      0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
00579 { "bve",      0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
00580 { "bve",      0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
00581 { "be",              0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
00582 { "be",              0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
00583 { "be",              0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
00584 { "be",              0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
00585 { "ble",      0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
00586 { "movb",     0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
00587 { "movib",    0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
00588 { "combt",    0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
00589 { "combf",    0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
00590 { "comibt",   0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
00591 { "comibf",   0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
00592 { "addbt",    0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
00593 { "addbf",    0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
00594 { "addibt",   0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
00595 { "addibf",   0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
00596 { "bb",              0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT}, 
00597 { "bb",              0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT}, 
00598 { "bb",              0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, FLAG_STRICT}, 
00599 { "bb",              0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT}, 
00600 { "bvb",      0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
00601 { "clrbts",   0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
00602 { "popbts",   0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
00603 { "pushnom",  0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
00604 { "pushbts",  0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
00605 
00606 /* Computation Instructions.  */
00607 
00608 { "cmpclr",   0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
00609 { "cmpclr",   0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
00610 { "comclr",   0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
00611 { "or",              0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
00612 { "or",              0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
00613 { "xor",      0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
00614 { "xor",      0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
00615 { "and",      0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
00616 { "and",      0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
00617 { "andcm",    0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
00618 { "andcm",    0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
00619 { "uxor",     0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
00620 { "uxor",     0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
00621 { "uaddcm",   0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
00622 { "uaddcm",   0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
00623 { "uaddcm",   0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
00624 { "uaddcmt",  0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
00625 { "dcor",     0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
00626 { "dcor",     0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
00627 { "dcor",     0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10, 0},
00628 { "idcor",    0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10, 0},
00629 { "addi",     0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
00630 { "addi",     0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
00631 { "addi",     0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
00632 { "addio",    0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
00633 { "addit",    0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
00634 { "addito",   0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
00635 { "add",      0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
00636 { "add",      0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
00637 { "add",      0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
00638 { "add",      0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
00639 { "add",      0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
00640 { "addl",     0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
00641 { "addo",     0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
00642 { "addc",     0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
00643 { "addco",    0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
00644 { "sub",      0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
00645 { "sub",      0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
00646 { "sub",      0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
00647 { "sub",      0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
00648 { "sub",      0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
00649 { "sub",      0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
00650 { "sub",      0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
00651 { "subo",     0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
00652 { "subb",     0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
00653 { "subbo",    0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
00654 { "subt",     0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
00655 { "subto",    0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
00656 { "ds",              0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
00657 { "subi",     0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
00658 { "subi",     0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
00659 { "subio",    0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
00660 { "cmpiclr",  0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
00661 { "cmpiclr",  0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
00662 { "comiclr",  0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
00663 { "shladd",   0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
00664 { "shladd",   0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
00665 { "sh1add",   0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
00666 { "sh1addl",  0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
00667 { "sh1addo",  0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
00668 { "sh2add",   0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
00669 { "sh2addl",  0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
00670 { "sh2addo",  0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
00671 { "sh3add",   0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
00672 { "sh3addl",  0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
00673 { "sh3addo",  0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
00674 
00675 /* Subword Operation Instructions.  */
00676 
00677 { "hadd",     0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
00678 { "havg",     0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
00679 { "hshl",     0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
00680 { "hshladd",  0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
00681 { "hshr",     0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
00682 { "hshradd",  0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
00683 { "hsub",     0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
00684 { "mixh",     0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
00685 { "mixw",     0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
00686 { "permh",    0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
00687 
00688 
00689 /* Extract and Deposit Instructions.  */
00690 
00691 { "shrpd",    0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
00692 { "shrpd",    0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
00693 { "shrpw",    0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
00694 { "shrpw",    0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
00695 { "vshd",     0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
00696 { "shd",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
00697 { "extrd",    0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
00698 { "extrd",    0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
00699 { "extrw",    0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
00700 { "extrw",    0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
00701 { "vextru",   0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
00702 { "vextrs",   0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
00703 { "extru",    0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
00704 { "extrs",    0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
00705 { "depd",     0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
00706 { "depd",     0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
00707 { "depdi",    0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
00708 { "depdi",    0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
00709 { "depw",     0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
00710 { "depw",     0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
00711 { "depwi",    0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
00712 { "depwi",    0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
00713 { "zvdep",    0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
00714 { "vdep",     0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
00715 { "zdep",     0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
00716 { "dep",      0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
00717 { "zvdepi",   0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
00718 { "vdepi",    0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
00719 { "zdepi",    0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
00720 { "depi",     0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
00721 
00722 /* System Control Instructions.  */
00723 
00724 { "break",    0x00000000, 0xfc001fe0, "r,A", pa10, 0},
00725 { "rfi",      0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
00726 { "rfi",      0x00000c00, 0xffffffff, "", pa10, 0},
00727 { "rfir",     0x00000ca0, 0xffffffff, "", pa11, 0},
00728 { "ssm",      0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
00729 { "ssm",      0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
00730 { "rsm",      0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
00731 { "rsm",      0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
00732 { "mtsm",     0x00001860, 0xffe0ffff, "x", pa10, 0},
00733 { "ldsid",    0x000010a0, 0xfc1fffe0, "(b),t", pa10, 0},
00734 { "ldsid",    0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
00735 { "mtsp",     0x00001820, 0xffe01fff, "x,S", pa10, 0},
00736 { "mtctl",    0x00001840, 0xfc00ffff, "x,^", pa10, 0},
00737 { "mtsarcm",  0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
00738 { "mfia",     0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
00739 { "mfsp",     0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
00740 { "mfctl",    0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
00741 { "mfctl",    0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
00742 { "sync",     0x00000400, 0xffffffff, "", pa10, 0},
00743 { "syncdma",  0x00100400, 0xffffffff, "", pa10, 0},
00744 { "probe",    0x04001180, 0xfc00ffa0, "cw(b),x,t", pa10, FLAG_STRICT},
00745 { "probe",    0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
00746 { "probei",   0x04003180, 0xfc00ffa0, "cw(b),R,t", pa10, FLAG_STRICT},
00747 { "probei",   0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
00748 { "prober",   0x04001180, 0xfc00ffe0, "(b),x,t", pa10, 0},
00749 { "prober",   0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
00750 { "proberi",  0x04003180, 0xfc00ffe0, "(b),R,t", pa10, 0},
00751 { "proberi",  0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
00752 { "probew",   0x040011c0, 0xfc00ffe0, "(b),x,t", pa10, 0},
00753 { "probew",   0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
00754 { "probewi",  0x040031c0, 0xfc00ffe0, "(b),R,t", pa10, 0},
00755 { "probewi",  0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
00756 { "lpa",      0x04001340, 0xfc00ffc0, "cZx(b),t", pa10, 0},
00757 { "lpa",      0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
00758 { "lci",      0x04001300, 0xfc00ffe0, "x(b),t", pa11, 0},
00759 { "lci",      0x04001300, 0xfc003fe0, "x(s,b),t", pa11, 0},
00760 { "pdtlb",    0x04001600, 0xfc00ffdf, "cLcZx(b)", pa20, FLAG_STRICT},
00761 { "pdtlb",    0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
00762 { "pdtlb",    0x04001600, 0xfc1fffdf, "cLcZ@(b)", pa20, FLAG_STRICT},
00763 { "pdtlb",    0x04001600, 0xfc1f3fdf, "cLcZ@(s,b)", pa20, FLAG_STRICT},
00764 { "pdtlb",    0x04001200, 0xfc00ffdf, "cZx(b)", pa10, 0},
00765 { "pdtlb",    0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
00766 { "pitlb",    0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
00767 { "pitlb",    0x04000600, 0xfc1f1fdf, "cLcZ@(S,b)", pa20, FLAG_STRICT},
00768 { "pitlb",    0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
00769 { "pdtlbe",   0x04001240, 0xfc00ffdf, "cZx(b)", pa10, 0},
00770 { "pdtlbe",   0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
00771 { "pitlbe",   0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
00772 { "idtlba",   0x04001040, 0xfc00ffff, "x,(b)", pa10, 0},
00773 { "idtlba",   0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
00774 { "iitlba",   0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
00775 { "idtlbp",   0x04001000, 0xfc00ffff, "x,(b)", pa10, 0},
00776 { "idtlbp",   0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
00777 { "iitlbp",   0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
00778 { "pdc",      0x04001380, 0xfc00ffdf, "cZx(b)", pa10, 0},
00779 { "pdc",      0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
00780 { "fdc",      0x04001280, 0xfc00ffdf, "cZx(b)", pa10, FLAG_STRICT},
00781 { "fdc",      0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, FLAG_STRICT},
00782 { "fdc",      0x04003280, 0xfc00ffff, "5(b)", pa20, FLAG_STRICT},
00783 { "fdc",      0x04003280, 0xfc003fff, "5(s,b)", pa20, FLAG_STRICT},
00784 { "fdc",      0x04001280, 0xfc00ffdf, "cZx(b)", pa10, 0},
00785 { "fdc",      0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
00786 { "fic",      0x040013c0, 0xfc00dfdf, "cZx(b)", pa20, FLAG_STRICT},
00787 { "fic",      0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
00788 { "fdce",     0x040012c0, 0xfc00ffdf, "cZx(b)", pa10, 0},
00789 { "fdce",     0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
00790 { "fice",     0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
00791 { "diag",     0x14000000, 0xfc000000, "D", pa10, 0},
00792 { "idtlbt",   0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
00793 { "iitlbt",   0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
00794 
00795 /* These may be specific to certain versions of the PA.  Joel claimed
00796    they were 72000 (7200?) specific.  However, I'm almost certain the
00797    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
00798 { "mtcpu",    0x14001600, 0xfc00ffff, "x,^", pa10, 0},
00799 { "mfcpu",    0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
00800 { "tocen",    0x14403600, 0xffffffff, "", pa10, 0},
00801 { "tocdis",   0x14401620, 0xffffffff, "", pa10, 0},
00802 { "shdwgr",   0x14402600, 0xffffffff, "", pa10, 0},
00803 { "grshdw",   0x14400620, 0xffffffff, "", pa10, 0},
00804 
00805 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
00806    the Timex FPU or the Mustang ERS (not sure which) manual.  */
00807 { "gfw",      0x04001680, 0xfc00ffdf, "cZx(b)", pa11, 0},
00808 { "gfw",      0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
00809 { "gfr",      0x04001a80, 0xfc00ffdf, "cZx(b)", pa11, 0},
00810 { "gfr",      0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
00811 
00812 /* Floating Point Coprocessor Instructions.  */
00813  
00814 { "fldw",     0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT},
00815 { "fldw",     0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT},
00816 { "fldw",     0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT},
00817 { "fldw",     0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT},
00818 { "fldw",     0x24001020, 0xfc1ff3a0, "cocc@(b),fT", pa20, FLAG_STRICT},
00819 { "fldw",     0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
00820 { "fldw",     0x24001000, 0xfc00df80, "cM5(b),fT", pa10, FLAG_STRICT},
00821 { "fldw",     0x24001000, 0xfc001f80, "cM5(s,b),fT", pa10, FLAG_STRICT},
00822 { "fldw",     0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT},
00823 { "fldw",     0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT},
00824 { "fldw",     0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT},
00825 { "fldw",     0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT},
00826 { "fldw",     0x5c000000, 0xfc00c004, "d(b),fe", pa20, FLAG_STRICT},
00827 { "fldw",     0x5c000000, 0xfc000004, "d(s,b),fe", pa20, FLAG_STRICT},
00828 { "fldw",     0x58000000, 0xfc00c000, "cJd(b),fe", pa20, FLAG_STRICT},
00829 { "fldw",     0x58000000, 0xfc000000, "cJd(s,b),fe", pa20, FLAG_STRICT},
00830 { "fldd",     0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT},
00831 { "fldd",     0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT},
00832 { "fldd",     0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT},
00833 { "fldd",     0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT},
00834 { "fldd",     0x2c001020, 0xfc1ff3e0, "cocc@(b),ft", pa20, FLAG_STRICT},
00835 { "fldd",     0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
00836 { "fldd",     0x2c001000, 0xfc00dfc0, "cM5(b),ft", pa10, FLAG_STRICT},
00837 { "fldd",     0x2c001000, 0xfc001fc0, "cM5(s,b),ft", pa10, FLAG_STRICT},
00838 { "fldd",     0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT},
00839 { "fldd",     0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT},
00840 { "fldd",     0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT},
00841 { "fldd",     0x50000002, 0xfc00c002, "cq#(b),fx", pa20, FLAG_STRICT},
00842 { "fldd",     0x50000002, 0xfc000002, "cq#(s,b),fx", pa20, FLAG_STRICT},
00843 { "fstw",     0x24000200, 0xfc00df80, "cXfT,x(b)", pa10, FLAG_STRICT},
00844 { "fstw",     0x24000200, 0xfc001f80, "cXfT,x(s,b)", pa10, FLAG_STRICT},
00845 { "fstw",     0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT},
00846 { "fstw",     0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT},
00847 { "fstw",     0x24001220, 0xfc1ff3a0, "cocCfT,@(b)", pa20, FLAG_STRICT},
00848 { "fstw",     0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa20, FLAG_STRICT},
00849 { "fstw",     0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT},
00850 { "fstw",     0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT},
00851 { "fstw",     0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT},
00852 { "fstw",     0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT},
00853 { "fstw",     0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT},
00854 { "fstw",     0x78000000, 0xfc000000, "cJfE,y(b)", pa20w, FLAG_STRICT},
00855 { "fstw",     0x7c000000, 0xfc00c004, "fE,d(b)", pa20, FLAG_STRICT},
00856 { "fstw",     0x7c000000, 0xfc000004, "fE,d(s,b)", pa20, FLAG_STRICT},
00857 { "fstw",     0x78000000, 0xfc00c000, "cJfE,d(b)", pa20, FLAG_STRICT},
00858 { "fstw",     0x78000000, 0xfc000000, "cJfE,d(s,b)", pa20, FLAG_STRICT},
00859 { "fstd",     0x2c000200, 0xfc00dfc0, "cXft,x(b)", pa10, FLAG_STRICT},
00860 { "fstd",     0x2c000200, 0xfc001fc0, "cXft,x(s,b)", pa10, FLAG_STRICT},
00861 { "fstd",     0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT},
00862 { "fstd",     0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT},
00863 { "fstd",     0x2c001220, 0xfc1ff3e0, "cocCft,@(b)", pa20, FLAG_STRICT},
00864 { "fstd",     0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa20, FLAG_STRICT},
00865 { "fstd",     0x2c001200, 0xfc00dfc0, "cMft,5(b)", pa10, FLAG_STRICT},
00866 { "fstd",     0x2c001200, 0xfc001fc0, "cMft,5(s,b)", pa10, FLAG_STRICT},
00867 { "fstd",     0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT},
00868 { "fstd",     0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT},
00869 { "fstd",     0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT},
00870 { "fstd",     0x70000002, 0xfc00c002, "cqfx,#(b)", pa20, FLAG_STRICT},
00871 { "fstd",     0x70000002, 0xfc000002, "cqfx,#(s,b)", pa20, FLAG_STRICT},
00872 { "fldwx",    0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT},
00873 { "fldwx",    0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT},
00874 { "fldwx",    0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT},
00875 { "fldwx",    0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT},
00876 { "fldwx",    0x24000000, 0xfc00df80, "cXx(b),fT", pa10, 0},
00877 { "fldwx",    0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0},
00878 { "flddx",    0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT},
00879 { "flddx",    0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT},
00880 { "flddx",    0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT},
00881 { "flddx",    0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT},
00882 { "flddx",    0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, 0},
00883 { "flddx",    0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0},
00884 { "fstwx",    0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, FLAG_STRICT},
00885 { "fstwx",    0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, FLAG_STRICT},
00886 { "fstwx",    0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT},
00887 { "fstwx",    0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT},
00888 { "fstwx",    0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, 0},
00889 { "fstwx",    0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
00890 { "fstdx",    0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, FLAG_STRICT},
00891 { "fstdx",    0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, FLAG_STRICT},
00892 { "fstdx",    0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT},
00893 { "fstdx",    0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT},
00894 { "fstdx",    0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0},
00895 { "fstdx",    0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
00896 { "fstqx",    0x3c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0},
00897 { "fstqx",    0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
00898 { "fldws",    0x24001000, 0xfc00df80, "cm5(b),fT", pa10, FLAG_STRICT},
00899 { "fldws",    0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, FLAG_STRICT},
00900 { "fldws",    0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT},
00901 { "fldws",    0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT},
00902 { "fldws",    0x24001000, 0xfc00df80, "cm5(b),fT", pa10, 0},
00903 { "fldws",    0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
00904 { "fldds",    0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, FLAG_STRICT},
00905 { "fldds",    0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, FLAG_STRICT},
00906 { "fldds",    0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT},
00907 { "fldds",    0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT},
00908 { "fldds",    0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, 0},
00909 { "fldds",    0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
00910 { "fstws",    0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, FLAG_STRICT},
00911 { "fstws",    0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, FLAG_STRICT},
00912 { "fstws",    0x24001200, 0xfc00d380, "cmcCfT,5(b)", pa11, FLAG_STRICT},
00913 { "fstws",    0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa11, FLAG_STRICT},
00914 { "fstws",    0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, 0},
00915 { "fstws",    0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
00916 { "fstds",    0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, FLAG_STRICT},
00917 { "fstds",    0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, FLAG_STRICT},
00918 { "fstds",    0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT},
00919 { "fstds",    0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT},
00920 { "fstds",    0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0},
00921 { "fstds",    0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
00922 { "fstqs",    0x3c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0},
00923 { "fstqs",    0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
00924 { "fadd",     0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
00925 { "fadd",     0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
00926 { "fsub",     0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
00927 { "fsub",     0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
00928 { "fmpy",     0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
00929 { "fmpy",     0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
00930 { "fdiv",     0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
00931 { "fdiv",     0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
00932 { "fsqrt",    0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
00933 { "fsqrt",    0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
00934 { "fabs",     0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
00935 { "fabs",     0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
00936 { "frem",     0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
00937 { "frem",     0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
00938 { "frnd",     0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
00939 { "frnd",     0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
00940 { "fcpy",     0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
00941 { "fcpy",     0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
00942 { "fcnvff",   0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
00943 { "fcnvff",   0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
00944 { "fcnvxf",   0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
00945 { "fcnvxf",   0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
00946 { "fcnvfx",   0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
00947 { "fcnvfx",   0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
00948 { "fcnvfxt",  0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
00949 { "fcnvfxt",  0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
00950 { "fmpyfadd", 0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
00951 { "fmpynfadd",       0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
00952 { "fneg",     0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
00953 { "fneg",     0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
00954 { "fnegabs",  0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
00955 { "fnegabs",  0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
00956 { "fcnv",     0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
00957 { "fcnv",     0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
00958 { "fcmp",     0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, FLAG_STRICT},
00959 { "fcmp",     0x38000400, 0xfc00e720, "I?ffA,fB", pa10, FLAG_STRICT},
00960 { "fcmp",     0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
00961 { "fcmp",     0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
00962 { "fcmp",     0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
00963 { "fcmp",     0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
00964 { "xmpyu",    0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
00965 { "fmpyadd",  0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
00966 { "fmpysub",  0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
00967 { "ftest",    0x30002420, 0xffffffff, "", pa10, FLAG_STRICT},
00968 { "ftest",    0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
00969 { "ftest",    0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
00970 { "fid",      0x30000000, 0xffffffff, "", pa11, 0},
00971 
00972 /* Performance Monitor Instructions.  */
00973 
00974 { "pmdis",    0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
00975 { "pmenb",    0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
00976 
00977 /* Assist Instructions.  */
00978 
00979 { "spop0",    0x10000000, 0xfc000600, "v,ON", pa10, 0},
00980 { "spop1",    0x10000200, 0xfc000600, "v,oNt", pa10, 0},
00981 { "spop2",    0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
00982 { "spop3",    0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
00983 { "copr",     0x30000000, 0xfc000000, "u,2N", pa10, 0},
00984 { "cldw",     0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
00985 { "cldw",     0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
00986 { "cldw",     0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
00987 { "cldw",     0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
00988 { "cldw",     0x24001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT},
00989 { "cldw",     0x24001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT},
00990 { "cldw",     0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
00991 { "cldw",     0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
00992 { "cldw",     0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
00993 { "cldw",     0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
00994 { "cldd",     0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
00995 { "cldd",     0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
00996 { "cldd",     0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
00997 { "cldd",     0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
00998 { "cldd",     0x2c001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT},
00999 { "cldd",     0x2c001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT},
01000 { "cldd",     0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
01001 { "cldd",     0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
01002 { "cldd",     0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
01003 { "cldd",     0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
01004 { "cstw",     0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
01005 { "cstw",     0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
01006 { "cstw",     0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
01007 { "cstw",     0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
01008 { "cstw",     0x24001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT},
01009 { "cstw",     0x24001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT},
01010 { "cstw",     0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
01011 { "cstw",     0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
01012 { "cstw",     0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
01013 { "cstw",     0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
01014 { "cstd",     0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
01015 { "cstd",     0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
01016 { "cstd",     0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
01017 { "cstd",     0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
01018 { "cstd",     0x2c001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT},
01019 { "cstd",     0x2c001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT},
01020 { "cstd",     0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
01021 { "cstd",     0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
01022 { "cstd",     0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
01023 { "cstd",     0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
01024 { "cldwx",    0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
01025 { "cldwx",    0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
01026 { "cldwx",    0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
01027 { "cldwx",    0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
01028 { "cldwx",    0x24000000, 0xfc00de00, "ucXx(b),t", pa10, 0},
01029 { "cldwx",    0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
01030 { "clddx",    0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT},
01031 { "clddx",    0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
01032 { "clddx",    0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT},
01033 { "clddx",    0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT},
01034 { "clddx",    0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, 0},
01035 { "clddx",    0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
01036 { "cstwx",    0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
01037 { "cstwx",    0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
01038 { "cstwx",    0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
01039 { "cstwx",    0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
01040 { "cstwx",    0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, 0},
01041 { "cstwx",    0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
01042 { "cstdx",    0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT},
01043 { "cstdx",    0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
01044 { "cstdx",    0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT},
01045 { "cstdx",    0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT},
01046 { "cstdx",    0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, 0},
01047 { "cstdx",    0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
01048 { "cldws",    0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
01049 { "cldws",    0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
01050 { "cldws",    0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
01051 { "cldws",    0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
01052 { "cldws",    0x24001000, 0xfc00de00, "ucM5(b),t", pa10, 0},
01053 { "cldws",    0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
01054 { "cldds",    0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT},
01055 { "cldds",    0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
01056 { "cldds",    0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT},
01057 { "cldds",    0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT},
01058 { "cldds",    0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, 0},
01059 { "cldds",    0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
01060 { "cstws",    0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
01061 { "cstws",    0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
01062 { "cstws",    0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
01063 { "cstws",    0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
01064 { "cstws",    0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, 0},
01065 { "cstws",    0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0},
01066 { "cstds",    0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT},
01067 { "cstds",    0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
01068 { "cstds",    0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT},
01069 { "cstds",    0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT},
01070 { "cstds",    0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, 0},
01071 { "cstds",    0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0},
01072 
01073 /* More pseudo instructions which must follow the main table.  */
01074 { "call",     0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
01075 { "call",     0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
01076 { "ret",      0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
01077 
01078 };
01079 
01080 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
01081 
01082 /* SKV 12/18/92. Added some denotations for various operands.  */
01083 
01084 #define PA_IMM11_AT_31 'i'
01085 #define PA_IMM14_AT_31 'j'
01086 #define PA_IMM21_AT_31 'k'
01087 #define PA_DISP12 'w'
01088 #define PA_DISP17 'W'
01089 
01090 #define N_HPPA_OPERAND_FORMATS 5