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cell-binutils  2.17cvs20070401
bfin.h
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00001 /* bfin.h -- Header file for ADI Blackfin opcode table
00002    Copyright 2005 Free Software Foundation, Inc.
00003 
00004 This file is part of GDB, GAS, and the GNU binutils.
00005 
00006 GDB, GAS, and the GNU binutils are free software; you can redistribute
00007 them and/or modify them under the terms of the GNU General Public
00008 License as published by the Free Software Foundation; either version
00009 1, or (at your option) any later version.
00010 
00011 GDB, GAS, and the GNU binutils are distributed in the hope that they
00012 will be useful, but WITHOUT ANY WARRANTY; without even the implied
00013 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
00014 the GNU General Public License for more details.
00015 
00016 You should have received a copy of the GNU General Public License
00017 along with this file; see the file COPYING.  If not, write to the Free
00018 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00019 
00020 /* Common to all DSP32 instructions.  */
00021 #define BIT_MULTI_INS 0x0800
00022 
00023 /* This just sets the multi instruction bit of a DSP32 instruction.  */
00024 #define SET_MULTI_INSTRUCTION_BIT(x) x->value |=  BIT_MULTI_INS;
00025 
00026 
00027 /* DSP instructions (32 bit) */
00028 
00029 /*   dsp32mac
00030 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
00031 | 1  | 1  | 0 | 0 |.M.| 0  | 0  |.mmod..........|.MM|.P.|.w1|.op1...|
00032 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
00033 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
00034 */
00035 
00036 typedef struct
00037 {
00038   unsigned long opcode;
00039   int bits_src1;
00040   int mask_src1;
00041   int bits_src0;      
00042   int mask_src0;
00043   int bits_dst;      
00044   int mask_dst;
00045   int bits_h10;      
00046   int mask_h10;
00047   int bits_h00;      
00048   int mask_h00;
00049   int bits_op0;      
00050   int mask_op0;
00051   int bits_w0;      
00052   int mask_w0;
00053   int bits_h11;      
00054   int mask_h11;
00055   int bits_h01;      
00056   int mask_h01;
00057   int bits_op1;      
00058   int mask_op1;
00059   int bits_w1;      
00060   int mask_w1;
00061   int bits_P;      
00062   int mask_P;
00063   int bits_MM;      
00064   int mask_MM;
00065   int bits_mmod;      
00066   int mask_mmod;
00067   int bits_code2;      
00068   int mask_code2;
00069   int bits_M;      
00070   int mask_M;
00071   int bits_code;      
00072   int mask_code;
00073 } DSP32Mac;
00074 
00075 #define DSP32Mac_opcode                   0xc0000000
00076 #define DSP32Mac_src1_bits         0
00077 #define DSP32Mac_src1_mask         0x7
00078 #define DSP32Mac_src0_bits         3
00079 #define DSP32Mac_src0_mask         0x7
00080 #define DSP32Mac_dst_bits          6
00081 #define DSP32Mac_dst_mask          0x7
00082 #define DSP32Mac_h10_bits          9
00083 #define DSP32Mac_h10_mask          0x1
00084 #define DSP32Mac_h00_bits          10
00085 #define DSP32Mac_h00_mask          0x1
00086 #define DSP32Mac_op0_bits          11
00087 #define DSP32Mac_op0_mask          0x3
00088 #define DSP32Mac_w0_bits           13
00089 #define DSP32Mac_w0_mask           0x1
00090 #define DSP32Mac_h11_bits          14
00091 #define DSP32Mac_h11_mask          0x1
00092 #define DSP32Mac_h01_bits          15
00093 #define DSP32Mac_h01_mask          0x1
00094 #define DSP32Mac_op1_bits          16
00095 #define DSP32Mac_op1_mask          0x3
00096 #define DSP32Mac_w1_bits           18
00097 #define DSP32Mac_w1_mask           0x1
00098 #define DSP32Mac_p_bits                   19
00099 #define DSP32Mac_p_mask                   0x1
00100 #define DSP32Mac_MM_bits           20     
00101 #define DSP32Mac_MM_mask           0x1
00102 #define DSP32Mac_mmod_bits         21
00103 #define DSP32Mac_mmod_mask         0xf
00104 #define DSP32Mac_code2_bits        25
00105 #define DSP32Mac_code2_mask        0x3
00106 #define DSP32Mac_M_bits                   27
00107 #define DSP32Mac_M_mask                   0x1
00108 #define DSP32Mac_code_bits         28
00109 #define DSP32Mac_code_mask         0xf
00110 
00111 #define init_DSP32Mac                            \
00112 {                                         \
00113   DSP32Mac_opcode,                        \
00114   DSP32Mac_src1_bits,       DSP32Mac_src1_mask,  \
00115   DSP32Mac_src0_bits,       DSP32Mac_src0_mask,  \
00116   DSP32Mac_dst_bits, DSP32Mac_dst_mask,   \
00117   DSP32Mac_h10_bits, DSP32Mac_h10_mask,   \
00118   DSP32Mac_h00_bits, DSP32Mac_h00_mask,   \
00119   DSP32Mac_op0_bits, DSP32Mac_op0_mask,   \
00120   DSP32Mac_w0_bits,  DSP32Mac_w0_mask,    \
00121   DSP32Mac_h11_bits, DSP32Mac_h11_mask,   \
00122   DSP32Mac_h01_bits, DSP32Mac_h01_mask,   \
00123   DSP32Mac_op1_bits, DSP32Mac_op1_mask,   \
00124   DSP32Mac_w1_bits,  DSP32Mac_w1_mask,    \
00125   DSP32Mac_p_bits,   DSP32Mac_p_mask,     \
00126   DSP32Mac_MM_bits,  DSP32Mac_MM_mask,    \
00127   DSP32Mac_mmod_bits,       DSP32Mac_mmod_mask,  \
00128   DSP32Mac_code2_bits,      DSP32Mac_code2_mask, \
00129   DSP32Mac_M_bits,   DSP32Mac_M_mask,     \
00130   DSP32Mac_code_bits,       DSP32Mac_code_mask   \
00131 };
00132 
00133 /*  dsp32mult
00134 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
00135 | 1  | 1  | 0 | 0 |.M.| 0  | 1  |.mmod..........|.MM|.P.|.w1|.op1...|
00136 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
00137 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+
00138 */
00139 
00140 typedef DSP32Mac DSP32Mult;
00141 #define DSP32Mult_opcode    0xc2000000
00142 
00143 #define init_DSP32Mult                           \
00144 {                                         \
00145   DSP32Mult_opcode,                       \
00146   DSP32Mac_src1_bits,       DSP32Mac_src1_mask,  \
00147   DSP32Mac_src0_bits,       DSP32Mac_src0_mask,  \
00148   DSP32Mac_dst_bits, DSP32Mac_dst_mask,   \
00149   DSP32Mac_h10_bits, DSP32Mac_h10_mask,   \
00150   DSP32Mac_h00_bits, DSP32Mac_h00_mask,   \
00151   DSP32Mac_op0_bits, DSP32Mac_op0_mask,   \
00152   DSP32Mac_w0_bits,  DSP32Mac_w0_mask,    \
00153   DSP32Mac_h11_bits, DSP32Mac_h11_mask,   \
00154   DSP32Mac_h01_bits, DSP32Mac_h01_mask,   \
00155   DSP32Mac_op1_bits, DSP32Mac_op1_mask,   \
00156   DSP32Mac_w1_bits,  DSP32Mac_w1_mask,    \
00157   DSP32Mac_p_bits,   DSP32Mac_p_mask,     \
00158   DSP32Mac_MM_bits,  DSP32Mac_MM_mask,    \
00159   DSP32Mac_mmod_bits,       DSP32Mac_mmod_mask,  \
00160   DSP32Mac_code2_bits,      DSP32Mac_code2_mask, \
00161   DSP32Mac_M_bits,   DSP32Mac_M_mask,     \
00162   DSP32Mac_code_bits,       DSP32Mac_code_mask   \
00163 };
00164 
00165 /*  dsp32alu
00166 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00167 | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
00168 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
00169 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00170 */
00171 
00172 typedef struct
00173 {
00174   unsigned long opcode;
00175   int bits_src1;
00176   int mask_src1;
00177   int bits_src0;
00178   int mask_src0;
00179   int bits_dst1;
00180   int mask_dst1;
00181   int bits_dst0;
00182   int mask_dst0;
00183   int bits_x;
00184   int mask_x;
00185   int bits_s;
00186   int mask_s;
00187   int bits_aop;
00188   int mask_aop;
00189   int bits_aopcde;
00190   int mask_aopcde;
00191   int bits_HL;
00192   int mask_HL;
00193   int bits_dontcare;
00194   int mask_dontcare;
00195   int bits_code2;
00196   int mask_code2;
00197   int bits_M;
00198   int mask_M;
00199   int bits_code;
00200   int mask_code;
00201 } DSP32Alu;
00202 
00203 #define DSP32Alu_opcode            0xc4000000
00204 #define DSP32Alu_src1_bits  0
00205 #define DSP32Alu_src1_mask  0x7
00206 #define DSP32Alu_src0_bits  3      
00207 #define DSP32Alu_src0_mask  0x7
00208 #define DSP32Alu_dst1_bits  6
00209 #define DSP32Alu_dst1_mask  0x7
00210 #define DSP32Alu_dst0_bits  9      
00211 #define DSP32Alu_dst0_mask  0x7
00212 #define DSP32Alu_x_bits            12
00213 #define DSP32Alu_x_mask            0x1
00214 #define DSP32Alu_s_bits            13
00215 #define DSP32Alu_s_mask            0x1
00216 #define DSP32Alu_aop_bits   14
00217 #define DSP32Alu_aop_mask   0x3
00218 #define DSP32Alu_aopcde_bits       16
00219 #define DSP32Alu_aopcde_mask       0x1f
00220 #define DSP32Alu_HL_bits    21
00221 #define DSP32Alu_HL_mask    0x1
00222 #define DSP32Alu_dontcare_bits     22
00223 #define DSP32Alu_dontcare_mask     0x7
00224 #define DSP32Alu_code2_bits 25
00225 #define DSP32Alu_code2_mask 0x3
00226 #define DSP32Alu_M_bits            27
00227 #define DSP32Alu_M_mask            0x1
00228 #define DSP32Alu_code_bits  28
00229 #define DSP32Alu_code_mask  0xf
00230 
00231 #define init_DSP32Alu                                   \
00232 {                                                \
00233   DSP32Alu_opcode,                               \
00234   DSP32Alu_src1_bits,              DSP32Alu_src1_mask,  \
00235   DSP32Alu_src0_bits,              DSP32Alu_src0_mask,  \
00236   DSP32Alu_dst1_bits,              DSP32Alu_dst1_mask,  \
00237   DSP32Alu_dst0_bits,              DSP32Alu_dst0_mask,  \
00238   DSP32Alu_x_bits,          DSP32Alu_x_mask,     \
00239   DSP32Alu_s_bits,          DSP32Alu_s_mask,     \
00240   DSP32Alu_aop_bits,        DSP32Alu_aop_mask,   \
00241   DSP32Alu_aopcde_bits,            DSP32Alu_aopcde_mask,       \
00242   DSP32Alu_HL_bits,         DSP32Alu_HL_mask,    \
00243   DSP32Alu_dontcare_bits,   DSP32Alu_dontcare_mask,     \
00244   DSP32Alu_code2_bits,             DSP32Alu_code2_mask, \
00245   DSP32Alu_M_bits,          DSP32Alu_M_mask,     \
00246   DSP32Alu_code_bits,              DSP32Alu_code_mask   \
00247 };
00248 
00249 /*  dsp32shift
00250 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00251 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
00252 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
00253 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00254 */
00255 
00256 typedef struct
00257 {
00258   unsigned long opcode;
00259   int bits_src1;
00260   int mask_src1;
00261   int bits_src0;
00262   int mask_src0;
00263   int bits_dst1;
00264   int mask_dst1;
00265   int bits_dst0;
00266   int mask_dst0;
00267   int bits_HLs;
00268   int mask_HLs;
00269   int bits_sop;
00270   int mask_sop;
00271   int bits_sopcde;
00272   int mask_sopcde;
00273   int bits_dontcare;
00274   int mask_dontcare;
00275   int bits_code2;
00276   int mask_code2;
00277   int bits_M;
00278   int mask_M;
00279   int bits_code;
00280   int mask_code;
00281 } DSP32Shift;
00282 
00283 #define DSP32Shift_opcode          0xc6000000
00284 #define DSP32Shift_src1_bits              0
00285 #define DSP32Shift_src1_mask              0x7
00286 #define DSP32Shift_src0_bits              3
00287 #define DSP32Shift_src0_mask              0x7
00288 #define DSP32Shift_dst1_bits              6
00289 #define DSP32Shift_dst1_mask              0x7
00290 #define DSP32Shift_dst0_bits              9
00291 #define DSP32Shift_dst0_mask              0x7
00292 #define DSP32Shift_HLs_bits        12
00293 #define DSP32Shift_HLs_mask        0x3
00294 #define DSP32Shift_sop_bits        14
00295 #define DSP32Shift_sop_mask        0x3
00296 #define DSP32Shift_sopcde_bits            16
00297 #define DSP32Shift_sopcde_mask            0x1f
00298 #define DSP32Shift_dontcare_bits   21
00299 #define DSP32Shift_dontcare_mask   0x3
00300 #define DSP32Shift_code2_bits             23
00301 #define DSP32Shift_code2_mask             0xf
00302 #define DSP32Shift_M_bits          27
00303 #define DSP32Shift_M_mask          0x1
00304 #define DSP32Shift_code_bits              28
00305 #define DSP32Shift_code_mask              0xf
00306 
00307 #define init_DSP32Shift                                        \
00308 {                                                       \
00309   DSP32Shift_opcode,                                    \
00310   DSP32Shift_src1_bits,            DSP32Shift_src1_mask,              \
00311   DSP32Shift_src0_bits,            DSP32Shift_src0_mask,              \
00312   DSP32Shift_dst1_bits,            DSP32Shift_dst1_mask,              \
00313   DSP32Shift_dst0_bits,            DSP32Shift_dst0_mask,              \
00314   DSP32Shift_HLs_bits,             DSP32Shift_HLs_mask,        \
00315   DSP32Shift_sop_bits,             DSP32Shift_sop_mask,        \
00316   DSP32Shift_sopcde_bits,   DSP32Shift_sopcde_mask,            \
00317   DSP32Shift_dontcare_bits, DSP32Shift_dontcare_mask,   \
00318   DSP32Shift_code2_bits,    DSP32Shift_code2_mask,             \
00319   DSP32Shift_M_bits,        DSP32Shift_M_mask,          \
00320   DSP32Shift_code_bits,            DSP32Shift_code_mask        \
00321 };
00322 
00323 /*  dsp32shiftimm
00324 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00325 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
00326 |.sop...|.HLs...|.dst0......|.immag.................|.src1......|
00327 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00328 */
00329 
00330 typedef struct
00331 {
00332   unsigned long opcode;
00333   int bits_src1;
00334   int mask_src1;
00335   int bits_immag;
00336   int mask_immag;
00337   int bits_dst0;
00338   int mask_dst0;
00339   int bits_HLs;
00340   int mask_HLs;
00341   int bits_sop;
00342   int mask_sop;
00343   int bits_sopcde;
00344   int mask_sopcde;
00345   int bits_dontcare;
00346   int mask_dontcare;
00347   int bits_code2;
00348   int mask_code2;
00349   int bits_M;
00350   int mask_M;
00351   int bits_code;
00352   int mask_code;
00353 } DSP32ShiftImm;
00354 
00355 #define DSP32ShiftImm_opcode              0xc6800000
00356 #define DSP32ShiftImm_src1_bits           0
00357 #define DSP32ShiftImm_src1_mask           0x7
00358 #define DSP32ShiftImm_immag_bits   3
00359 #define DSP32ShiftImm_immag_mask   0x3f
00360 #define DSP32ShiftImm_dst0_bits           9
00361 #define DSP32ShiftImm_dst0_mask           0x7
00362 #define DSP32ShiftImm_HLs_bits            12
00363 #define DSP32ShiftImm_HLs_mask            0x3
00364 #define DSP32ShiftImm_sop_bits            14
00365 #define DSP32ShiftImm_sop_mask            0x3
00366 #define DSP32ShiftImm_sopcde_bits  16
00367 #define DSP32ShiftImm_sopcde_mask  0x1f
00368 #define DSP32ShiftImm_dontcare_bits       21
00369 #define DSP32ShiftImm_dontcare_mask       0x3
00370 #define DSP32ShiftImm_code2_bits   23
00371 #define DSP32ShiftImm_code2_mask   0xf
00372 #define DSP32ShiftImm_M_bits              27
00373 #define DSP32ShiftImm_M_mask              0x1
00374 #define DSP32ShiftImm_code_bits           28     
00375 #define DSP32ShiftImm_code_mask           0xf
00376 
00377 #define init_DSP32ShiftImm                              \
00378 {                                                       \
00379   DSP32ShiftImm_opcode,                                        \
00380   DSP32ShiftImm_src1_bits,  DSP32ShiftImm_src1_mask,    \
00381   DSP32ShiftImm_immag_bits, DSP32ShiftImm_immag_mask,   \
00382   DSP32ShiftImm_dst0_bits,  DSP32ShiftImm_dst0_mask,    \
00383   DSP32ShiftImm_HLs_bits,   DSP32ShiftImm_HLs_mask,            \
00384   DSP32ShiftImm_sop_bits,   DSP32ShiftImm_sop_mask,            \
00385   DSP32ShiftImm_sopcde_bits,       DSP32ShiftImm_sopcde_mask,  \
00386   DSP32ShiftImm_dontcare_bits,     DSP32ShiftImm_dontcare_mask,       \
00387   DSP32ShiftImm_code2_bits, DSP32ShiftImm_code2_mask,   \
00388   DSP32ShiftImm_M_bits,            DSP32ShiftImm_M_mask,              \
00389   DSP32ShiftImm_code_bits,  DSP32ShiftImm_code_mask            \
00390 };
00391 
00392 /* LOAD / STORE  */
00393 
00394 /*  LDSTidxI
00395 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00396 | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
00397 |.offset........................................................|
00398 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00399 */
00400 
00401 typedef struct
00402 {
00403   unsigned long opcode;
00404   int bits_offset;
00405   int mask_offset;
00406   int bits_reg;
00407   int mask_reg;
00408   int bits_ptr;
00409   int mask_ptr;
00410   int bits_sz;
00411   int mask_sz;
00412   int bits_Z;
00413   int mask_Z;
00414   int bits_W;
00415   int mask_W;
00416   int bits_code;
00417   int mask_code;
00418 } LDSTidxI;
00419 
00420 #define LDSTidxI_opcode            0xe4000000
00421 #define LDSTidxI_offset_bits       0
00422 #define LDSTidxI_offset_mask       0xffff
00423 #define LDSTidxI_reg_bits   16
00424 #define LDSTidxI_reg_mask   0x7
00425 #define LDSTidxI_ptr_bits   19
00426 #define LDSTidxI_ptr_mask   0x7
00427 #define LDSTidxI_sz_bits    22
00428 #define LDSTidxI_sz_mask    0x3
00429 #define LDSTidxI_Z_bits            24
00430 #define LDSTidxI_Z_mask            0x1
00431 #define LDSTidxI_W_bits            25
00432 #define LDSTidxI_W_mask            0x1
00433 #define LDSTidxI_code_bits  26
00434 #define LDSTidxI_code_mask  0x3f
00435 
00436 #define init_LDSTidxI                            \
00437 {                                         \
00438   LDSTidxI_opcode,                        \
00439   LDSTidxI_offset_bits, LDSTidxI_offset_mask,    \
00440   LDSTidxI_reg_bits, LDSTidxI_reg_mask,          \
00441   LDSTidxI_ptr_bits, LDSTidxI_ptr_mask,          \
00442   LDSTidxI_sz_bits, LDSTidxI_sz_mask,            \
00443   LDSTidxI_Z_bits, LDSTidxI_Z_mask,              \
00444   LDSTidxI_W_bits, LDSTidxI_W_mask,              \
00445   LDSTidxI_code_bits, LDSTidxI_code_mask  \
00446 };
00447 
00448 
00449 /*  LDST
00450 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00451 | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
00452 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00453 */
00454 
00455 typedef struct
00456 {
00457   unsigned short opcode;
00458   int bits_reg;
00459   int mask_reg;
00460   int bits_ptr;
00461   int mask_ptr;
00462   int bits_Z;
00463   int mask_Z;
00464   int bits_aop;
00465   int mask_aop;
00466   int bits_W;
00467   int mask_W;
00468   int bits_sz;
00469   int mask_sz;
00470   int bits_code;
00471   int mask_code;
00472 } LDST;
00473 
00474 #define LDST_opcode         0x9000
00475 #define LDST_reg_bits              0
00476 #define LDST_reg_mask              0x7
00477 #define LDST_ptr_bits              3
00478 #define LDST_ptr_mask              0x7
00479 #define LDST_Z_bits         6
00480 #define LDST_Z_mask         0x1
00481 #define LDST_aop_bits              7
00482 #define LDST_aop_mask              0x3
00483 #define LDST_W_bits         9
00484 #define LDST_W_mask         0x1
00485 #define LDST_sz_bits        10
00486 #define LDST_sz_mask        0x3
00487 #define LDST_code_bits             12
00488 #define LDST_code_mask             0xf
00489 
00490 #define init_LDST                  \
00491 {                                  \
00492   LDST_opcode,                            \
00493   LDST_reg_bits,     LDST_reg_mask,       \
00494   LDST_ptr_bits,     LDST_ptr_mask,       \
00495   LDST_Z_bits,              LDST_Z_mask,  \
00496   LDST_aop_bits,     LDST_aop_mask,       \
00497   LDST_W_bits,              LDST_W_mask,  \
00498   LDST_sz_bits,             LDST_sz_mask, \
00499   LDST_code_bits,    LDST_code_mask       \
00500 };
00501 
00502 /*  LDSTii
00503 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00504 | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
00505 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00506 */
00507 
00508 typedef struct
00509 {
00510   unsigned short opcode;
00511   int bits_reg;
00512   int mask_reg;
00513   int bits_ptr;
00514   int mask_ptr;
00515   int bits_offset;
00516   int mask_offset;
00517   int bits_op;
00518   int mask_op;
00519   int bits_W;
00520   int mask_W;
00521   int bits_code;
00522   int mask_code;
00523 } LDSTii;
00524 
00525 #define LDSTii_opcode              0xa000
00526 #define LDSTii_reg_bit             0
00527 #define LDSTii_reg_mask            0x7
00528 #define LDSTii_ptr_bit             3
00529 #define LDSTii_ptr_mask            0x7
00530 #define LDSTii_offset_bit   6
00531 #define LDSTii_offset_mask  0xf
00532 #define LDSTii_op_bit              10
00533 #define LDSTii_op_mask             0x3
00534 #define LDSTii_W_bit        12
00535 #define LDSTii_W_mask              0x1
00536 #define LDSTii_code_bit            13
00537 #define LDSTii_code_mask    0x7
00538 
00539 #define init_LDSTii                       \
00540 {                                         \
00541   LDSTii_opcode,                          \
00542   LDSTii_reg_bit,    LDSTii_reg_mask,     \
00543   LDSTii_ptr_bit,    LDSTii_ptr_mask,     \
00544   LDSTii_offset_bit,    LDSTii_offset_mask,      \
00545   LDSTii_op_bit,        LDSTii_op_mask,          \
00546   LDSTii_W_bit,             LDSTii_W_mask,              \
00547   LDSTii_code_bit,   LDSTii_code_mask     \
00548 };
00549 
00550 
00551 /*  LDSTiiFP
00552 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00553 | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
00554 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00555 */
00556 
00557 typedef struct
00558 {
00559   unsigned short opcode;
00560   int bits_reg;
00561   int mask_reg;
00562   int bits_offset;
00563   int mask_offset;
00564   int bits_W;
00565   int mask_W;
00566   int bits_code;
00567   int mask_code;
00568 } LDSTiiFP;
00569 
00570 #define LDSTiiFP_opcode            0xb800
00571 #define LDSTiiFP_reg_bits   0
00572 #define LDSTiiFP_reg_mask   0xf
00573 #define LDSTiiFP_offset_bits       4
00574 #define LDSTiiFP_offset_mask       0x1f
00575 #define LDSTiiFP_W_bits            9
00576 #define LDSTiiFP_W_mask            0x1
00577 #define LDSTiiFP_code_bits  10
00578 #define LDSTiiFP_code_mask  0x3f
00579 
00580 #define init_LDSTiiFP                            \
00581 {                                         \
00582   LDSTiiFP_opcode,                        \
00583   LDSTiiFP_reg_bits, LDSTiiFP_reg_mask,   \
00584   LDSTiiFP_offset_bits, LDSTiiFP_offset_mask,    \
00585   LDSTiiFP_W_bits,   LDSTiiFP_W_mask,     \
00586   LDSTiiFP_code_bits,       LDSTiiFP_code_mask   \
00587 };
00588 
00589 /*  dspLDST
00590 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00591 | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
00592 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00593 */
00594 
00595 typedef struct
00596 {
00597   unsigned short opcode;
00598   int bits_reg;
00599   int mask_reg;
00600   int bits_i;
00601   int mask_i;
00602   int bits_m;
00603   int mask_m;
00604   int bits_aop;
00605   int mask_aop;
00606   int bits_W;
00607   int mask_W;
00608   int bits_code;
00609   int mask_code;
00610 } DspLDST;
00611 
00612 #define DspLDST_opcode             0x9c00
00613 #define DspLDST_reg_bits    0
00614 #define DspLDST_reg_mask    0x7
00615 #define DspLDST_i_bits             3
00616 #define DspLDST_i_mask             0x3
00617 #define DspLDST_m_bits             5
00618 #define DspLDST_m_mask             0x3
00619 #define DspLDST_aop_bits    7
00620 #define DspLDST_aop_mask    0x3
00621 #define DspLDST_W_bits             9
00622 #define DspLDST_W_mask             0x1
00623 #define DspLDST_code_bits   10
00624 #define DspLDST_code_mask   0x3f
00625 
00626 #define init_DspLDST                      \
00627 {                                         \
00628   DspLDST_opcode,                         \
00629   DspLDST_reg_bits,  DspLDST_reg_mask,    \
00630   DspLDST_i_bits,    DspLDST_i_mask,             \
00631   DspLDST_m_bits,    DspLDST_m_mask,             \
00632   DspLDST_aop_bits,  DspLDST_aop_mask,    \
00633   DspLDST_W_bits,    DspLDST_W_mask,             \
00634   DspLDST_code_bits, DspLDST_code_mask    \
00635 };
00636 
00637 
00638 /*  LDSTpmod
00639 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00640 | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
00641 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00642 */
00643 
00644 typedef struct
00645 {
00646   unsigned short opcode;
00647   int bits_ptr;
00648   int mask_ptr;
00649   int bits_idx;
00650   int mask_idx;
00651   int bits_reg;
00652   int mask_reg;
00653   int bits_aop;
00654   int mask_aop;
00655   int bits_W;
00656   int mask_W;
00657   int bits_code;
00658   int mask_code;
00659 } LDSTpmod;
00660 
00661 #define LDSTpmod_opcode            0x8000
00662 #define LDSTpmod_ptr_bits   0
00663 #define LDSTpmod_ptr_mask   0x7
00664 #define LDSTpmod_idx_bits   3
00665 #define LDSTpmod_idx_mask   0x7
00666 #define LDSTpmod_reg_bits   6
00667 #define LDSTpmod_reg_mask   0x7
00668 #define LDSTpmod_aop_bits   9
00669 #define LDSTpmod_aop_mask   0x3
00670 #define LDSTpmod_W_bits            11
00671 #define LDSTpmod_W_mask            0x1
00672 #define LDSTpmod_code_bits  12
00673 #define LDSTpmod_code_mask  0xf
00674 
00675 #define init_LDSTpmod                            \
00676 {                                         \
00677   LDSTpmod_opcode,                        \
00678   LDSTpmod_ptr_bits,        LDSTpmod_ptr_mask,   \
00679   LDSTpmod_idx_bits, LDSTpmod_idx_mask,   \
00680   LDSTpmod_reg_bits, LDSTpmod_reg_mask,   \
00681   LDSTpmod_aop_bits, LDSTpmod_aop_mask,   \
00682   LDSTpmod_W_bits,   LDSTpmod_W_mask,     \
00683   LDSTpmod_code_bits,       LDSTpmod_code_mask   \
00684 };
00685 
00686 
00687 /*  LOGI2op
00688 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00689 | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
00690 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00691 */
00692 
00693 typedef struct
00694 {
00695   unsigned short opcode;
00696   int bits_dst;
00697   int mask_dst;
00698   int bits_src;
00699   int mask_src;
00700   int bits_opc;
00701   int mask_opc;
00702   int bits_code;
00703   int mask_code;
00704 } LOGI2op;
00705 
00706 #define LOGI2op_opcode             0x4800
00707 #define LOGI2op_dst_bits    0
00708 #define LOGI2op_dst_mask    0x7
00709 #define LOGI2op_src_bits    3
00710 #define LOGI2op_src_mask    0x1f
00711 #define LOGI2op_opc_bits    8
00712 #define LOGI2op_opc_mask    0x7
00713 #define LOGI2op_code_bits   11
00714 #define LOGI2op_code_mask   0x1f
00715 
00716 #define init_LOGI2op                      \
00717 {                                         \
00718   LOGI2op_opcode,                         \
00719   LOGI2op_dst_bits,  LOGI2op_dst_mask,    \
00720   LOGI2op_src_bits,  LOGI2op_src_mask,    \
00721   LOGI2op_opc_bits,  LOGI2op_opc_mask,    \
00722   LOGI2op_code_bits, LOGI2op_code_mask    \
00723 };
00724 
00725 
00726 /*  ALU2op
00727 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00728 | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
00729 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00730 */
00731 
00732 typedef struct
00733 {
00734   unsigned short opcode;
00735   int bits_dst;
00736   int mask_dst;
00737   int bits_src;
00738   int mask_src;
00739   int bits_opc;
00740   int mask_opc;
00741   int bits_code;
00742   int mask_code;
00743 } ALU2op;
00744 
00745 #define ALU2op_opcode              0x4000
00746 #define ALU2op_dst_bits            0
00747 #define ALU2op_dst_mask            0x7
00748 #define ALU2op_src_bits            3
00749 #define ALU2op_src_mask            0x7
00750 #define ALU2op_opc_bits            6
00751 #define ALU2op_opc_mask            0xf
00752 #define ALU2op_code_bits    10
00753 #define ALU2op_code_mask    0x3f
00754 
00755 #define init_ALU2op                       \
00756 {                                         \
00757   ALU2op_opcode,                          \
00758   ALU2op_dst_bits,   ALU2op_dst_mask,     \
00759   ALU2op_src_bits,   ALU2op_src_mask,     \
00760   ALU2op_opc_bits,   ALU2op_opc_mask,     \
00761   ALU2op_code_bits,  ALU2op_code_mask     \
00762 };
00763 
00764 
00765 /*  BRCC
00766 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00767 | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
00768 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00769 */
00770 
00771 typedef struct
00772 {
00773   unsigned short opcode;
00774   int bits_offset;
00775   int mask_offset;
00776   int bits_B;
00777   int mask_B;
00778   int bits_T;
00779   int mask_T;
00780   int bits_code;
00781   int mask_code;
00782 } BRCC;
00783 
00784 #define BRCC_opcode         0x1000
00785 #define BRCC_offset_bits    0
00786 #define BRCC_offset_mask    0x3ff
00787 #define BRCC_B_bits         10
00788 #define BRCC_B_mask         0x1
00789 #define BRCC_T_bits         11
00790 #define BRCC_T_mask         0x1
00791 #define BRCC_code_bits             12
00792 #define BRCC_code_mask             0xf
00793 
00794 #define init_BRCC                         \
00795 {                                         \
00796   BRCC_opcode,                                   \
00797   BRCC_offset_bits,  BRCC_offset_mask,    \
00798   BRCC_B_bits,              BRCC_B_mask,         \
00799   BRCC_T_bits,              BRCC_T_mask,         \
00800   BRCC_code_bits,    BRCC_code_mask              \
00801 };
00802 
00803 
00804 /*  UJUMP
00805 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00806 | 0 | 0 | 1 | 0 |.offset........................................|
00807 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00808 */
00809 
00810 typedef struct
00811 {
00812   unsigned short opcode;
00813   int bits_offset;
00814   int mask_offset;
00815   int bits_code;
00816   int mask_code;
00817 } UJump;
00818 
00819 #define UJump_opcode        0x2000
00820 #define UJump_offset_bits   0
00821 #define UJump_offset_mask   0xfff
00822 #define UJump_code_bits            12
00823 #define UJump_code_mask            0xf
00824 
00825 #define init_UJump                        \
00826 {                                         \
00827   UJump_opcode,                                  \
00828   UJump_offset_bits, UJump_offset_mask,   \
00829   UJump_code_bits,   UJump_code_mask             \
00830 };
00831 
00832 
00833 /*  ProgCtrl
00834 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00835 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
00836 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00837 */
00838 
00839 typedef struct
00840 {
00841   unsigned short opcode;
00842   int bits_poprnd;
00843   int mask_poprnd;
00844   int bits_prgfunc;
00845   int mask_prgfunc;
00846   int bits_code;
00847   int mask_code;
00848 } ProgCtrl;
00849 
00850 #define ProgCtrl_opcode            0x0000
00851 #define ProgCtrl_poprnd_bits       0
00852 #define ProgCtrl_poprnd_mask       0xf
00853 #define ProgCtrl_prgfunc_bits      4
00854 #define ProgCtrl_prgfunc_mask      0xf
00855 #define ProgCtrl_code_bits  8
00856 #define ProgCtrl_code_mask  0xff
00857 
00858 #define init_ProgCtrl                                   \
00859 {                                                \
00860   ProgCtrl_opcode,                               \
00861   ProgCtrl_poprnd_bits,            ProgCtrl_poprnd_mask,       \
00862   ProgCtrl_prgfunc_bits,    ProgCtrl_prgfunc_mask,      \
00863   ProgCtrl_code_bits,              ProgCtrl_code_mask   \
00864 };
00865 
00866 /*  CALLa
00867 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00868 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
00869 |.lsw...........................................................|
00870 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00871 */
00872 
00873 
00874 typedef struct
00875 {
00876   unsigned long opcode;
00877   int bits_addr;
00878   int mask_addr;
00879   int bits_S;
00880   int mask_S;
00881   int bits_code;
00882   int mask_code;
00883 } CALLa;
00884 
00885 #define CALLa_opcode 0xe2000000
00886 #define CALLa_addr_bits     0
00887 #define CALLa_addr_mask     0xffffff
00888 #define CALLa_S_bits 24
00889 #define CALLa_S_mask 0x1
00890 #define CALLa_code_bits     25
00891 #define CALLa_code_mask     0x7f
00892 
00893 #define init_CALLa                        \
00894 {                                         \
00895   CALLa_opcode,                                  \
00896   CALLa_addr_bits,   CALLa_addr_mask,     \
00897   CALLa_S_bits,             CALLa_S_mask,        \
00898   CALLa_code_bits,   CALLa_code_mask             \
00899 };
00900 
00901 
00902 /*  pseudoDEBUG
00903 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00904 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
00905 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00906 */
00907 
00908 typedef struct
00909 {
00910   unsigned short opcode;
00911   int bits_reg;
00912   int mask_reg;
00913   int bits_grp;
00914   int mask_grp;
00915   int bits_fn;
00916   int mask_fn;
00917   int bits_code;
00918   int mask_code;
00919 } PseudoDbg;
00920 
00921 #define PseudoDbg_opcode    0xf800
00922 #define PseudoDbg_reg_bits  0
00923 #define PseudoDbg_reg_mask  0x7
00924 #define PseudoDbg_grp_bits  3
00925 #define PseudoDbg_grp_mask  0x7
00926 #define PseudoDbg_fn_bits   6
00927 #define PseudoDbg_fn_mask   0x3
00928 #define PseudoDbg_code_bits 8
00929 #define PseudoDbg_code_mask 0xff
00930 
00931 #define init_PseudoDbg                           \
00932 {                                         \
00933   PseudoDbg_opcode,                       \
00934   PseudoDbg_reg_bits,       PseudoDbg_reg_mask,  \
00935   PseudoDbg_grp_bits,       PseudoDbg_grp_mask,  \
00936   PseudoDbg_fn_bits, PseudoDbg_fn_mask,   \
00937   PseudoDbg_code_bits,      PseudoDbg_code_mask  \
00938 };
00939 
00940 /*  PseudoDbg_assert
00941 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00942 | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
00943 |.expected......................................................|
00944 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00945 */
00946 
00947 typedef struct
00948 {
00949   unsigned long opcode;
00950   int bits_expected;
00951   int mask_expected;
00952   int bits_regtest;
00953   int mask_regtest;
00954   int bits_dbgop;
00955   int mask_dbgop;
00956   int bits_dontcare;
00957   int mask_dontcare;
00958   int bits_code;
00959   int mask_code;
00960 } PseudoDbg_Assert;
00961 
00962 #define PseudoDbg_Assert_opcode           0xf0000000
00963 #define PseudoDbg_Assert_expected_bits    0
00964 #define PseudoDbg_Assert_expected_mask    0xffff
00965 #define PseudoDbg_Assert_regtest_bits     16
00966 #define PseudoDbg_Assert_regtest_mask     0x7
00967 #define PseudoDbg_Assert_dbgop_bits       19
00968 #define PseudoDbg_Assert_dbgop_mask       0x7
00969 #define PseudoDbg_Assert_dontcare_bits    22
00970 #define PseudoDbg_Assert_dontcare_mask    0x1f
00971 #define PseudoDbg_Assert_code_bits 27
00972 #define PseudoDbg_Assert_code_mask 0x1f
00973 
00974 #define init_PseudoDbg_Assert                                         \
00975 {                                                              \
00976   PseudoDbg_Assert_opcode,                                     \
00977   PseudoDbg_Assert_expected_bits,  PseudoDbg_Assert_expected_mask,    \
00978   PseudoDbg_Assert_regtest_bits,   PseudoDbg_Assert_regtest_mask,     \
00979   PseudoDbg_Assert_dbgop_bits,            PseudoDbg_Assert_dbgop_mask,       \
00980   PseudoDbg_Assert_dontcare_bits,  PseudoDbg_Assert_dontcare_mask,    \
00981   PseudoDbg_Assert_code_bits,             PseudoDbg_Assert_code_mask  \
00982 };
00983 
00984 /*  CaCTRL
00985 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00986 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
00987 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
00988 */
00989 
00990 typedef struct
00991 {
00992   unsigned short opcode;
00993   int bits_reg;
00994   int mask_reg;
00995   int bits_op;
00996   int mask_op;
00997   int bits_a;
00998   int mask_a;
00999   int bits_code;
01000   int mask_code;
01001 } CaCTRL;
01002 
01003 #define CaCTRL_opcode              0x0240
01004 #define CaCTRL_reg_bits            0
01005 #define CaCTRL_reg_mask            0x7
01006 #define CaCTRL_op_bits             3
01007 #define CaCTRL_op_mask             0x3
01008 #define CaCTRL_a_bits              5
01009 #define CaCTRL_a_mask              0x1
01010 #define CaCTRL_code_bits    6
01011 #define CaCTRL_code_mask    0x3fff
01012 
01013 #define init_CaCTRL                       \
01014 {                                         \
01015   CaCTRL_opcode,                          \
01016   CaCTRL_reg_bits,   CaCTRL_reg_mask,     \
01017   CaCTRL_op_bits,    CaCTRL_op_mask,             \
01018   CaCTRL_a_bits,     CaCTRL_a_mask,              \
01019   CaCTRL_code_bits,  CaCTRL_code_mask     \
01020 };
01021 
01022 /*  PushPopMultiple
01023 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01024 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
01025 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01026 */
01027 
01028 typedef struct
01029 {
01030   unsigned short opcode;
01031   int bits_pr;
01032   int mask_pr;
01033   int bits_dr;
01034   int mask_dr;
01035   int bits_W;
01036   int mask_W;
01037   int bits_p;
01038   int mask_p;
01039   int bits_d;
01040   int mask_d;
01041   int bits_code;
01042   int mask_code;
01043 } PushPopMultiple;
01044 
01045 #define PushPopMultiple_opcode            0x0400
01046 #define PushPopMultiple_pr_bits           0
01047 #define PushPopMultiple_pr_mask           0x7
01048 #define PushPopMultiple_dr_bits           3
01049 #define PushPopMultiple_dr_mask           0x7
01050 #define PushPopMultiple_W_bits            6
01051 #define PushPopMultiple_W_mask            0x1
01052 #define PushPopMultiple_p_bits            7
01053 #define PushPopMultiple_p_mask            0x1
01054 #define PushPopMultiple_d_bits            8
01055 #define PushPopMultiple_d_mask            0x1
01056 #define PushPopMultiple_code_bits  8
01057 #define PushPopMultiple_code_mask  0x1
01058 
01059 #define init_PushPopMultiple                                   \
01060 {                                                       \
01061   PushPopMultiple_opcode,                               \
01062   PushPopMultiple_pr_bits,  PushPopMultiple_pr_mask,    \
01063   PushPopMultiple_dr_bits,  PushPopMultiple_dr_mask,    \
01064   PushPopMultiple_W_bits,   PushPopMultiple_W_mask,            \
01065   PushPopMultiple_p_bits,   PushPopMultiple_p_mask,            \
01066   PushPopMultiple_d_bits,   PushPopMultiple_d_mask,            \
01067   PushPopMultiple_code_bits,       PushPopMultiple_code_mask   \
01068 };
01069 
01070 /*  PushPopReg
01071 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
01073 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01074 */
01075 
01076 typedef struct
01077 {
01078   unsigned short opcode;
01079   int bits_reg;
01080   int mask_reg;
01081   int bits_grp;
01082   int mask_grp;
01083   int bits_W;
01084   int mask_W;
01085   int bits_code;
01086   int mask_code;
01087 } PushPopReg;
01088 
01089 #define PushPopReg_opcode   0x0100
01090 #define PushPopReg_reg_bits 0
01091 #define PushPopReg_reg_mask 0x7
01092 #define PushPopReg_grp_bits 3
01093 #define PushPopReg_grp_mask 0x7
01094 #define PushPopReg_W_bits   6
01095 #define PushPopReg_W_mask   0x1
01096 #define PushPopReg_code_bits       7
01097 #define PushPopReg_code_mask       0x1ff
01098 
01099 #define init_PushPopReg                          \
01100 {                                         \
01101   PushPopReg_opcode,                      \
01102   PushPopReg_reg_bits,      PushPopReg_reg_mask, \
01103   PushPopReg_grp_bits,      PushPopReg_grp_mask, \
01104   PushPopReg_W_bits, PushPopReg_W_mask,   \
01105   PushPopReg_code_bits,     PushPopReg_code_mask,       \
01106 };
01107 
01108 /*  linkage
01109 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01110 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
01111 |.framesize.....................................................|
01112 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01113 */
01114 
01115 typedef struct
01116 {
01117   unsigned long opcode;
01118   int bits_framesize;      
01119   int mask_framesize;
01120   int bits_R;      
01121   int mask_R;
01122   int bits_code;
01123   int mask_code;
01124 } Linkage;
01125 
01126 #define Linkage_opcode             0xe8000000
01127 #define Linkage_framesize_bits     0
01128 #define Linkage_framesize_mask     0xffff
01129 #define Linkage_R_bits             16
01130 #define Linkage_R_mask             0x1
01131 #define Linkage_code_bits   17
01132 #define Linkage_code_mask   0x7fff
01133 
01134 #define init_Linkage                             \
01135 {                                                \
01136   Linkage_opcode,                                \
01137   Linkage_framesize_bits,   Linkage_framesize_mask,     \
01138   Linkage_R_bits,           Linkage_R_mask,             \
01139   Linkage_code_bits,        Linkage_code_mask    \
01140 };
01141 
01142 /*  LoopSetup
01143 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01144 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
01145 |.reg...........| - | - |.eoffset...............................|
01146 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01147 */
01148 
01149 typedef struct
01150 {
01151   unsigned long opcode;
01152   int bits_eoffset;
01153   int mask_eoffset; 
01154   int bits_dontcare;      
01155   int mask_dontcare;
01156   int bits_reg;      
01157   int mask_reg;
01158   int bits_soffset;      
01159   int mask_soffset;
01160   int bits_c;      
01161   int mask_c;
01162   int bits_rop;      
01163   int mask_rop;
01164   int bits_code;      
01165   int mask_code;
01166 } LoopSetup;
01167 
01168 #define LoopSetup_opcode           0xe0800000
01169 #define LoopSetup_eoffset_bits            0
01170 #define LoopSetup_eoffset_mask            0x3ff
01171 #define LoopSetup_dontcare_bits           10
01172 #define LoopSetup_dontcare_mask           0x3
01173 #define LoopSetup_reg_bits         12
01174 #define LoopSetup_reg_mask         0xf
01175 #define LoopSetup_soffset_bits            16
01176 #define LoopSetup_soffset_mask            0xf
01177 #define LoopSetup_c_bits           20
01178 #define LoopSetup_c_mask           0x1
01179 #define LoopSetup_rop_bits         21
01180 #define LoopSetup_rop_mask         0x3
01181 #define LoopSetup_code_bits        23
01182 #define LoopSetup_code_mask        0x1ff
01183 
01184 #define init_LoopSetup                                         \
01185 {                                                       \
01186   LoopSetup_opcode,                                     \
01187   LoopSetup_eoffset_bits,   LoopSetup_eoffset_mask,            \
01188   LoopSetup_dontcare_bits,  LoopSetup_dontcare_mask,    \
01189   LoopSetup_reg_bits,              LoopSetup_reg_mask,         \
01190   LoopSetup_soffset_bits,   LoopSetup_soffset_mask,            \
01191   LoopSetup_c_bits,         LoopSetup_c_mask,           \
01192   LoopSetup_rop_bits,              LoopSetup_rop_mask,         \
01193   LoopSetup_code_bits,             LoopSetup_code_mask         \
01194 };
01195 
01196 /*  LDIMMhalf
01197 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01198 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
01199 |.hword.........................................................|
01200 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01201 */
01202 
01203 typedef struct
01204 {
01205   unsigned long opcode;
01206   int bits_hword;
01207   int mask_hword;
01208   int bits_reg;      
01209   int mask_reg;
01210   int bits_grp;      
01211   int mask_grp;
01212   int bits_S;      
01213   int mask_S;
01214   int bits_H;      
01215   int mask_H;
01216   int bits_Z;      
01217   int mask_Z;
01218   int bits_code;      
01219   int mask_code;
01220 } LDIMMhalf;
01221 
01222 #define LDIMMhalf_opcode    0xe1000000
01223 #define LDIMMhalf_hword_bits       0
01224 #define LDIMMhalf_hword_mask       0xffff
01225 #define LDIMMhalf_reg_bits  16
01226 #define LDIMMhalf_reg_mask  0x7
01227 #define LDIMMhalf_grp_bits  19
01228 #define LDIMMhalf_grp_mask  0x3
01229 #define LDIMMhalf_S_bits    21
01230 #define LDIMMhalf_S_mask    0x1
01231 #define LDIMMhalf_H_bits    22
01232 #define LDIMMhalf_H_mask    0x1
01233 #define LDIMMhalf_Z_bits    23
01234 #define LDIMMhalf_Z_mask    0x1
01235 #define LDIMMhalf_code_bits 24
01236 #define LDIMMhalf_code_mask 0xff
01237 
01238 #define init_LDIMMhalf                           \
01239 {                                         \
01240   LDIMMhalf_opcode,                       \
01241   LDIMMhalf_hword_bits,     LDIMMhalf_hword_mask,       \
01242   LDIMMhalf_reg_bits,       LDIMMhalf_reg_mask,  \
01243   LDIMMhalf_grp_bits,       LDIMMhalf_grp_mask,  \
01244   LDIMMhalf_S_bits,  LDIMMhalf_S_mask,    \
01245   LDIMMhalf_H_bits,  LDIMMhalf_H_mask,    \
01246   LDIMMhalf_Z_bits,  LDIMMhalf_Z_mask,    \
01247   LDIMMhalf_code_bits,      LDIMMhalf_code_mask  \
01248 };
01249 
01250 
01251 /*  CC2dreg
01252 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01253 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
01254 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01255 */
01256 
01257 typedef struct
01258 {
01259   unsigned short opcode;
01260   int bits_reg;
01261   int mask_reg;
01262   int bits_op;      
01263   int mask_op;
01264   int bits_code;      
01265   int mask_code;
01266 } CC2dreg;
01267 
01268 #define CC2dreg_opcode             0x0200
01269 #define CC2dreg_reg_bits    0
01270 #define CC2dreg_reg_mask    0x7
01271 #define CC2dreg_op_bits            3
01272 #define CC2dreg_op_mask            0x3
01273 #define CC2dreg_code_bits   5
01274 #define CC2dreg_code_mask   0x7fff
01275 
01276 #define init_CC2dreg                      \
01277 {                                         \
01278   CC2dreg_opcode,                         \
01279   CC2dreg_reg_bits,  CC2dreg_reg_mask,    \
01280   CC2dreg_op_bits,   CC2dreg_op_mask,     \
01281   CC2dreg_code_bits, CC2dreg_code_mask    \
01282 };
01283 
01284 
01285 /*  PTR2op
01286 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01287 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
01288 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01289 */
01290 
01291 typedef struct
01292 {
01293   unsigned short opcode;
01294   int bits_dst;
01295   int mask_dst;
01296   int bits_src;      
01297   int mask_src;
01298   int bits_opc;      
01299   int mask_opc;
01300   int bits_code;      
01301   int mask_code;
01302 } PTR2op;
01303 
01304 #define PTR2op_opcode              0x4400
01305 #define PTR2op_dst_bits            0
01306 #define PTR2op_dst_mask            0x7
01307 #define PTR2op_src_bits            3
01308 #define PTR2op_src_mask            0x7
01309 #define PTR2op_opc_bits            6
01310 #define PTR2op_opc_mask            0x7
01311 #define PTR2op_code_bits    9      
01312 #define PTR2op_code_mask    0x7f
01313 
01314 #define init_PTR2op                       \
01315 {                                         \
01316   PTR2op_opcode,                          \
01317   PTR2op_dst_bits,   PTR2op_dst_mask,     \
01318   PTR2op_src_bits,   PTR2op_src_mask,     \
01319   PTR2op_opc_bits,   PTR2op_opc_mask,     \
01320   PTR2op_code_bits,  PTR2op_code_mask     \
01321 };
01322 
01323 
01324 /*  COMP3op
01325 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01326 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
01327 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01328 */
01329 
01330 typedef struct
01331 {
01332   unsigned short opcode;
01333   int bits_src0;
01334   int mask_src0;
01335   int bits_src1;      
01336   int mask_src1;
01337   int bits_dst;      
01338   int mask_dst;
01339   int bits_opc;      
01340   int mask_opc;
01341   int bits_code;      
01342   int mask_code;
01343 } COMP3op;
01344 
01345 #define COMP3op_opcode             0x5000
01346 #define COMP3op_src0_bits   0
01347 #define COMP3op_src0_mask   0x7
01348 #define COMP3op_src1_bits   3
01349 #define COMP3op_src1_mask   0x7
01350 #define COMP3op_dst_bits    6
01351 #define COMP3op_dst_mask    0x7
01352 #define COMP3op_opc_bits    9
01353 #define COMP3op_opc_mask    0x7
01354 #define COMP3op_code_bits   12
01355 #define COMP3op_code_mask   0xf
01356 
01357 #define init_COMP3op                      \
01358 {                                         \
01359   COMP3op_opcode,                         \
01360   COMP3op_src0_bits, COMP3op_src0_mask,   \
01361   COMP3op_src1_bits, COMP3op_src1_mask,   \
01362   COMP3op_dst_bits,  COMP3op_dst_mask,    \
01363   COMP3op_opc_bits,  COMP3op_opc_mask,    \
01364   COMP3op_code_bits, COMP3op_code_mask    \
01365 };
01366 
01367 /*  ccMV
01368 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01369 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
01370 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01371 */
01372 
01373 typedef struct
01374 {
01375   unsigned short opcode;
01376   int bits_src;
01377   int mask_src;
01378   int bits_dst;      
01379   int mask_dst;
01380   int bits_s;      
01381   int mask_s;
01382   int bits_d;      
01383   int mask_d;
01384   int bits_T;      
01385   int mask_T;
01386   int bits_code;      
01387   int mask_code;
01388 } CCmv;
01389 
01390 #define CCmv_opcode  0x0600
01391 #define CCmv_src_bits       0
01392 #define CCmv_src_mask       0x7
01393 #define CCmv_dst_bits       3
01394 #define CCmv_dst_mask       0x7
01395 #define CCmv_s_bits  6
01396 #define CCmv_s_mask  0x1
01397 #define CCmv_d_bits  7      
01398 #define CCmv_d_mask  0x1
01399 #define CCmv_T_bits  8
01400 #define CCmv_T_mask  0x1
01401 #define CCmv_code_bits      9
01402 #define CCmv_code_mask      0x7f
01403 
01404 #define init_CCmv                  \
01405 {                                  \
01406   CCmv_opcode,                            \
01407   CCmv_src_bits,     CCmv_src_mask,       \
01408   CCmv_dst_bits,     CCmv_dst_mask,       \
01409   CCmv_s_bits,              CCmv_s_mask,  \
01410   CCmv_d_bits,              CCmv_d_mask,  \
01411   CCmv_T_bits,              CCmv_T_mask,  \
01412   CCmv_code_bits,    CCmv_code_mask       \
01413 };
01414 
01415 
01416 /*  CCflag
01417 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01418 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
01419 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01420 */
01421 
01422 typedef struct
01423 {
01424   unsigned short opcode;
01425   int bits_x;
01426   int mask_x;
01427   int bits_y;      
01428   int mask_y;
01429   int bits_G;      
01430   int mask_G;
01431   int bits_opc;      
01432   int mask_opc;
01433   int bits_I;      
01434   int mask_I;
01435   int bits_code;      
01436   int mask_code;
01437 } CCflag;
01438 
01439 #define CCflag_opcode              0x0800
01440 #define CCflag_x_bits              0
01441 #define CCflag_x_mask              0x7
01442 #define CCflag_y_bits              3
01443 #define CCflag_y_mask              0x7
01444 #define CCflag_G_bits              6
01445 #define CCflag_G_mask              0x1
01446 #define CCflag_opc_bits            7
01447 #define CCflag_opc_mask            0x7
01448 #define CCflag_I_bits              10
01449 #define CCflag_I_mask              0x1
01450 #define CCflag_code_bits    11
01451 #define CCflag_code_mask    0x1f
01452 
01453 #define init_CCflag                       \
01454 {                                         \
01455   CCflag_opcode,                          \
01456   CCflag_x_bits,     CCflag_x_mask,              \
01457   CCflag_y_bits,     CCflag_y_mask,              \
01458   CCflag_G_bits,     CCflag_G_mask,              \
01459   CCflag_opc_bits,   CCflag_opc_mask,     \
01460   CCflag_I_bits,     CCflag_I_mask,              \
01461   CCflag_code_bits,  CCflag_code_mask,    \
01462 };
01463 
01464 
01465 /*  CC2stat
01466 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01467 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
01468 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01469 */
01470 
01471 typedef struct
01472 {
01473   unsigned short opcode;
01474   int bits_cbit;
01475   int mask_cbit;
01476   int bits_op;      
01477   int mask_op;
01478   int bits_D;      
01479   int mask_D;
01480   int bits_code;      
01481   int mask_code;
01482 } CC2stat;
01483 
01484 #define CC2stat_opcode             0x0300
01485 #define CC2stat_cbit_bits   0
01486 #define CC2stat_cbit_mask   0x1f
01487 #define CC2stat_op_bits            5
01488 #define CC2stat_op_mask            0x3
01489 #define CC2stat_D_bits             7
01490 #define CC2stat_D_mask             0x1
01491 #define CC2stat_code_bits   8
01492 #define CC2stat_code_mask   0xff
01493 
01494 #define init_CC2stat                      \
01495 {                                         \
01496   CC2stat_opcode,                         \
01497   CC2stat_cbit_bits, CC2stat_cbit_mask,   \
01498   CC2stat_op_bits,   CC2stat_op_mask,     \
01499   CC2stat_D_bits,    CC2stat_D_mask,             \
01500   CC2stat_code_bits, CC2stat_code_mask    \
01501 };
01502 
01503 
01504 /*  REGMV
01505 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01506 | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
01507 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01508 */
01509 
01510 typedef struct
01511 {
01512   unsigned short opcode;
01513   int bits_src;
01514   int mask_src;
01515   int bits_dst;      
01516   int mask_dst;
01517   int bits_gs;      
01518   int mask_gs;
01519   int bits_gd;      
01520   int mask_gd;
01521   int bits_code;      
01522   int mask_code;
01523 } RegMv;
01524 
01525 #define RegMv_opcode        0x3000
01526 #define RegMv_src_bits             0
01527 #define RegMv_src_mask             0x7
01528 #define RegMv_dst_bits             3
01529 #define RegMv_dst_mask             0x7
01530 #define RegMv_gs_bits              6
01531 #define RegMv_gs_mask              0x7
01532 #define RegMv_gd_bits              9
01533 #define RegMv_gd_mask              0x7
01534 #define RegMv_code_bits            12
01535 #define RegMv_code_mask            0xf
01536 
01537 #define init_RegMv                 \
01538 {                                  \
01539   RegMv_opcode,                           \
01540   RegMv_src_bits,    RegMv_src_mask,      \
01541   RegMv_dst_bits,    RegMv_dst_mask,      \
01542   RegMv_gs_bits,     RegMv_gs_mask,       \
01543   RegMv_gd_bits,     RegMv_gd_mask,       \
01544   RegMv_code_bits,   RegMv_code_mask      \
01545 };
01546 
01547 
01548 /*  COMPI2opD
01549 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01550 | 0 | 1 | 1 | 0 | 0 |.op|.isrc......................|.dst.......|
01551 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01552 */
01553 
01554 typedef struct
01555 {
01556   unsigned short opcode;
01557   int bits_dst;
01558   int mask_dst;
01559   int bits_src;      
01560   int mask_src;
01561   int bits_op;      
01562   int mask_op;
01563   int bits_code;      
01564   int mask_code;
01565 } COMPI2opD;
01566 
01567 #define COMPI2opD_opcode    0x6000
01568 #define COMPI2opD_dst_bits  0
01569 #define COMPI2opD_dst_mask  0x7
01570 #define COMPI2opD_src_bits  3
01571 #define COMPI2opD_src_mask  0x7f
01572 #define COMPI2opD_op_bits   10
01573 #define COMPI2opD_op_mask   0x1
01574 #define COMPI2opD_code_bits 11
01575 #define COMPI2opD_code_mask 0x1f
01576 
01577 #define init_COMPI2opD                           \
01578 {                                         \
01579   COMPI2opD_opcode,                       \
01580   COMPI2opD_dst_bits,       COMPI2opD_dst_mask,  \
01581   COMPI2opD_src_bits,       COMPI2opD_src_mask,  \
01582   COMPI2opD_op_bits, COMPI2opD_op_mask,   \
01583   COMPI2opD_code_bits,      COMPI2opD_code_mask  \
01584 };
01585 
01586 /*  COMPI2opP
01587 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01588 | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
01589 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01590 */
01591 
01592 typedef COMPI2opD COMPI2opP;
01593 
01594 #define COMPI2opP_opcode    0x6800
01595 #define COMPI2opP_dst_bits  0
01596 #define COMPI2opP_dst_mask  0x7
01597 #define COMPI2opP_src_bits  3
01598 #define COMPI2opP_src_mask  0x7f
01599 #define COMPI2opP_op_bits   10
01600 #define COMPI2opP_op_mask   0x1
01601 #define COMPI2opP_code_bits 11
01602 #define COMPI2opP_code_mask 0x1f
01603 
01604 #define init_COMPI2opP                           \
01605 {                                         \
01606   COMPI2opP_opcode,                       \
01607   COMPI2opP_dst_bits,       COMPI2opP_dst_mask,  \
01608   COMPI2opP_src_bits,       COMPI2opP_src_mask,  \
01609   COMPI2opP_op_bits, COMPI2opP_op_mask,   \
01610   COMPI2opP_code_bits,      COMPI2opP_code_mask  \
01611 };
01612 
01613 
01614 /*  dagMODim
01615 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01616 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
01617 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01618 */
01619 
01620 typedef struct
01621 {
01622   unsigned short opcode;
01623   int bits_i;
01624   int mask_i;
01625   int bits_m;      
01626   int mask_m;
01627   int bits_op;      
01628   int mask_op;
01629   int bits_code2;      
01630   int mask_code2;
01631   int bits_br;      
01632   int mask_br;
01633   int bits_code;      
01634   int mask_code;
01635 } DagMODim;
01636 
01637 #define DagMODim_opcode            0x9e60
01638 #define DagMODim_i_bits            0
01639 #define DagMODim_i_mask            0x3
01640 #define DagMODim_m_bits            2
01641 #define DagMODim_m_mask            0x3
01642 #define DagMODim_op_bits    4
01643 #define DagMODim_op_mask    0x1
01644 #define DagMODim_code2_bits 5
01645 #define DagMODim_code2_mask 0x3
01646 #define DagMODim_br_bits    7
01647 #define DagMODim_br_mask    0x1
01648 #define DagMODim_code_bits  8
01649 #define DagMODim_code_mask  0xff
01650 
01651 #define init_DagMODim                            \
01652 {                                         \
01653   DagMODim_opcode,                        \
01654   DagMODim_i_bits,   DagMODim_i_mask,     \
01655   DagMODim_m_bits,   DagMODim_m_mask,     \
01656   DagMODim_op_bits,  DagMODim_op_mask,    \
01657   DagMODim_code2_bits,      DagMODim_code2_mask, \
01658   DagMODim_br_bits,  DagMODim_br_mask,    \
01659   DagMODim_code_bits,       DagMODim_code_mask   \
01660 };
01661 
01662 /*  dagMODik
01663 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01664 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
01665 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
01666 */
01667 
01668 typedef struct
01669 {
01670   unsigned short opcode;
01671   int bits_i;
01672   int mask_i;
01673   int bits_op;
01674   int mask_op;
01675   int bits_code;
01676   int mask_code;
01677 } DagMODik;
01678 
01679 #define DagMODik_opcode            0x9f60
01680 #define DagMODik_i_bits            0
01681 #define DagMODik_i_mask            0x3
01682 #define DagMODik_op_bits    2
01683 #define DagMODik_op_mask    0x3
01684 #define DagMODik_code_bits  3
01685 #define DagMODik_code_mask  0xfff
01686 
01687 #define init_DagMODik                            \
01688 {                                         \
01689   DagMODik_opcode,                        \
01690   DagMODik_i_bits,   DagMODik_i_mask,     \
01691   DagMODik_op_bits,  DagMODik_op_mask,    \
01692   DagMODik_code_bits,       DagMODik_code_mask   \
01693 };