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cell-binutils  2.17cvs20070401
arm.h
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00001 /* ARM assembler/disassembler support.
00002    Copyright 2004 Free Software Foundation, Inc.
00003 
00004    This file is part of GDB and GAS.
00005 
00006    GDB and GAS are free software; you can redistribute it and/or
00007    modify it under the terms of the GNU General Public License as
00008    published by the Free Software Foundation; either version 1, or (at
00009    your option) any later version.
00010 
00011    GDB and GAS are distributed in the hope that it will be useful, but
00012    WITHOUT ANY WARRANTY; without even the implied warranty of
00013    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00014    General Public License for more details.
00015 
00016    You should have received a copy of the GNU General Public License
00017    along with GDB or GAS; see the file COPYING.  If not, write to the
00018    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
00019    02110-1301, USA.  */
00020 
00021 /* The following bitmasks control CPU extensions:  */
00022 #define ARM_EXT_V1    0x00000001   /* All processors (core set).  */
00023 #define ARM_EXT_V2    0x00000002   /* Multiply instructions.  */
00024 #define ARM_EXT_V2S   0x00000004   /* SWP instructions.       */
00025 #define ARM_EXT_V3    0x00000008   /* MSR MRS.                */
00026 #define ARM_EXT_V3M   0x00000010   /* Allow long multiplies.  */
00027 #define ARM_EXT_V4    0x00000020   /* Allow half word loads.  */
00028 #define ARM_EXT_V4T   0x00000040   /* Thumb.                  */
00029 #define ARM_EXT_V5    0x00000080   /* Allow CLZ, etc.         */
00030 #define ARM_EXT_V5T   0x00000100   /* Improved interworking.  */
00031 #define ARM_EXT_V5ExP        0x00000200   /* DSP core set.           */
00032 #define ARM_EXT_V5E   0x00000400   /* DSP Double transfers.   */
00033 #define ARM_EXT_V5J   0x00000800   /* Jazelle extension.          */
00034 #define ARM_EXT_V6       0x00001000     /* ARM V6.                 */
00035 #define ARM_EXT_V6K      0x00002000     /* ARM V6K.                */
00036 #define ARM_EXT_V6Z      0x00004000     /* ARM V6Z.                */
00037 #define ARM_EXT_V6T2  0x00008000   /* Thumb-2.                */
00038 #define ARM_EXT_DIV   0x00010000   /* Integer division.       */
00039 /* The 'M' in Arm V7M stands for Microcontroller.
00040    On earlier architecture variants it stands for Multiply.  */
00041 #define ARM_EXT_V5E_NOTM 0x00020000       /* Arm V5E but not Arm V7M. */
00042 #define ARM_EXT_V6_NOTM      0x00040000   /* Arm V6 but not Arm V7M. */
00043 #define ARM_EXT_V7    0x00080000   /* Arm V7.                 */
00044 #define ARM_EXT_V7A   0x00100000   /* Arm V7A.                */
00045 #define ARM_EXT_V7R   0x00200000   /* Arm V7R.                */
00046 #define ARM_EXT_V7M   0x00400000   /* Arm V7M.                */
00047 
00048 /* Co-processor space extensions.  */
00049 #define ARM_CEXT_XSCALE   0x00000001      /* Allow MIA etc.          */
00050 #define ARM_CEXT_MAVERICK 0x00000002      /* Use Cirrus/DSP coprocessor.  */
00051 #define ARM_CEXT_IWMMXT   0x00000004    /* Intel Wireless MMX technology coprocessor.   */
00052 #define ARM_CEXT_IWMMXT2  0x00000008    /* Intel Wireless MMX technology coprocessor version 2.   */
00053 
00054 #define FPU_ENDIAN_PURE      0x80000000   /* Pure-endian doubles.           */
00055 #define FPU_ENDIAN_BIG       0            /* Double words-big-endian.   */
00056 #define FPU_FPA_EXT_V1       0x40000000   /* Base FPA instruction set.  */
00057 #define FPU_FPA_EXT_V2       0x20000000   /* LFM/SFM.                */
00058 #define FPU_MAVERICK  0x10000000   /* Cirrus Maverick.        */
00059 #define FPU_VFP_EXT_V1xD 0x08000000       /* Base VFP instruction set.  */
00060 #define FPU_VFP_EXT_V1       0x04000000   /* Double-precision insns.    */
00061 #define FPU_VFP_EXT_V2       0x02000000   /* ARM10E VFPr1.           */
00062 #define FPU_VFP_EXT_V3       0x01000000   /* VFPv3 insns.                    */
00063 #define FPU_NEON_EXT_V1      0x00800000   /* Neon (SIMD) insns.             */
00064 
00065 /* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
00066    defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
00067    ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE.  To these we add
00068    three more to cover cores prior to ARM6.  Finally, there are cores which
00069    implement further extensions in the co-processor space.  */
00070 #define ARM_AEXT_V1                  ARM_EXT_V1
00071 #define ARM_AEXT_V2  (ARM_AEXT_V1  | ARM_EXT_V2)
00072 #define ARM_AEXT_V2S (ARM_AEXT_V2  | ARM_EXT_V2S)
00073 #define ARM_AEXT_V3  (ARM_AEXT_V2S | ARM_EXT_V3)
00074 #define ARM_AEXT_V3M (ARM_AEXT_V3  | ARM_EXT_V3M)
00075 #define ARM_AEXT_V4xM       (ARM_AEXT_V3  | ARM_EXT_V4)
00076 #define ARM_AEXT_V4  (ARM_AEXT_V3M | ARM_EXT_V4)
00077 #define ARM_AEXT_V4TxM      (ARM_AEXT_V4xM       | ARM_EXT_V4T)
00078 #define ARM_AEXT_V4T (ARM_AEXT_V4  | ARM_EXT_V4T)
00079 #define ARM_AEXT_V5xM       (ARM_AEXT_V4xM       | ARM_EXT_V5)
00080 #define ARM_AEXT_V5  (ARM_AEXT_V4  | ARM_EXT_V5)
00081 #define ARM_AEXT_V5TxM      (ARM_AEXT_V5xM       | ARM_EXT_V4T | ARM_EXT_V5T)
00082 #define ARM_AEXT_V5T (ARM_AEXT_V5  | ARM_EXT_V4T | ARM_EXT_V5T)
00083 #define ARM_AEXT_V5TExP     (ARM_AEXT_V5T | ARM_EXT_V5ExP)
00084 #define ARM_AEXT_V5TE       (ARM_AEXT_V5TExP | ARM_EXT_V5E)
00085 #define ARM_AEXT_V5TEJ      (ARM_AEXT_V5TE       | ARM_EXT_V5J)
00086 #define ARM_AEXT_V6     (ARM_AEXT_V5TEJ | ARM_EXT_V6)
00087 #define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
00088 #define ARM_AEXT_V6Z    (ARM_AEXT_V6    | ARM_EXT_V6Z)
00089 #define ARM_AEXT_V6ZK   (ARM_AEXT_V6    | ARM_EXT_V6K | ARM_EXT_V6Z)
00090 #define ARM_AEXT_V6T2   (ARM_AEXT_V6    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM)
00091 #define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
00092 #define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
00093 #define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
00094 #define ARM_AEXT_V7_ARM     (ARM_AEXT_V6ZKT2 | ARM_EXT_V7)
00095 #define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
00096 #define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
00097 #define ARM_AEXT_NOTM \
00098   (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
00099 #define ARM_AEXT_V7M \
00100   ((ARM_AEXT_V7_ARM | ARM_EXT_V7M | ARM_EXT_DIV) & ~(ARM_AEXT_NOTM))
00101 #define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
00102 
00103 /* Processors with specific extensions in the co-processor space.  */
00104 #define ARM_ARCH_XSCALE     ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
00105 #define ARM_ARCH_IWMMXT     \
00106  ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
00107 #define ARM_ARCH_IWMMXT2    \
00108  ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)
00109 
00110 #define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
00111 #define FPU_VFP_V1   (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
00112 #define FPU_VFP_V2   (FPU_VFP_V1 | FPU_VFP_EXT_V2)
00113 #define FPU_VFP_V3   (FPU_VFP_V2 | FPU_VFP_EXT_V3)
00114 #define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
00115                          | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1)
00116 #define FPU_FPA             (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
00117 
00118 /* Deprecated */
00119 #define FPU_ARCH_VFP ARM_FEATURE (0, FPU_ENDIAN_PURE)
00120 
00121 #define FPU_ARCH_FPE ARM_FEATURE (0, FPU_FPA_EXT_V1)
00122 #define FPU_ARCH_FPA ARM_FEATURE (0, FPU_FPA)
00123 
00124 #define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
00125 #define FPU_ARCH_VFP_V1       ARM_FEATURE (0, FPU_VFP_V1)
00126 #define FPU_ARCH_VFP_V2       ARM_FEATURE (0, FPU_VFP_V2)
00127 #define FPU_ARCH_VFP_V3       ARM_FEATURE (0, FPU_VFP_V3)
00128 #define FPU_ARCH_NEON_V1  ARM_FEATURE (0, FPU_NEON_EXT_V1)
00129 #define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
00130   ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
00131 #define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
00132 
00133 #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
00134 
00135 #define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK)
00136 
00137 #define ARM_ARCH_V1  ARM_FEATURE (ARM_AEXT_V1, 0)
00138 #define ARM_ARCH_V2  ARM_FEATURE (ARM_AEXT_V2, 0)
00139 #define ARM_ARCH_V2S ARM_FEATURE (ARM_AEXT_V2S, 0)
00140 #define ARM_ARCH_V3  ARM_FEATURE (ARM_AEXT_V3, 0)
00141 #define ARM_ARCH_V3M ARM_FEATURE (ARM_AEXT_V3M, 0)
00142 #define ARM_ARCH_V4xM       ARM_FEATURE (ARM_AEXT_V4xM, 0)
00143 #define ARM_ARCH_V4  ARM_FEATURE (ARM_AEXT_V4, 0)
00144 #define ARM_ARCH_V4TxM      ARM_FEATURE (ARM_AEXT_V4TxM, 0)
00145 #define ARM_ARCH_V4T ARM_FEATURE (ARM_AEXT_V4T, 0)
00146 #define ARM_ARCH_V5xM       ARM_FEATURE (ARM_AEXT_V5xM, 0)
00147 #define ARM_ARCH_V5  ARM_FEATURE (ARM_AEXT_V5, 0)
00148 #define ARM_ARCH_V5TxM      ARM_FEATURE (ARM_AEXT_V5TxM, 0)
00149 #define ARM_ARCH_V5T ARM_FEATURE (ARM_AEXT_V5T, 0)
00150 #define ARM_ARCH_V5TExP     ARM_FEATURE (ARM_AEXT_V5TExP, 0)
00151 #define ARM_ARCH_V5TE       ARM_FEATURE (ARM_AEXT_V5TE, 0)
00152 #define ARM_ARCH_V5TEJ      ARM_FEATURE (ARM_AEXT_V5TEJ, 0)
00153 #define ARM_ARCH_V6  ARM_FEATURE (ARM_AEXT_V6, 0)
00154 #define ARM_ARCH_V6K ARM_FEATURE (ARM_AEXT_V6K, 0)
00155 #define ARM_ARCH_V6Z ARM_FEATURE (ARM_AEXT_V6Z, 0)
00156 #define ARM_ARCH_V6ZK       ARM_FEATURE (ARM_AEXT_V6ZK, 0)
00157 #define ARM_ARCH_V6T2       ARM_FEATURE (ARM_AEXT_V6T2, 0)
00158 #define ARM_ARCH_V6KT2      ARM_FEATURE (ARM_AEXT_V6KT2, 0)
00159 #define ARM_ARCH_V6ZT2      ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
00160 #define ARM_ARCH_V6ZKT2     ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
00161 #define ARM_ARCH_V7  ARM_FEATURE (ARM_AEXT_V7, 0)
00162 #define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0)
00163 #define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)
00164 #define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0)
00165 
00166 /* Some useful combinations:  */
00167 #define ARM_ARCH_NONE       ARM_FEATURE (0, 0)
00168 #define FPU_NONE     ARM_FEATURE (0, 0)
00169 #define ARM_ANY             ARM_FEATURE (-1, 0)  /* Any basic core.  */
00170 #define FPU_ANY_HARD ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
00171 #define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0)
00172 
00173 /* There are too many feature bits to fit in a single word, so use a
00174    structure.  For simplicity we put all core features in one word and
00175    everything else in the other.  */
00176 typedef struct
00177 {
00178   unsigned long core;
00179   unsigned long coproc;
00180 } arm_feature_set;
00181 
00182 #define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
00183   (((CPU).core & (FEAT).core) != 0 || ((CPU).coproc & (FEAT).coproc) != 0)
00184 
00185 #define ARM_MERGE_FEATURE_SETS(TARG,F1,F2)       \
00186   do {                                    \
00187     (TARG).core = (F1).core | (F2).core;  \
00188     (TARG).coproc = (F1).coproc | (F2).coproc;   \
00189   } while (0)
00190 
00191 #define ARM_CLEAR_FEATURE(TARG,F1,F2)            \
00192   do {                                    \
00193     (TARG).core = (F1).core &~ (F2).core; \
00194     (TARG).coproc = (F1).coproc &~ (F2).coproc;  \
00195   } while (0)
00196 
00197 #define ARM_FEATURE(core, coproc) {(core), (coproc)}