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cell-binutils  2.17cvs20070401
Defines | Functions | Variables
mt-desc.c File Reference
#include "sysdep.h"
#include <stdio.h>
#include <stdarg.h>
#include "ansidecl.h"
#include "bfd.h"
#include "symcat.h"
#include "mt-desc.h"
#include "mt-opc.h"
#include "opintl.h"
#include "libiberty.h"
#include "xregex.h"

Go to the source code of this file.

Defines

#define A(a)   (1 << CGEN_HW_a)
#define A(a)   (1 << CGEN_IFLD_a)
#define A(a)   (1 << CGEN_OPERAND_a)
#define OPERAND(op)   MT_OPERAND_op
#define OP(field)   CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
#define A(a)   (1 << CGEN_INSN_a)
#define UNSET   (CGEN_SIZE_UNKNOWN + 1)

Functions

static void init_tables (void)
static const CGEN_MACHlookup_mach_via_bfd_name (const CGEN_MACH *, const char *)
static void build_hw_table (CGEN_CPU_TABLE *)
static void build_ifield_table (CGEN_CPU_TABLE *)
static void build_operand_table (CGEN_CPU_TABLE *)
static void build_insn_table (CGEN_CPU_TABLE *)
static void mt_cgen_rebuild_tables (CGEN_CPU_TABLE *)
CGEN_CPU_DESC mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type,...)
CGEN_CPU_DESC mt_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
void mt_cgen_cpu_close (CGEN_CPU_DESC cd)

Variables

static const CGEN_ATTR_ENTRY bool_attr []
static const CGEN_ATTR_ENTRY
MACH_attr[] 
ATTRIBUTE_UNUSED
const CGEN_ATTR_TABLE mt_cgen_ifield_attr_table []
const CGEN_ATTR_TABLE mt_cgen_hardware_attr_table []
const CGEN_ATTR_TABLE mt_cgen_operand_attr_table []
const CGEN_ATTR_TABLE mt_cgen_insn_attr_table []
static const CGEN_ISA mt_cgen_isa_table []
static const CGEN_MACH mt_cgen_mach_table []
static CGEN_KEYWORD_ENTRY mt_cgen_opval_msys_syms_entries []
CGEN_KEYWORD mt_cgen_opval_msys_syms
static CGEN_KEYWORD_ENTRY mt_cgen_opval_h_spr_entries []
CGEN_KEYWORD mt_cgen_opval_h_spr
const CGEN_HW_ENTRY mt_cgen_hw_table []
const CGEN_IFLD mt_cgen_ifld_table []
const CGEN_OPERAND mt_cgen_operand_table []
static const CGEN_IBASE mt_cgen_insn_table [MAX_INSNS]

Define Documentation

#define A (   a)    (1 << CGEN_HW_a)

Definition at line 562 of file mt-desc.c.

#define A (   a)    (1 << CGEN_IFLD_a)

Definition at line 562 of file mt-desc.c.

#define A (   a)    (1 << CGEN_OPERAND_a)

Definition at line 562 of file mt-desc.c.

#define A (   a)    (1 << CGEN_INSN_a)

Definition at line 562 of file mt-desc.c.

#define OP (   field)    CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))

Definition at line 558 of file mt-desc.c.

#define OPERAND (   op)    MT_OPERAND_op

Definition at line 322 of file mt-desc.c.

#define UNSET   (CGEN_SIZE_UNKNOWN + 1)

Function Documentation

static void build_hw_table ( CGEN_CPU_TABLE cd) [static]

Definition at line 1022 of file mt-desc.c.

{
  int i;
  int machs = cd->machs;
  const CGEN_HW_ENTRY *init = & mt_cgen_hw_table[0];
  /* MAX_HW is only an upper bound on the number of selected entries.
     However each entry is indexed by it's enum so there can be holes in
     the table.  */
  const CGEN_HW_ENTRY **selected =
    (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));

  cd->hw_table.init_entries = init;
  cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
  memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
  /* ??? For now we just use machs to determine which ones we want.  */
  for (i = 0; init[i].name != NULL; ++i)
    if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
       & machs)
      selected[init[i].type] = &init[i];
  cd->hw_table.entries = selected;
  cd->hw_table.num_entries = MAX_HW;
}

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static void build_ifield_table ( CGEN_CPU_TABLE cd) [static]

Definition at line 1048 of file mt-desc.c.

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static void build_insn_table ( CGEN_CPU_TABLE cd) [static]

Definition at line 1087 of file mt-desc.c.

{
  int i;
  const CGEN_IBASE *ib = & mt_cgen_insn_table[0];
  CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));

  memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
  for (i = 0; i < MAX_INSNS; ++i)
    insns[i].base = &ib[i];
  cd->insn_table.init_entries = insns;
  cd->insn_table.entry_size = sizeof (CGEN_IBASE);
  cd->insn_table.num_init_entries = MAX_INSNS;
}

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static void build_operand_table ( CGEN_CPU_TABLE cd) [static]

Definition at line 1056 of file mt-desc.c.

{
  int i;
  int machs = cd->machs;
  const CGEN_OPERAND *init = & mt_cgen_operand_table[0];
  /* MAX_OPERANDS is only an upper bound on the number of selected entries.
     However each entry is indexed by it's enum so there can be holes in
     the table.  */
  const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));

  cd->operand_table.init_entries = init;
  cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
  memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
  /* ??? For now we just use mach to determine which ones we want.  */
  for (i = 0; init[i].name != NULL; ++i)
    if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
       & machs)
      selected[init[i].type] = &init[i];
  cd->operand_table.entries = selected;
  cd->operand_table.num_entries = MAX_OPERANDS;
}

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static void init_tables ( void  ) [static]

Definition at line 994 of file mt-desc.c.

{
}

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static const CGEN_MACH * lookup_mach_via_bfd_name ( const CGEN_MACH table,
const char *  name 
) [static]

Definition at line 1008 of file mt-desc.c.

{
  while (table->name)
    {
      if (strcmp (name, table->bfd_name) == 0)
       return table;
      ++table;
    }
  abort ();
}

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Definition at line 1297 of file mt-desc.c.

{
  unsigned int i;
  const CGEN_INSN *insns;

  if (cd->macro_insn_table.init_entries)
    {
      insns = cd->macro_insn_table.init_entries;
      for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
       if (CGEN_INSN_RX ((insns)))
         regfree (CGEN_INSN_RX (insns));
    }

  if (cd->insn_table.init_entries)
    {
      insns = cd->insn_table.init_entries;
      for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
       if (CGEN_INSN_RX (insns))
         regfree (CGEN_INSN_RX (insns));
    }  

  if (cd->macro_insn_table.init_entries)
    free ((CGEN_INSN *) cd->macro_insn_table.init_entries);

  if (cd->insn_table.init_entries)
    free ((CGEN_INSN *) cd->insn_table.init_entries);

  if (cd->hw_table.entries)
    free ((CGEN_HW_ENTRY *) cd->hw_table.entries);

  if (cd->operand_table.entries)
    free ((CGEN_HW_ENTRY *) cd->operand_table.entries);

  free (cd);
}

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CGEN_CPU_DESC mt_cgen_cpu_open ( enum cgen_cpu_open_arg  arg_type,
  ... 
)

Definition at line 1200 of file mt-desc.c.

{
  CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
  static int init_p;
  CGEN_BITSET *isas = 0;  /* 0 = "unspecified" */
  unsigned int machs = 0; /* 0 = "unspecified" */
  enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
  va_list ap;

  if (! init_p)
    {
      init_tables ();
      init_p = 1;
    }

  memset (cd, 0, sizeof (*cd));

  va_start (ap, arg_type);
  while (arg_type != CGEN_CPU_OPEN_END)
    {
      switch (arg_type)
       {
       case CGEN_CPU_OPEN_ISAS :
         isas = va_arg (ap, CGEN_BITSET *);
         break;
       case CGEN_CPU_OPEN_MACHS :
         machs = va_arg (ap, unsigned int);
         break;
       case CGEN_CPU_OPEN_BFDMACH :
         {
           const char *name = va_arg (ap, const char *);
           const CGEN_MACH *mach =
             lookup_mach_via_bfd_name (mt_cgen_mach_table, name);

           machs |= 1 << mach->num;
           break;
         }
       case CGEN_CPU_OPEN_ENDIAN :
         endian = va_arg (ap, enum cgen_endian);
         break;
       default :
         fprintf (stderr, "mt_cgen_cpu_open: unsupported argument `%d'\n",
                 arg_type);
         abort (); /* ??? return NULL? */
       }
      arg_type = va_arg (ap, enum cgen_cpu_open_arg);
    }
  va_end (ap);

  /* Mach unspecified means "all".  */
  if (machs == 0)
    machs = (1 << MAX_MACHS) - 1;
  /* Base mach is always selected.  */
  machs |= 1;
  if (endian == CGEN_ENDIAN_UNKNOWN)
    {
      /* ??? If target has only one, could have a default.  */
      fprintf (stderr, "mt_cgen_cpu_open: no endianness specified\n");
      abort ();
    }

  cd->isas = cgen_bitset_copy (isas);
  cd->machs = machs;
  cd->endian = endian;
  /* FIXME: for the sparc case we can determine insn-endianness statically.
     The worry here is where both data and insn endian can be independently
     chosen, in which case this function will need another argument.
     Actually, will want to allow for more arguments in the future anyway.  */
  cd->insn_endian = endian;

  /* Table (re)builder.  */
  cd->rebuild_tables = mt_cgen_rebuild_tables;
  mt_cgen_rebuild_tables (cd);

  /* Default to not allowing signed overflow.  */
  cd->signed_overflow_ok_p = 0;
  
  return (CGEN_CPU_DESC) cd;
}

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CGEN_CPU_DESC mt_cgen_cpu_open_1 ( const char *  mach_name,
enum cgen_endian  endian 
)

Definition at line 1284 of file mt-desc.c.

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static void mt_cgen_rebuild_tables ( CGEN_CPU_TABLE cd) [static]

Definition at line 1104 of file mt-desc.c.

{
  int i;
  CGEN_BITSET *isas = cd->isas;
  unsigned int machs = cd->machs;

  cd->int_insn_p = CGEN_INT_INSN_P;

  /* Data derived from the isa spec.  */
#define UNSET (CGEN_SIZE_UNKNOWN + 1)
  cd->default_insn_bitsize = UNSET;
  cd->base_insn_bitsize = UNSET;
  cd->min_insn_bitsize = 65535; /* Some ridiculously big number.  */
  cd->max_insn_bitsize = 0;
  for (i = 0; i < MAX_ISAS; ++i)
    if (cgen_bitset_contains (isas, i))
      {
       const CGEN_ISA *isa = & mt_cgen_isa_table[i];

       /* Default insn sizes of all selected isas must be
          equal or we set the result to 0, meaning "unknown".  */
       if (cd->default_insn_bitsize == UNSET)
         cd->default_insn_bitsize = isa->default_insn_bitsize;
       else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
         ; /* This is ok.  */
       else
         cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;

       /* Base insn sizes of all selected isas must be equal
          or we set the result to 0, meaning "unknown".  */
       if (cd->base_insn_bitsize == UNSET)
         cd->base_insn_bitsize = isa->base_insn_bitsize;
       else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
         ; /* This is ok.  */
       else
         cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;

       /* Set min,max insn sizes.  */
       if (isa->min_insn_bitsize < cd->min_insn_bitsize)
         cd->min_insn_bitsize = isa->min_insn_bitsize;
       if (isa->max_insn_bitsize > cd->max_insn_bitsize)
         cd->max_insn_bitsize = isa->max_insn_bitsize;
      }

  /* Data derived from the mach spec.  */
  for (i = 0; i < MAX_MACHS; ++i)
    if (((1 << i) & machs) != 0)
      {
       const CGEN_MACH *mach = & mt_cgen_mach_table[i];

       if (mach->insn_chunk_bitsize != 0)
       {
         if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
           {
             fprintf (stderr, "mt_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
                     cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
             abort ();
           }

         cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
       }
      }

  /* Determine which hw elements are used by MACH.  */
  build_hw_table (cd);

  /* Build the ifield table.  */
  build_ifield_table (cd);

  /* Determine which operands are used by MACH/ISA.  */
  build_operand_table (cd);

  /* Build the instruction table.  */
  build_insn_table (cd);
}

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Variable Documentation

const CGEN_ATTR_ENTRY ISA_attr [] ATTRIBUTE_UNUSED [static]
Initial value:
{
  { "base", MACH_BASE },
  { "ms1", MACH_MS1 },
  { "ms1_003", MACH_MS1_003 },
  { "ms2", MACH_MS2 },
  { "max", MACH_MAX },
  { 0, 0 }
}

Definition at line 46 of file mt-desc.c.

Initial value:
{
  { "#f", 0 },
  { "#t", 1 },
  { 0, 0 }
}

Definition at line 39 of file mt-desc.c.

Initial value:
{
  { "MACH", & MACH_attr[0], & MACH_attr[0] },
  { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
  { "PC", &bool_attr[0], &bool_attr[0] },
  { "PROFILE", &bool_attr[0], &bool_attr[0] },
  { 0, 0, 0 }
}

Definition at line 75 of file mt-desc.c.

Initial value:
{
  { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  { "h-spr", HW_H_SPR, CGEN_ASM_KEYWORD, (PTR) & mt_cgen_opval_h_spr, { 0, { { { (1<<MACH_BASE), 0 } } } } },
  { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
  { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
}

Definition at line 195 of file mt-desc.c.

Initial value:
{
  { "MACH", & MACH_attr[0], & MACH_attr[0] },
  { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
  { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
  { "RESERVED", &bool_attr[0], &bool_attr[0] },
  { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
  { "SIGNED", &bool_attr[0], &bool_attr[0] },
  { 0, 0, 0 }
}

Definition at line 63 of file mt-desc.c.

Definition at line 218 of file mt-desc.c.

Initial value:
{
  { "MACH", & MACH_attr[0], & MACH_attr[0] },
  { "ALIAS", &bool_attr[0], &bool_attr[0] },
  { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
  { "COND-CTI", &bool_attr[0], &bool_attr[0] },
  { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
  { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
  { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
  { "RELAXED", &bool_attr[0], &bool_attr[0] },
  { "NO-DIS", &bool_attr[0], &bool_attr[0] },
  { "PBB", &bool_attr[0], &bool_attr[0] },
  { "LOAD-DELAY", &bool_attr[0], &bool_attr[0] },
  { "MEMORY-ACCESS", &bool_attr[0], &bool_attr[0] },
  { "AL-INSN", &bool_attr[0], &bool_attr[0] },
  { "IO-INSN", &bool_attr[0], &bool_attr[0] },
  { "BR-INSN", &bool_attr[0], &bool_attr[0] },
  { "JAL-HAZARD", &bool_attr[0], &bool_attr[0] },
  { "USES-FRDR", &bool_attr[0], &bool_attr[0] },
  { "USES-FRDRRR", &bool_attr[0], &bool_attr[0] },
  { "USES-FRSR1", &bool_attr[0], &bool_attr[0] },
  { "USES-FRSR2", &bool_attr[0], &bool_attr[0] },
  { "SKIPA", &bool_attr[0], &bool_attr[0] },
  { 0, 0, 0 }
}

Definition at line 99 of file mt-desc.c.

Definition at line 565 of file mt-desc.c.

Initial value:
 {
  { "mt", 32, 32, 32, 32 },
  { 0, 0, 0, 0, 0 }
}

Definition at line 128 of file mt-desc.c.

Initial value:
 {
  { "ms1", "ms1", MACH_MS1, 0 },
  { "ms1-003", "ms1-003", MACH_MS1_003, 0 },
  { "ms2", "ms2", MACH_MS2, 0 },
  { 0, 0, 0, 0 }
}

Definition at line 135 of file mt-desc.c.

Initial value:
{
  { "MACH", & MACH_attr[0], & MACH_attr[0] },
  { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
  { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
  { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
  { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
  { "SIGNED", &bool_attr[0], &bool_attr[0] },
  { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
  { "RELAX", &bool_attr[0], &bool_attr[0] },
  { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
  { 0, 0, 0 }
}

Definition at line 85 of file mt-desc.c.

Definition at line 325 of file mt-desc.c.

Initial value:
{
  & mt_cgen_opval_h_spr_entries[0],
  20,
  0, 0, 0, 0, ""
}

Definition at line 179 of file mt-desc.c.

Initial value:
{
  { "R0", 0, {0, {{{0, 0}}}}, 0, 0 },
  { "R1", 1, {0, {{{0, 0}}}}, 0, 0 },
  { "R2", 2, {0, {{{0, 0}}}}, 0, 0 },
  { "R3", 3, {0, {{{0, 0}}}}, 0, 0 },
  { "R4", 4, {0, {{{0, 0}}}}, 0, 0 },
  { "R5", 5, {0, {{{0, 0}}}}, 0, 0 },
  { "R6", 6, {0, {{{0, 0}}}}, 0, 0 },
  { "R7", 7, {0, {{{0, 0}}}}, 0, 0 },
  { "R8", 8, {0, {{{0, 0}}}}, 0, 0 },
  { "R9", 9, {0, {{{0, 0}}}}, 0, 0 },
  { "R10", 10, {0, {{{0, 0}}}}, 0, 0 },
  { "R11", 11, {0, {{{0, 0}}}}, 0, 0 },
  { "R12", 12, {0, {{{0, 0}}}}, 0, 0 },
  { "fp", 12, {0, {{{0, 0}}}}, 0, 0 },
  { "R13", 13, {0, {{{0, 0}}}}, 0, 0 },
  { "sp", 13, {0, {{{0, 0}}}}, 0, 0 },
  { "R14", 14, {0, {{{0, 0}}}}, 0, 0 },
  { "ra", 14, {0, {{{0, 0}}}}, 0, 0 },
  { "R15", 15, {0, {{{0, 0}}}}, 0, 0 },
  { "ira", 15, {0, {{{0, 0}}}}, 0, 0 }
}

Definition at line 155 of file mt-desc.c.

Initial value:
{
  & mt_cgen_opval_msys_syms_entries[0],
  2,
  0, 0, 0, 0, ""
}

Definition at line 148 of file mt-desc.c.

Initial value:
{
  { "DUP", 1, {0, {{{0, 0}}}}, 0, 0 },
  { "XX", 0, {0, {{{0, 0}}}}, 0, 0 }
}

Definition at line 142 of file mt-desc.c.