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cell-binutils  2.17cvs20070401
mmix-opc.c
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00001 /* mmix-opc.c -- MMIX opcode table
00002    Copyright (C) 2001, 2003 Free Software Foundation, Inc.
00003    Written by Hans-Peter Nilsson (hp@bitrange.com)
00004 
00005 This file is part of GDB, GAS, and the GNU binutils.
00006 
00007 GDB, GAS, and the GNU binutils are free software; you can redistribute
00008 them and/or modify them under the terms of the GNU General Public
00009 License as published by the Free Software Foundation; either version 2,
00010 or (at your option) any later version.
00011 
00012 GDB, GAS, and the GNU binutils are distributed in the hope that they
00013 will be useful, but WITHOUT ANY WARRANTY; without even the implied
00014 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
00015 the GNU General Public License for more details.
00016 
00017 You should have received a copy of the GNU General Public License
00018 along with this file; see the file COPYING.  If not, write to the Free
00019 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00020 
00021 #include <stdio.h>
00022 #include "opcode/mmix.h"
00023 #include "symcat.h"
00024 
00025 /* Register-name-table for special registers.  */
00026 const struct mmix_spec_reg mmix_spec_regs[] =
00027  {
00028    /* Keep rJ at top; it's the most frequently used one.  */
00029    {"rJ", 4},
00030    {"rA", 21},
00031    {"rB", 0},
00032    {"rC", 8},
00033    {"rD", 1},
00034    {"rE", 2},
00035    {"rF", 22},
00036    {"rG", 19},
00037    {"rH", 3},
00038    {"rI", 12},
00039    {"rK", 15},
00040    {"rL", 20},
00041    {"rM", 5},
00042    {"rN", 9},
00043    {"rO", 10},
00044    {"rP", 23},
00045    {"rQ", 16},
00046    {"rR", 6},
00047    {"rS", 11},
00048    {"rT", 13},
00049    {"rU", 17},
00050    {"rV", 18},
00051    {"rW", 24},
00052    {"rX", 25},
00053    {"rY", 26},
00054    {"rZ", 27},
00055    {"rBB", 7},
00056    {"rTT", 14},
00057    {"rWW", 28},
00058    {"rXX", 29},
00059    {"rYY", 30},
00060    {"rZZ", 31},
00061    {NULL, 0}
00062  };
00063 
00064 /* Opcode-table.  In order to cut down on redundant contents, we use helper
00065    macros.  */
00066 
00067 /* All bits in the opcode-byte are significant.  Add "| ..." expressions
00068    to add zero-bits.  */
00069 #undef O
00070 #define O(m) ((unsigned long) (m) << 24UL), ((~(unsigned long) (m) & 255) << 24)
00071 
00072 /* Bits 7..1 of the opcode are significant.  */
00073 #undef Z
00074 #define Z(m) ((unsigned long) (m) << 24), ((~(unsigned long) (m) & 254) << 24)
00075 
00076 /* For easier overview of the table.  */
00077 #define N mmix_type_normal
00078 #define B mmix_type_branch
00079 #define C mmix_type_condbranch
00080 #define MB mmix_type_memaccess_byte
00081 #define MW mmix_type_memaccess_wyde
00082 #define MT mmix_type_memaccess_tetra
00083 #define MO mmix_type_memaccess_octa
00084 #define M mmix_type_memaccess_block
00085 #define J mmix_type_jsr
00086 #define P mmix_type_pseudo
00087 
00088 #define OP(y) XCONCAT2 (mmix_operands_,y)
00089 
00090 /* Groups of instructions specified here must, if all are matching the
00091    same instruction, be consecutive, in order more-specific to
00092    less-specific match.  */
00093 
00094 const struct mmix_opcode mmix_opcodes[] =
00095  {
00096    {"trap",   O (0),        OP (xyz_opt),        J},
00097    {"fcmp",   O (1),        OP (regs),           N},
00098    {"flot",   Z (8),        OP (roundregs_z),    N},
00099 
00100    {"fun",    O (2),        OP (regs),           N},
00101    {"feql",   O (3),        OP (regs),           N},
00102    {"flotu",  Z (10),              OP (roundregs_z),    N},
00103 
00104    {"fadd",   O (4),        OP (regs),           N},
00105    {"fix",    O (5),        OP (roundregs),             N},
00106    {"sflot",  Z (12),              OP (roundregs_z),    N},
00107 
00108    {"fsub",   O (6),        OP (regs),           N},
00109    {"fixu",   O (7),        OP (roundregs),             N},
00110    {"sflotu", Z (14),              OP (roundregs_z),    N},
00111 
00112    {"fmul",   O (16),              OP (regs),           N},
00113    {"fcmpe",  O (17),              OP (regs),           N},
00114    {"mul",    Z (24),              OP (regs_z),         N},
00115 
00116    {"fune",   O (18),              OP (regs),           N},
00117    {"feqle",  O (19),              OP (regs),           N},
00118    {"mulu",   Z (26),              OP (regs_z),         N},
00119 
00120    {"fdiv",   O (20),              OP (regs),           N},
00121    {"fsqrt",  O (21),              OP (roundregs),             N},
00122    {"div",    Z (28),              OP (regs_z),         N},
00123 
00124    {"frem",   O (22),              OP (regs),           N},
00125    {"fint",   O (23),              OP (roundregs),             N},
00126    {"divu",   Z (30),              OP (regs_z),         N},
00127 
00128    {"add",    Z (0x20),     OP (regs_z),         N},
00129    {"2addu",  Z (0x28),     OP (regs_z),         N},
00130 
00131    {"addu",   Z (0x22),     OP (regs_z),         N},
00132    /* Synonym for ADDU.  Put after ADDU, since we don't prefer it for
00133       disassembly.  It's supposed to be used for addresses, so we make it
00134       a memory block reference for purposes of assembly.  */
00135    {"lda",    Z (0x22),     OP (regs_z_opt),     M},
00136    {"4addu",  Z (0x2a),     OP (regs_z),         N},
00137 
00138    {"sub",    Z (0x24),     OP (regs_z),         N},
00139    {"8addu",  Z (0x2c),     OP (regs_z),         N},
00140 
00141    {"subu",   Z (0x26),     OP (regs_z),         N},
00142    {"16addu", Z (0x2e),     OP (regs_z),         N},
00143 
00144    {"cmp",    Z (0x30),     OP (regs_z),         N},
00145    {"sl",     Z (0x38),     OP (regs_z),         N},
00146 
00147    {"cmpu",   Z (0x32),     OP (regs_z),         N},
00148    {"slu",    Z (0x3a),     OP (regs_z),         N},
00149 
00150    {"neg",    Z (0x34),     OP (neg),            N},
00151    {"sr",     Z (0x3c),     OP (regs_z),         N},
00152 
00153    {"negu",   Z (0x36),     OP (neg),            N},
00154    {"sru",    Z (0x3e),     OP (regs_z),         N},
00155 
00156    {"bn",     Z (0x40),     OP (regaddr),        C},
00157    {"bnn",    Z (0x48),     OP (regaddr),        C},
00158 
00159    {"bz",     Z (0x42),     OP (regaddr),        C},
00160    {"bnz",    Z (0x4a),     OP (regaddr),        C},
00161 
00162    {"bp",     Z (0x44),     OP (regaddr),        C},
00163    {"bnp",    Z (0x4c),     OP (regaddr),        C},
00164 
00165    {"bod",    Z (0x46),     OP (regaddr),        C},
00166    {"bev",    Z (0x4e),     OP (regaddr),        C},
00167 
00168    {"pbn",    Z (0x50),     OP (regaddr),        C},
00169    {"pbnn",   Z (0x58),     OP (regaddr),        C},
00170 
00171    {"pbz",    Z (0x52),     OP (regaddr),        C},
00172    {"pbnz",   Z (0x5a),     OP (regaddr),        C},
00173 
00174    {"pbp",    Z (0x54),     OP (regaddr),        C},
00175    {"pbnp",   Z (0x5c),     OP (regaddr),        C},
00176 
00177    {"pbod",   Z (0x56),     OP (regaddr),        C},
00178    {"pbev",   Z (0x5e),     OP (regaddr),        C},
00179 
00180    {"csn",    Z (0x60),     OP (regs_z),         N},
00181    {"csnn",   Z (0x68),     OP (regs_z),         N},
00182 
00183    {"csz",    Z (0x62),     OP (regs_z),         N},
00184    {"csnz",   Z (0x6a),     OP (regs_z),         N},
00185 
00186    {"csp",    Z (0x64),     OP (regs_z),         N},
00187    {"csnp",   Z (0x6c),     OP (regs_z),         N},
00188 
00189    {"csod",   Z (0x66),     OP (regs_z),         N},
00190    {"csev",   Z (0x6e),     OP (regs_z),         N},
00191 
00192    {"zsn",    Z (0x70),     OP (regs_z),         N},
00193    {"zsnn",   Z (0x78),     OP (regs_z),         N},
00194 
00195    {"zsz",    Z (0x72),     OP (regs_z),         N},
00196    {"zsnz",   Z (0x7a),     OP (regs_z),         N},
00197 
00198    {"zsp",    Z (0x74),     OP (regs_z),         N},
00199    {"zsnp",   Z (0x7c),     OP (regs_z),         N},
00200 
00201    {"zsod",   Z (0x76),     OP (regs_z),         N},
00202    {"zsev",   Z (0x7e),     OP (regs_z),         N},
00203 
00204    {"ldb",    Z (0x80),     OP (regs_z_opt),     MB},
00205    {"ldt",    Z (0x88),     OP (regs_z_opt),     MT},
00206 
00207    {"ldbu",   Z (0x82),     OP (regs_z_opt),     MB},
00208    {"ldtu",   Z (0x8a),     OP (regs_z_opt),     MT},
00209 
00210    {"ldw",    Z (0x84),     OP (regs_z_opt),     MW},
00211    {"ldo",    Z (0x8c),     OP (regs_z_opt),     MO},
00212 
00213    {"ldwu",   Z (0x86),     OP (regs_z_opt),     MW},
00214    {"ldou",   Z (0x8e),     OP (regs_z_opt),     MO},
00215 
00216    {"ldsf",   Z (0x90),     OP (regs_z_opt),     MT},
00217 
00218    /* This doesn't seem to access memory, just the TLB.  */
00219    {"ldvts",  Z (0x98),     OP (regs_z_opt),     M},
00220 
00221    {"ldht",   Z (0x92),     OP (regs_z_opt),     MT},
00222 
00223    /* Neither does this per-se.  */
00224    {"preld",  Z (0x9a),     OP (x_regs_z),              N},
00225 
00226    {"cswap",  Z (0x94),     OP (regs_z_opt),     MO},
00227    {"prego",  Z (0x9c),     OP (x_regs_z),              N},
00228 
00229    {"ldunc",  Z (0x96),     OP (regs_z_opt),     MO},
00230    {"go",     Z (GO_INSN_BYTE),
00231                             OP (regs_z_opt),     B},
00232 
00233    {"stb",    Z (0xa0),     OP (regs_z_opt),     MB},
00234    {"stt",    Z (0xa8),     OP (regs_z_opt),     MT},
00235 
00236    {"stbu",   Z (0xa2),     OP (regs_z_opt),     MB},
00237    {"sttu",   Z (0xaa),     OP (regs_z_opt),     MT},
00238 
00239    {"stw",    Z (0xa4),     OP (regs_z_opt),     MW},
00240    {"sto",    Z (0xac),     OP (regs_z_opt),     MO},
00241 
00242    {"stwu",   Z (0xa6),     OP (regs_z_opt),     MW},
00243    {"stou",   Z (0xae),     OP (regs_z_opt),     MO},
00244 
00245    {"stsf",   Z (0xb0),     OP (regs_z_opt),     MT},
00246    {"syncd",  Z (0xb8),     OP (x_regs_z),              M},
00247 
00248    {"stht",   Z (0xb2),     OP (regs_z_opt),     MT},
00249    {"prest",  Z (0xba),     OP (x_regs_z),              M},
00250 
00251    {"stco",   Z (0xb4),     OP (x_regs_z),              MO},
00252    {"syncid", Z (0xbc),     OP (x_regs_z),              M},
00253 
00254    {"stunc",  Z (0xb6),     OP (regs_z_opt),     MO},
00255    {"pushgo", Z (PUSHGO_INSN_BYTE),
00256                             OP (pushgo),         J},
00257 
00258    /* Synonym for OR with a zero Z.  */
00259    {"set",    O (0xc1)
00260                 | 0xff,     OP (set),            N},
00261 
00262    {"or",     Z (0xc0),     OP (regs_z),         N},
00263    {"and",    Z (0xc8),     OP (regs_z),         N},
00264 
00265    {"orn",    Z (0xc2),     OP (regs_z),         N},
00266    {"andn",   Z (0xca),     OP (regs_z),         N},
00267 
00268    {"nor",    Z (0xc4),     OP (regs_z),         N},
00269    {"nand",   Z (0xcc),     OP (regs_z),         N},
00270 
00271    {"xor",    Z (0xc6),     OP (regs_z),         N},
00272    {"nxor",   Z (0xce),     OP (regs_z),         N},
00273 
00274    {"bdif",   Z (0xd0),     OP (regs_z),         N},
00275    {"mux",    Z (0xd8),     OP (regs_z),         N},
00276 
00277    {"wdif",   Z (0xd2),     OP (regs_z),         N},
00278    {"sadd",   Z (0xda),     OP (regs_z),         N},
00279 
00280    {"tdif",   Z (0xd4),     OP (regs_z),         N},
00281    {"mor",    Z (0xdc),     OP (regs_z),         N},
00282 
00283    {"odif",   Z (0xd6),     OP (regs_z),         N},
00284    {"mxor",   Z (0xde),     OP (regs_z),         N},
00285 
00286    {"seth",   O (0xe0),     OP (reg_yz),         N},
00287    {"setmh",  O (0xe1),     OP (reg_yz),         N},
00288    {"orh",    O (0xe8),     OP (reg_yz),         N},
00289    {"ormh",   O (0xe9),     OP (reg_yz),         N},
00290 
00291    {"setml",  O (0xe2),     OP (reg_yz),         N},
00292    {"setl",   O (SETL_INSN_BYTE),
00293                             OP (reg_yz),         N},
00294    {"orml",   O (0xea),     OP (reg_yz),         N},
00295    {"orl",    O (0xeb),     OP (reg_yz),         N},
00296 
00297    {"inch",   O (INCH_INSN_BYTE),
00298                             OP (reg_yz),         N},
00299    {"incmh",  O (INCMH_INSN_BYTE),
00300                             OP (reg_yz),         N},
00301    {"andnh",  O (0xec),     OP (reg_yz),         N},
00302    {"andnmh", O (0xed),     OP (reg_yz),         N},
00303 
00304    {"incml",  O (INCML_INSN_BYTE),
00305                             OP (reg_yz),         N},
00306    {"incl",   O (0xe7),     OP (reg_yz),         N},
00307    {"andnml", O (0xee),     OP (reg_yz),         N},
00308    {"andnl",  O (0xef),     OP (reg_yz),         N},
00309 
00310    {"jmp",    Z (0xf0),     OP (jmp),            B},
00311    {"pop",    O (0xf8),     OP (pop),            B},
00312    {"resume", O (0xf9)
00313                 | 0xffff00, OP (resume),         B},
00314 
00315    {"pushj",  Z (0xf2),     OP (pushj),          J},
00316    {"save",   O (0xfa)
00317                 | 0xffff,   OP (save),           M},
00318    {"unsave", O (0xfb)
00319                 | 0xffff00, OP (unsave),         M},
00320 
00321    {"geta",   Z (0xf4),     OP (regaddr),        N},
00322    {"sync",   O (0xfc),     OP (sync),           N},
00323    {"swym",   O (SWYM_INSN_BYTE),
00324                             OP (xyz_opt),        N},
00325 
00326    {"put", Z (0xf6) | 0xff00,      OP (put),            N},
00327    {"get", O (0xfe) | 0xffe0,      OP (get),            N},
00328    {"trip",   O (0xff),     OP (xyz_opt),        J},
00329 
00330    /* We have mmixal pseudos in the ordinary instruction table so we can
00331       avoid the "set" vs. ".set" ambiguity that would be the effect if we
00332       had pseudos handled "normally" and defined NO_PSEUDO_DOT.
00333 
00334       Note that IS and GREG are handled fully by md_start_line_hook, so
00335       they're not here.  */
00336    {"loc",    ~0, ~0,              OP (loc),            P},
00337    {"prefix", ~0, ~0,              OP (prefix),         P},
00338    {"byte",   ~0, ~0,              OP (byte),           P},
00339    {"wyde",   ~0, ~0,              OP (wyde),           P},
00340    {"tetra",  ~0, ~0,              OP (tetra),          P},
00341    {"octa",   ~0, ~0,              OP (octa),           P},
00342    {"local",  ~0, ~0,              OP (local),          P},
00343    {"bspec",  ~0, ~0,              OP (bspec),          P},
00344    {"espec",  ~0, ~0,              OP (espec),          P},
00345 
00346    {NULL, ~0, ~0, OP (none), N}
00347  };