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cell-binutils  2.17cvs20070401
mips32-sf32.d
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00001 #objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
00002 #name: MIPS32 odd single-precision float registers
00003 #as: -32 
00004 
00005 # Check MIPS32 instruction assembly
00006 
00007 .*: +file format .*mips.*
00008 
00009 Disassembly of section .text:
00010 0+0000 <[^>]*> 3c013f80     lui    \$1,0x3f80
00011 0+0004 <[^>]*> 44810800     mtc1   \$1,\$f1
00012 0+0008 <[^>]*> c783c000     lwc1	\$f3,-16384\(\$28\)
00013                      8: R_MIPS_LITERAL    \.lit4\+0x4000
00014 0+000c <[^>]*> 46030940     add.s  \$f5,\$f1,\$f3
00015 0+0010 <[^>]*> 46003a21     cvt.d.s       \$f8,\$f7
00016 0+0014 <[^>]*> 46803a21     cvt.d.w       \$f8,\$f7
00017 0+0018 <[^>]*> 462041e0     cvt.s.d       \$f7,\$f8
00018 0+001c <[^>]*> 462041cd     trunc.w.d     \$f7,\$f8
00019        \.\.\.