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cell-binutils  2.17cvs20070401
mep-opc.h
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00001 /* Instruction opcode header for mep.
00002 
00003 THIS FILE IS MACHINE GENERATED WITH CGEN.
00004 
00005 Copyright 1996-2005 Free Software Foundation, Inc.
00006 
00007 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
00008 
00009 This program is free software; you can redistribute it and/or modify
00010 it under the terms of the GNU General Public License as published by
00011 the Free Software Foundation; either version 2, or (at your option)
00012 any later version.
00013 
00014 This program is distributed in the hope that it will be useful,
00015 but WITHOUT ANY WARRANTY; without even the implied warranty of
00016 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00017 GNU General Public License for more details.
00018 
00019 You should have received a copy of the GNU General Public License along
00020 with this program; if not, write to the Free Software Foundation, Inc.,
00021 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
00022 
00023 */
00024 
00025 #ifndef MEP_OPC_H
00026 #define MEP_OPC_H
00027 
00028 /* -- opc.h */
00029 
00030 #undef  CGEN_DIS_HASH_SIZE
00031 #define CGEN_DIS_HASH_SIZE 1
00032 
00033 #undef  CGEN_DIS_HASH
00034 #define CGEN_DIS_HASH(buffer, insn) 0
00035 
00036 #define CGEN_VERBOSE_ASSEMBLER_ERRORS
00037 
00038 typedef struct
00039 {
00040   char * name;
00041   int    config_enum;
00042   unsigned cpu_flag;
00043   int    big_endian;
00044   int    vliw_bits;
00045   CGEN_ATTR_VALUE_BITSET_TYPE cop16_isa;
00046   CGEN_ATTR_VALUE_BITSET_TYPE cop32_isa;
00047   CGEN_ATTR_VALUE_BITSET_TYPE cop48_isa;
00048   CGEN_ATTR_VALUE_BITSET_TYPE cop64_isa;
00049   CGEN_ATTR_VALUE_BITSET_TYPE cop_isa;
00050   CGEN_ATTR_VALUE_BITSET_TYPE core_isa;
00051   unsigned int option_mask;
00052 } mep_config_map_struct;
00053 
00054 extern mep_config_map_struct mep_config_map[];
00055 extern int mep_config_index;
00056 
00057 extern void init_mep_all_core_isas_mask (void);
00058 extern void init_mep_all_cop_isas_mask  (void);
00059 extern CGEN_ATTR_VALUE_BITSET_TYPE mep_cop_isa  (void);
00060 
00061 #define MEP_CONFIG     (mep_config_map[mep_config_index].config_enum)
00062 #define MEP_CPU        (mep_config_map[mep_config_index].cpu_flag)
00063 #define MEP_OMASK      (mep_config_map[mep_config_index].option_mask)
00064 #define MEP_VLIW       (mep_config_map[mep_config_index].vliw_bits > 0)
00065 #define MEP_VLIW32     (mep_config_map[mep_config_index].vliw_bits == 32)
00066 #define MEP_VLIW64     (mep_config_map[mep_config_index].vliw_bits == 64)
00067 #define MEP_COP16_ISA  (mep_config_map[mep_config_index].cop16_isa)
00068 #define MEP_COP32_ISA  (mep_config_map[mep_config_index].cop32_isa)
00069 #define MEP_COP48_ISA  (mep_config_map[mep_config_index].cop48_isa)
00070 #define MEP_COP64_ISA  (mep_config_map[mep_config_index].cop64_isa)
00071 #define MEP_COP_ISA    (mep_config_map[mep_config_index].cop_isa)
00072 #define MEP_CORE_ISA   (mep_config_map[mep_config_index].core_isa)
00073 
00074 extern int mep_insn_supported_by_isa (const CGEN_INSN *, CGEN_ATTR_VALUE_BITSET_TYPE *);
00075 
00076 /* A mask for all ISAs executed by the core.  */
00077 #define MEP_ALL_CORE_ISAS_MASK mep_all_core_isas_mask
00078 extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask;
00079 
00080 #define MEP_INSN_CORE_P(insn) ( \
00081   init_mep_all_core_isas_mask (), \
00082   mep_insn_supported_by_isa (insn, & MEP_ALL_CORE_ISAS_MASK) \
00083 )
00084 
00085 /* A mask for all ISAs executed by a VLIW coprocessor.  */
00086 #define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask 
00087 extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask;
00088 
00089 #define MEP_INSN_COP_P(insn) ( \
00090   init_mep_all_cop_isas_mask (), \
00091   mep_insn_supported_by_isa (insn, & MEP_ALL_COP_ISAS_MASK) \
00092 )
00093 
00094 extern int mep_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
00095 
00096 /* -- asm.c */
00097 /* Enum declaration for mep instruction types.  */
00098 typedef enum cgen_insn_type {
00099   MEP_INSN_INVALID, MEP_INSN_SB, MEP_INSN_SH, MEP_INSN_SW
00100  , MEP_INSN_LB, MEP_INSN_LH, MEP_INSN_LW, MEP_INSN_LBU
00101  , MEP_INSN_LHU, MEP_INSN_SW_SP, MEP_INSN_LW_SP, MEP_INSN_SB_TP
00102  , MEP_INSN_SH_TP, MEP_INSN_SW_TP, MEP_INSN_LB_TP, MEP_INSN_LH_TP
00103  , MEP_INSN_LW_TP, MEP_INSN_LBU_TP, MEP_INSN_LHU_TP, MEP_INSN_SB16
00104  , MEP_INSN_SH16, MEP_INSN_SW16, MEP_INSN_LB16, MEP_INSN_LH16
00105  , MEP_INSN_LW16, MEP_INSN_LBU16, MEP_INSN_LHU16, MEP_INSN_SW24
00106  , MEP_INSN_LW24, MEP_INSN_EXTB, MEP_INSN_EXTH, MEP_INSN_EXTUB
00107  , MEP_INSN_EXTUH, MEP_INSN_SSARB, MEP_INSN_MOV, MEP_INSN_MOVI8
00108  , MEP_INSN_MOVI16, MEP_INSN_MOVU24, MEP_INSN_MOVU16, MEP_INSN_MOVH
00109  , MEP_INSN_ADD3, MEP_INSN_ADD, MEP_INSN_ADD3I, MEP_INSN_ADVCK3
00110  , MEP_INSN_SUB, MEP_INSN_SBVCK3, MEP_INSN_NEG, MEP_INSN_SLT3
00111  , MEP_INSN_SLTU3, MEP_INSN_SLT3I, MEP_INSN_SLTU3I, MEP_INSN_SL1AD3
00112  , MEP_INSN_SL2AD3, MEP_INSN_ADD3X, MEP_INSN_SLT3X, MEP_INSN_SLTU3X
00113  , MEP_INSN_OR, MEP_INSN_AND, MEP_INSN_XOR, MEP_INSN_NOR
00114  , MEP_INSN_OR3, MEP_INSN_AND3, MEP_INSN_XOR3, MEP_INSN_SRA
00115  , MEP_INSN_SRL, MEP_INSN_SLL, MEP_INSN_SRAI, MEP_INSN_SRLI
00116  , MEP_INSN_SLLI, MEP_INSN_SLL3, MEP_INSN_FSFT, MEP_INSN_BRA
00117  , MEP_INSN_BEQZ, MEP_INSN_BNEZ, MEP_INSN_BEQI, MEP_INSN_BNEI
00118  , MEP_INSN_BLTI, MEP_INSN_BGEI, MEP_INSN_BEQ, MEP_INSN_BNE
00119  , MEP_INSN_BSR12, MEP_INSN_BSR24, MEP_INSN_JMP, MEP_INSN_JMP24
00120  , MEP_INSN_JSR, MEP_INSN_RET, MEP_INSN_REPEAT, MEP_INSN_EREPEAT
00121  , MEP_INSN_STC_LP, MEP_INSN_STC_HI, MEP_INSN_STC_LO, MEP_INSN_STC
00122  , MEP_INSN_LDC_LP, MEP_INSN_LDC_HI, MEP_INSN_LDC_LO, MEP_INSN_LDC
00123  , MEP_INSN_DI, MEP_INSN_EI, MEP_INSN_RETI, MEP_INSN_HALT
00124  , MEP_INSN_SLEEP, MEP_INSN_SWI, MEP_INSN_BREAK, MEP_INSN_SYNCM
00125  , MEP_INSN_STCB, MEP_INSN_LDCB, MEP_INSN_BSETM, MEP_INSN_BCLRM
00126  , MEP_INSN_BNOTM, MEP_INSN_BTSTM, MEP_INSN_TAS, MEP_INSN_CACHE
00127  , MEP_INSN_MUL, MEP_INSN_MULU, MEP_INSN_MULR, MEP_INSN_MULRU
00128  , MEP_INSN_MADD, MEP_INSN_MADDU, MEP_INSN_MADDR, MEP_INSN_MADDRU
00129  , MEP_INSN_DIV, MEP_INSN_DIVU, MEP_INSN_DRET, MEP_INSN_DBREAK
00130  , MEP_INSN_LDZ, MEP_INSN_ABS, MEP_INSN_AVE, MEP_INSN_MIN
00131  , MEP_INSN_MAX, MEP_INSN_MINU, MEP_INSN_MAXU, MEP_INSN_CLIP
00132  , MEP_INSN_CLIPU, MEP_INSN_SADD, MEP_INSN_SSUB, MEP_INSN_SADDU
00133  , MEP_INSN_SSUBU, MEP_INSN_SWCP, MEP_INSN_LWCP, MEP_INSN_SMCP
00134  , MEP_INSN_LMCP, MEP_INSN_SWCPI, MEP_INSN_LWCPI, MEP_INSN_SMCPI
00135  , MEP_INSN_LMCPI, MEP_INSN_SWCP16, MEP_INSN_LWCP16, MEP_INSN_SMCP16
00136  , MEP_INSN_LMCP16, MEP_INSN_SBCPA, MEP_INSN_LBCPA, MEP_INSN_SHCPA
00137  , MEP_INSN_LHCPA, MEP_INSN_SWCPA, MEP_INSN_LWCPA, MEP_INSN_SMCPA
00138  , MEP_INSN_LMCPA, MEP_INSN_SBCPM0, MEP_INSN_LBCPM0, MEP_INSN_SHCPM0
00139  , MEP_INSN_LHCPM0, MEP_INSN_SWCPM0, MEP_INSN_LWCPM0, MEP_INSN_SMCPM0
00140  , MEP_INSN_LMCPM0, MEP_INSN_SBCPM1, MEP_INSN_LBCPM1, MEP_INSN_SHCPM1
00141  , MEP_INSN_LHCPM1, MEP_INSN_SWCPM1, MEP_INSN_LWCPM1, MEP_INSN_SMCPM1
00142  , MEP_INSN_LMCPM1, MEP_INSN_BCPEQ, MEP_INSN_BCPNE, MEP_INSN_BCPAT
00143  , MEP_INSN_BCPAF, MEP_INSN_SYNCCP, MEP_INSN_JSRV, MEP_INSN_BSRV
00144  , MEP_INSN_SIM_SYSCALL, MEP_INSN_RI_0, MEP_INSN_RI_1, MEP_INSN_RI_2
00145  , MEP_INSN_RI_3, MEP_INSN_RI_4, MEP_INSN_RI_5, MEP_INSN_RI_6
00146  , MEP_INSN_RI_7, MEP_INSN_RI_8, MEP_INSN_RI_9, MEP_INSN_RI_10
00147  , MEP_INSN_RI_11, MEP_INSN_RI_12, MEP_INSN_RI_13, MEP_INSN_RI_14
00148  , MEP_INSN_RI_15, MEP_INSN_RI_17, MEP_INSN_RI_20, MEP_INSN_RI_21
00149  , MEP_INSN_RI_22, MEP_INSN_RI_23, MEP_INSN_RI_24, MEP_INSN_RI_25
00150  , MEP_INSN_RI_26, MEP_INSN_RI_16, MEP_INSN_RI_18, MEP_INSN_RI_19
00151  , MEP_INSN_FADDS, MEP_INSN_FSUBS, MEP_INSN_FMULS, MEP_INSN_FDIVS
00152  , MEP_INSN_FSQRTS, MEP_INSN_FABSS, MEP_INSN_FNEGS, MEP_INSN_FMOVS
00153  , MEP_INSN_FROUNDWS, MEP_INSN_FTRUNCWS, MEP_INSN_FCEILWS, MEP_INSN_FFLOORWS
00154  , MEP_INSN_FCVTWS, MEP_INSN_FCVTSW, MEP_INSN_FCMPFS, MEP_INSN_FCMPUS
00155  , MEP_INSN_FCMPES, MEP_INSN_FCMPUES, MEP_INSN_FCMPLS, MEP_INSN_FCMPULS
00156  , MEP_INSN_FCMPLES, MEP_INSN_FCMPULES, MEP_INSN_FCMPFIS, MEP_INSN_FCMPUIS
00157  , MEP_INSN_FCMPEIS, MEP_INSN_FCMPUEIS, MEP_INSN_FCMPLIS, MEP_INSN_FCMPULIS
00158  , MEP_INSN_FCMPLEIS, MEP_INSN_FCMPULEIS, MEP_INSN_CMOV_FRN_RM, MEP_INSN_CMOV_RM_FRN
00159  , MEP_INSN_CMOVC_CCRN_RM, MEP_INSN_CMOVC_RM_CCRN
00160 } CGEN_INSN_TYPE;
00161 
00162 /* Index of `invalid' insn place holder.  */
00163 #define CGEN_INSN_INVALID MEP_INSN_INVALID
00164 
00165 /* Total number of insns in table.  */
00166 #define MAX_INSNS ((int) MEP_INSN_CMOVC_RM_CCRN + 1)
00167 
00168 /* This struct records data prior to insertion or after extraction.  */
00169 struct cgen_fields
00170 {
00171   int length;
00172   long f_nil;
00173   long f_anyof;
00174   long f_major;
00175   long f_rn;
00176   long f_rn3;
00177   long f_rm;
00178   long f_rl;
00179   long f_sub2;
00180   long f_sub3;
00181   long f_sub4;
00182   long f_ext;
00183   long f_crn;
00184   long f_csrn_hi;
00185   long f_csrn_lo;
00186   long f_csrn;
00187   long f_crnx_hi;
00188   long f_crnx_lo;
00189   long f_crnx;
00190   long f_0;
00191   long f_1;
00192   long f_2;
00193   long f_3;
00194   long f_4;
00195   long f_5;
00196   long f_6;
00197   long f_7;
00198   long f_8;
00199   long f_9;
00200   long f_10;
00201   long f_11;
00202   long f_12;
00203   long f_13;
00204   long f_14;
00205   long f_15;
00206   long f_16;
00207   long f_17;
00208   long f_18;
00209   long f_19;
00210   long f_20;
00211   long f_21;
00212   long f_22;
00213   long f_23;
00214   long f_24;
00215   long f_25;
00216   long f_26;
00217   long f_27;
00218   long f_28;
00219   long f_29;
00220   long f_30;
00221   long f_31;
00222   long f_8s8a2;
00223   long f_12s4a2;
00224   long f_17s16a2;
00225   long f_24s5a2n_hi;
00226   long f_24s5a2n_lo;
00227   long f_24s5a2n;
00228   long f_24u5a2n_hi;
00229   long f_24u5a2n_lo;
00230   long f_24u5a2n;
00231   long f_2u6;
00232   long f_7u9;
00233   long f_7u9a2;
00234   long f_7u9a4;
00235   long f_16s16;
00236   long f_2u10;
00237   long f_3u5;
00238   long f_4u8;
00239   long f_5u8;
00240   long f_5u24;
00241   long f_6s8;
00242   long f_8s8;
00243   long f_16u16;
00244   long f_12u16;
00245   long f_3u29;
00246   long f_8s24;
00247   long f_8s24a2;
00248   long f_8s24a4;
00249   long f_8s24a8;
00250   long f_24u8a4n_hi;
00251   long f_24u8a4n_lo;
00252   long f_24u8a4n;
00253   long f_24u8n_hi;
00254   long f_24u8n_lo;
00255   long f_24u8n;
00256   long f_24u4n_hi;
00257   long f_24u4n_lo;
00258   long f_24u4n;
00259   long f_callnum;
00260   long f_ccrn_hi;
00261   long f_ccrn_lo;
00262   long f_ccrn;
00263   long f_fmax_0_4;
00264   long f_fmax_4_4;
00265   long f_fmax_8_4;
00266   long f_fmax_12_4;
00267   long f_fmax_16_4;
00268   long f_fmax_20_4;
00269   long f_fmax_24_4;
00270   long f_fmax_28_1;
00271   long f_fmax_29_1;
00272   long f_fmax_30_1;
00273   long f_fmax_31_1;
00274   long f_fmax_frd;
00275   long f_fmax_frn;
00276   long f_fmax_frm;
00277   long f_fmax_rm;
00278 };
00279 
00280 #define CGEN_INIT_PARSE(od) \
00281 {\
00282 }
00283 #define CGEN_INIT_INSERT(od) \
00284 {\
00285 }
00286 #define CGEN_INIT_EXTRACT(od) \
00287 {\
00288 }
00289 #define CGEN_INIT_PRINT(od) \
00290 {\
00291 }
00292 
00293 
00294 #endif /* MEP_OPC_H */