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cell-binutils  2.17cvs20070401
mep-opc.c
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00001 /* Instruction opcode table for mep.
00002 
00003 THIS FILE IS MACHINE GENERATED WITH CGEN.
00004 
00005 Copyright 1996-2005 Free Software Foundation, Inc.
00006 
00007 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
00008 
00009 This program is free software; you can redistribute it and/or modify
00010 it under the terms of the GNU General Public License as published by
00011 the Free Software Foundation; either version 2, or (at your option)
00012 any later version.
00013 
00014 This program is distributed in the hope that it will be useful,
00015 but WITHOUT ANY WARRANTY; without even the implied warranty of
00016 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00017 GNU General Public License for more details.
00018 
00019 You should have received a copy of the GNU General Public License along
00020 with this program; if not, write to the Free Software Foundation, Inc.,
00021 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
00022 
00023 */
00024 
00025 #include "sysdep.h"
00026 #include "ansidecl.h"
00027 #include "bfd.h"
00028 #include "symcat.h"
00029 #include "mep-desc.h"
00030 #include "mep-opc.h"
00031 #include "libiberty.h"
00032 
00033 /* -- opc.c */
00034 #include "elf/mep.h"
00035 
00036 /* A mask for all ISAs executed by the core. */
00037 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask = {0, 0};
00038 
00039 void
00040 init_mep_all_core_isas_mask (void)
00041 {
00042   if (mep_all_core_isas_mask.length != 0)
00043     return;
00044   cgen_bitset_init (& mep_all_core_isas_mask, ISA_MAX);
00045   cgen_bitset_set (& mep_all_core_isas_mask, ISA_MEP);
00046   /* begin-all-core-isas */
00047   cgen_bitset_add (& mep_all_core_isas_mask, ISA_EXT_CORE1);
00048   cgen_bitset_add (& mep_all_core_isas_mask, ISA_EXT_CORE2);
00049   /* end-all-core-isas */
00050 }
00051 
00052 CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask = {0, 0};
00053 
00054 void
00055 init_mep_all_cop_isas_mask (void)
00056 {
00057   if (mep_all_cop_isas_mask.length != 0)
00058     return;
00059   cgen_bitset_init (& mep_all_cop_isas_mask, ISA_MAX);
00060   /* begin-all-cop-isas */
00061   cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_16);
00062   cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_32);
00063   cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_48);
00064   cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP2_64);
00065   /* end-all-cop-isas */
00066 }
00067 
00068 int
00069 mep_insn_supported_by_isa (const CGEN_INSN *insn, CGEN_ATTR_VALUE_BITSET_TYPE *isa_mask)
00070 {
00071   CGEN_BITSET insn_isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
00072   return cgen_bitset_intersect_p (& insn_isas, isa_mask);
00073 }
00074 
00075 #define OPTION_MASK \
00076        ( (1 << CGEN_INSN_OPTIONAL_BIT_INSN) \
00077        | (1 << CGEN_INSN_OPTIONAL_MUL_INSN) \
00078        | (1 << CGEN_INSN_OPTIONAL_DIV_INSN) \
00079        | (1 << CGEN_INSN_OPTIONAL_DEBUG_INSN) \
00080        | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN) \
00081        | (1 << CGEN_INSN_OPTIONAL_ABS_INSN) \
00082        | (1 << CGEN_INSN_OPTIONAL_AVE_INSN) \
00083        | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN) \
00084        | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN) \
00085        | (1 << CGEN_INSN_OPTIONAL_SAT_INSN) \
00086        | (1 << CGEN_INSN_OPTIONAL_UCI_INSN) \
00087        | (1 << CGEN_INSN_OPTIONAL_DSP_INSN) \
00088        | (1 << CGEN_INSN_OPTIONAL_CP_INSN) \
00089        | (1 << CGEN_INSN_OPTIONAL_CP64_INSN) )
00090 
00091 
00092 mep_config_map_struct mep_config_map[] =
00093 {
00094   /* config-map-start */
00095   /* Default entry: mep core only, all options enabled. */
00096   { "", 0, EF_MEP_CPU_C2, 1, 0, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x80"}, OPTION_MASK },
00097   { "simple", CONFIG_SIMPLE, EF_MEP_CPU_C2, 1, 0, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\xc0" },
00098          0 },
00099   { "fmax", CONFIG_FMAX, EF_MEP_CPU_C2, 1, 0, { 1, "\x10" }, { 1, "\x8" }, { 1, "\x4" }, { 1, "\x2" }, { 1, "\x1e" }, { 1, "\xa0" },
00100          0
00101        | (1 << CGEN_INSN_OPTIONAL_CP_INSN)
00102        | (1 << CGEN_INSN_OPTIONAL_MUL_INSN)
00103        | (1 << CGEN_INSN_OPTIONAL_DIV_INSN)
00104        | (1 << CGEN_INSN_OPTIONAL_BIT_INSN)
00105        | (1 << CGEN_INSN_OPTIONAL_LDZ_INSN)
00106        | (1 << CGEN_INSN_OPTIONAL_ABS_INSN)
00107        | (1 << CGEN_INSN_OPTIONAL_AVE_INSN)
00108        | (1 << CGEN_INSN_OPTIONAL_MINMAX_INSN)
00109        | (1 << CGEN_INSN_OPTIONAL_CLIP_INSN)
00110        | (1 << CGEN_INSN_OPTIONAL_SAT_INSN) },
00111   /* config-map-end */
00112   { 0, 0, 0, 0, 0, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, 0 }
00113 };
00114 
00115 int mep_config_index = 0;
00116 
00117 static int
00118 check_configured_mach (int machs)
00119 {
00120   /* All base insns are supported.  */
00121   int mach = 1 << MACH_BASE;
00122   switch (MEP_CPU)
00123     {
00124     case EF_MEP_CPU_C2:
00125     case EF_MEP_CPU_C3:
00126       mach |= (1 << MACH_MEP);
00127       break;
00128     case EF_MEP_CPU_H1:
00129       mach |= (1 << MACH_H1);
00130       break;
00131     default:
00132       break;
00133     }
00134   return machs & mach;
00135 }
00136 
00137 int
00138 mep_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
00139 {
00140   int iconfig = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_CONFIG);
00141   int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
00142   CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
00143   int ok1;
00144   int ok2;
00145   int ok3;
00146 
00147   /* If the insn has an option bit set that we don't want,
00148      reject it.  */
00149   if (CGEN_INSN_ATTRS (insn)->bool & OPTION_MASK & ~MEP_OMASK)
00150     return 0;
00151 
00152   /* If attributes are absent, assume no restriction. */
00153   if (machs == 0)
00154     machs = ~0;
00155 
00156   ok1 = ((machs & cd->machs) && cgen_bitset_intersect_p (& isas, cd->isas));
00157   /* If the insn is config-specific, make sure it matches.  */
00158   ok2 =  (iconfig == 0 || iconfig == MEP_CONFIG);
00159   /* Make sure the insn is supported by the configured mach  */
00160   ok3 = check_configured_mach (machs);
00161 
00162   return (ok1 && ok2 && ok3);
00163 }
00164 /* The hash functions are recorded here to help keep assembler code out of
00165    the disassembler and vice versa.  */
00166 
00167 static int asm_hash_insn_p        (const CGEN_INSN *);
00168 static unsigned int asm_hash_insn (const char *);
00169 static int dis_hash_insn_p        (const CGEN_INSN *);
00170 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
00171 
00172 /* Instruction formats.  */
00173 
00174 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00175 #define F(f) & mep_cgen_ifld_table[MEP_##f]
00176 #else
00177 #define F(f) & mep_cgen_ifld_table[MEP_f]
00178 #endif
00179 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
00180   0, 0, 0x0, { { 0 } }
00181 };
00182 
00183 static const CGEN_IFMT ifmt_sb ATTRIBUTE_UNUSED = {
00184   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00185 };
00186 
00187 static const CGEN_IFMT ifmt_sh ATTRIBUTE_UNUSED = {
00188   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00189 };
00190 
00191 static const CGEN_IFMT ifmt_sw ATTRIBUTE_UNUSED = {
00192   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00193 };
00194 
00195 static const CGEN_IFMT ifmt_lbu ATTRIBUTE_UNUSED = {
00196   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00197 };
00198 
00199 static const CGEN_IFMT ifmt_lhu ATTRIBUTE_UNUSED = {
00200   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00201 };
00202 
00203 static const CGEN_IFMT ifmt_sw_sp ATTRIBUTE_UNUSED = {
00204   16, 16, 0xf083, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
00205 };
00206 
00207 static const CGEN_IFMT ifmt_sb_tp ATTRIBUTE_UNUSED = {
00208   16, 16, 0xf880, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9) }, { 0 } }
00209 };
00210 
00211 static const CGEN_IFMT ifmt_sh_tp ATTRIBUTE_UNUSED = {
00212   16, 16, 0xf881, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A2) }, { F (F_15) }, { 0 } }
00213 };
00214 
00215 static const CGEN_IFMT ifmt_sw_tp ATTRIBUTE_UNUSED = {
00216   16, 16, 0xf883, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
00217 };
00218 
00219 static const CGEN_IFMT ifmt_lbu_tp ATTRIBUTE_UNUSED = {
00220   16, 16, 0xf880, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9) }, { 0 } }
00221 };
00222 
00223 static const CGEN_IFMT ifmt_lhu_tp ATTRIBUTE_UNUSED = {
00224   16, 16, 0xf881, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_8) }, { F (F_7U9A2) }, { F (F_15) }, { 0 } }
00225 };
00226 
00227 static const CGEN_IFMT ifmt_sb16 ATTRIBUTE_UNUSED = {
00228   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00229 };
00230 
00231 static const CGEN_IFMT ifmt_sh16 ATTRIBUTE_UNUSED = {
00232   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00233 };
00234 
00235 static const CGEN_IFMT ifmt_sw16 ATTRIBUTE_UNUSED = {
00236   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00237 };
00238 
00239 static const CGEN_IFMT ifmt_lbu16 ATTRIBUTE_UNUSED = {
00240   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00241 };
00242 
00243 static const CGEN_IFMT ifmt_lhu16 ATTRIBUTE_UNUSED = {
00244   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00245 };
00246 
00247 static const CGEN_IFMT ifmt_sw24 ATTRIBUTE_UNUSED = {
00248   32, 32, 0xf0030000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_24U8A4N) }, { F (F_SUB2) }, { 0 } }
00249 };
00250 
00251 static const CGEN_IFMT ifmt_extb ATTRIBUTE_UNUSED = {
00252   16, 16, 0xf0ff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00253 };
00254 
00255 static const CGEN_IFMT ifmt_ssarb ATTRIBUTE_UNUSED = {
00256   16, 16, 0xfc0f, { { F (F_MAJOR) }, { F (F_4) }, { F (F_5) }, { F (F_2U6) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00257 };
00258 
00259 static const CGEN_IFMT ifmt_mov ATTRIBUTE_UNUSED = {
00260   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00261 };
00262 
00263 static const CGEN_IFMT ifmt_movi8 ATTRIBUTE_UNUSED = {
00264   16, 16, 0xf000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8S8) }, { 0 } }
00265 };
00266 
00267 static const CGEN_IFMT ifmt_movi16 ATTRIBUTE_UNUSED = {
00268   32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00269 };
00270 
00271 static const CGEN_IFMT ifmt_movu24 ATTRIBUTE_UNUSED = {
00272   32, 32, 0xf8000000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_RN3) }, { F (F_24U8N) }, { 0 } }
00273 };
00274 
00275 static const CGEN_IFMT ifmt_movu16 ATTRIBUTE_UNUSED = {
00276   32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
00277 };
00278 
00279 static const CGEN_IFMT ifmt_add3 ATTRIBUTE_UNUSED = {
00280   16, 16, 0xf000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_RL) }, { 0 } }
00281 };
00282 
00283 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
00284   16, 16, 0xf003, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_6S8) }, { F (F_SUB2) }, { 0 } }
00285 };
00286 
00287 static const CGEN_IFMT ifmt_add3i ATTRIBUTE_UNUSED = {
00288   16, 16, 0xf083, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_7U9A4) }, { F (F_SUB2) }, { 0 } }
00289 };
00290 
00291 static const CGEN_IFMT ifmt_slt3i ATTRIBUTE_UNUSED = {
00292   16, 16, 0xf007, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_5U8) }, { F (F_SUB3) }, { 0 } }
00293 };
00294 
00295 static const CGEN_IFMT ifmt_add3x ATTRIBUTE_UNUSED = {
00296   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00297 };
00298 
00299 static const CGEN_IFMT ifmt_sltu3x ATTRIBUTE_UNUSED = {
00300   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
00301 };
00302 
00303 static const CGEN_IFMT ifmt_bra ATTRIBUTE_UNUSED = {
00304   16, 16, 0xf001, { { F (F_MAJOR) }, { F (F_12S4A2) }, { F (F_15) }, { 0 } }
00305 };
00306 
00307 static const CGEN_IFMT ifmt_beqz ATTRIBUTE_UNUSED = {
00308   16, 16, 0xf001, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8S8A2) }, { F (F_15) }, { 0 } }
00309 };
00310 
00311 static const CGEN_IFMT ifmt_beqi ATTRIBUTE_UNUSED = {
00312   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_4U8) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
00313 };
00314 
00315 static const CGEN_IFMT ifmt_beq ATTRIBUTE_UNUSED = {
00316   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
00317 };
00318 
00319 static const CGEN_IFMT ifmt_bsr24 ATTRIBUTE_UNUSED = {
00320   32, 32, 0xf80f0000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_24S5A2N) }, { F (F_SUB4) }, { 0 } }
00321 };
00322 
00323 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
00324   16, 16, 0xff0f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00325 };
00326 
00327 static const CGEN_IFMT ifmt_jmp24 ATTRIBUTE_UNUSED = {
00328   32, 32, 0xf80f0000, { { F (F_MAJOR) }, { F (F_4) }, { F (F_24U5A2N) }, { F (F_SUB4) }, { 0 } }
00329 };
00330 
00331 static const CGEN_IFMT ifmt_ret ATTRIBUTE_UNUSED = {
00332   16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00333 };
00334 
00335 static const CGEN_IFMT ifmt_repeat ATTRIBUTE_UNUSED = {
00336   32, 32, 0xf0ff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
00337 };
00338 
00339 static const CGEN_IFMT ifmt_erepeat ATTRIBUTE_UNUSED = {
00340   32, 32, 0xffff0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
00341 };
00342 
00343 static const CGEN_IFMT ifmt_stc_lp ATTRIBUTE_UNUSED = {
00344   16, 16, 0xf0ff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_CSRN_LO) }, { F (F_12) }, { F (F_13) }, { F (F_14) }, { F (F_CSRN_HI) }, { 0 } }
00345 };
00346 
00347 static const CGEN_IFMT ifmt_stc ATTRIBUTE_UNUSED = {
00348   16, 16, 0xf00e, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_CSRN) }, { F (F_12) }, { F (F_13) }, { F (F_14) }, { 0 } }
00349 };
00350 
00351 static const CGEN_IFMT ifmt_swi ATTRIBUTE_UNUSED = {
00352   16, 16, 0xffcf, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_8) }, { F (F_9) }, { F (F_2U10) }, { F (F_SUB4) }, { 0 } }
00353 };
00354 
00355 static const CGEN_IFMT ifmt_bsetm ATTRIBUTE_UNUSED = {
00356   16, 16, 0xf80f, { { F (F_MAJOR) }, { F (F_4) }, { F (F_3U5) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00357 };
00358 
00359 static const CGEN_IFMT ifmt_tas ATTRIBUTE_UNUSED = {
00360   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00361 };
00362 
00363 static const CGEN_IFMT ifmt_cache ATTRIBUTE_UNUSED = {
00364   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00365 };
00366 
00367 static const CGEN_IFMT ifmt_madd ATTRIBUTE_UNUSED = {
00368   32, 32, 0xf00fffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } }
00369 };
00370 
00371 static const CGEN_IFMT ifmt_clip ATTRIBUTE_UNUSED = {
00372   32, 32, 0xf0ffff07, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_5U24) }, { F (F_29) }, { F (F_30) }, { F (F_31) }, { 0 } }
00373 };
00374 
00375 static const CGEN_IFMT ifmt_swcp ATTRIBUTE_UNUSED = {
00376   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00377 };
00378 
00379 static const CGEN_IFMT ifmt_smcp ATTRIBUTE_UNUSED = {
00380   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
00381 };
00382 
00383 static const CGEN_IFMT ifmt_swcp16 ATTRIBUTE_UNUSED = {
00384   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00385 };
00386 
00387 static const CGEN_IFMT ifmt_smcp16 ATTRIBUTE_UNUSED = {
00388   32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16S16) }, { 0 } }
00389 };
00390 
00391 static const CGEN_IFMT ifmt_sbcpa ATTRIBUTE_UNUSED = {
00392   32, 32, 0xf00fff00, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24) }, { 0 } }
00393 };
00394 
00395 static const CGEN_IFMT ifmt_shcpa ATTRIBUTE_UNUSED = {
00396   32, 32, 0xf00fff01, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A2) }, { F (F_31) }, { 0 } }
00397 };
00398 
00399 static const CGEN_IFMT ifmt_swcpa ATTRIBUTE_UNUSED = {
00400   32, 32, 0xf00fff03, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A4) }, { F (F_30) }, { F (F_31) }, { 0 } }
00401 };
00402 
00403 static const CGEN_IFMT ifmt_smcpa ATTRIBUTE_UNUSED = {
00404   32, 32, 0xf00fff07, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_EXT) }, { F (F_8S24A8) }, { F (F_29) }, { F (F_30) }, { F (F_31) }, { 0 } }
00405 };
00406 
00407 static const CGEN_IFMT ifmt_bcpeq ATTRIBUTE_UNUSED = {
00408   32, 32, 0xff0f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_17S16A2) }, { 0 } }
00409 };
00410 
00411 static const CGEN_IFMT ifmt_sim_syscall ATTRIBUTE_UNUSED = {
00412   16, 16, 0xf8ef, { { F (F_MAJOR) }, { F (F_4) }, { F (F_CALLNUM) }, { F (F_8) }, { F (F_9) }, { F (F_10) }, { F (F_SUB4) }, { 0 } }
00413 };
00414 
00415 static const CGEN_IFMT ifmt_fadds ATTRIBUTE_UNUSED = {
00416   32, 32, 0xf0fff001, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_FRM) }, { F (F_FMAX_31_1) }, { 0 } }
00417 };
00418 
00419 static const CGEN_IFMT ifmt_fsqrts ATTRIBUTE_UNUSED = {
00420   32, 32, 0xf0fff0f3, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_24_4) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
00421 };
00422 
00423 static const CGEN_IFMT ifmt_froundws ATTRIBUTE_UNUSED = {
00424   32, 32, 0xf0fff0f3, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_24_4) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
00425 };
00426 
00427 static const CGEN_IFMT ifmt_fcvtsw ATTRIBUTE_UNUSED = {
00428   32, 32, 0xf0fff0f3, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_24_4) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
00429 };
00430 
00431 static const CGEN_IFMT ifmt_fcmpfs ATTRIBUTE_UNUSED = {
00432   32, 32, 0xfffff009, { { F (F_FMAX_0_4) }, { F (F_FMAX_4_4) }, { F (F_FMAX_8_4) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_FRN) }, { F (F_FMAX_FRM) }, { F (F_FMAX_28_1) }, { F (F_FMAX_31_1) }, { 0 } }
00433 };
00434 
00435 static const CGEN_IFMT ifmt_cmov_frn_rm ATTRIBUTE_UNUSED = {
00436   32, 32, 0xf00ffff7, { { F (F_FMAX_0_4) }, { F (F_FMAX_FRD) }, { F (F_FMAX_RM) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_20_4) }, { F (F_FMAX_24_4) }, { F (F_FMAX_29_1) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
00437 };
00438 
00439 static const CGEN_IFMT ifmt_cmovc_ccrn_rm ATTRIBUTE_UNUSED = {
00440   32, 32, 0xf00fffff, { { F (F_FMAX_0_4) }, { F (F_FMAX_4_4) }, { F (F_FMAX_RM) }, { F (F_FMAX_12_4) }, { F (F_FMAX_16_4) }, { F (F_FMAX_20_4) }, { F (F_FMAX_24_4) }, { F (F_FMAX_28_1) }, { F (F_FMAX_29_1) }, { F (F_FMAX_30_1) }, { F (F_FMAX_31_1) }, { 0 } }
00441 };
00442 
00443 #undef F
00444 
00445 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00446 #define A(a) (1 << CGEN_INSN_##a)
00447 #else
00448 #define A(a) (1 << CGEN_INSN_a)
00449 #endif
00450 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00451 #define OPERAND(op) MEP_OPERAND_##op
00452 #else
00453 #define OPERAND(op) MEP_OPERAND_op
00454 #endif
00455 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
00456 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
00457 
00458 /* The instruction table.  */
00459 
00460 static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] =
00461 {
00462   /* Special null first entry.
00463      A `num' value of zero is thus invalid.
00464      Also, the special `invalid' insn resides here.  */
00465   { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
00466 /* sb $rnc,($rma) */
00467   {
00468     { 0, 0, 0, 0 },
00469     { { MNEM, ' ', OP (RNC), ',', '(', OP (RMA), ')', 0 } },
00470     & ifmt_sb, { 0x8 }
00471   },
00472 /* sh $rns,($rma) */
00473   {
00474     { 0, 0, 0, 0 },
00475     { { MNEM, ' ', OP (RNS), ',', '(', OP (RMA), ')', 0 } },
00476     & ifmt_sh, { 0x9 }
00477   },
00478 /* sw $rnl,($rma) */
00479   {
00480     { 0, 0, 0, 0 },
00481     { { MNEM, ' ', OP (RNL), ',', '(', OP (RMA), ')', 0 } },
00482     & ifmt_sw, { 0xa }
00483   },
00484 /* lb $rnc,($rma) */
00485   {
00486     { 0, 0, 0, 0 },
00487     { { MNEM, ' ', OP (RNC), ',', '(', OP (RMA), ')', 0 } },
00488     & ifmt_sb, { 0xc }
00489   },
00490 /* lh $rns,($rma) */
00491   {
00492     { 0, 0, 0, 0 },
00493     { { MNEM, ' ', OP (RNS), ',', '(', OP (RMA), ')', 0 } },
00494     & ifmt_sh, { 0xd }
00495   },
00496 /* lw $rnl,($rma) */
00497   {
00498     { 0, 0, 0, 0 },
00499     { { MNEM, ' ', OP (RNL), ',', '(', OP (RMA), ')', 0 } },
00500     & ifmt_sw, { 0xe }
00501   },
00502 /* lbu $rnuc,($rma) */
00503   {
00504     { 0, 0, 0, 0 },
00505     { { MNEM, ' ', OP (RNUC), ',', '(', OP (RMA), ')', 0 } },
00506     & ifmt_lbu, { 0xb }
00507   },
00508 /* lhu $rnus,($rma) */
00509   {
00510     { 0, 0, 0, 0 },
00511     { { MNEM, ' ', OP (RNUS), ',', '(', OP (RMA), ')', 0 } },
00512     & ifmt_lhu, { 0xf }
00513   },
00514 /* sw $rnl,$udisp7a4($spr) */
00515   {
00516     { 0, 0, 0, 0 },
00517     { { MNEM, ' ', OP (RNL), ',', OP (UDISP7A4), '(', OP (SPR), ')', 0 } },
00518     & ifmt_sw_sp, { 0x4002 }
00519   },
00520 /* lw $rnl,$udisp7a4($spr) */
00521   {
00522     { 0, 0, 0, 0 },
00523     { { MNEM, ' ', OP (RNL), ',', OP (UDISP7A4), '(', OP (SPR), ')', 0 } },
00524     & ifmt_sw_sp, { 0x4003 }
00525   },
00526 /* sb $rn3c,$udisp7($tpr) */
00527   {
00528     { 0, 0, 0, 0 },
00529     { { MNEM, ' ', OP (RN3C), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
00530     & ifmt_sb_tp, { 0x8000 }
00531   },
00532 /* sh $rn3s,$udisp7a2($tpr) */
00533   {
00534     { 0, 0, 0, 0 },
00535     { { MNEM, ' ', OP (RN3S), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
00536     & ifmt_sh_tp, { 0x8080 }
00537   },
00538 /* sw $rn3l,$udisp7a4($tpr) */
00539   {
00540     { 0, 0, 0, 0 },
00541     { { MNEM, ' ', OP (RN3L), ',', OP (UDISP7A4), '(', OP (TPR), ')', 0 } },
00542     & ifmt_sw_tp, { 0x4082 }
00543   },
00544 /* lb $rn3c,$udisp7($tpr) */
00545   {
00546     { 0, 0, 0, 0 },
00547     { { MNEM, ' ', OP (RN3C), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
00548     & ifmt_sb_tp, { 0x8800 }
00549   },
00550 /* lh $rn3s,$udisp7a2($tpr) */
00551   {
00552     { 0, 0, 0, 0 },
00553     { { MNEM, ' ', OP (RN3S), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
00554     & ifmt_sh_tp, { 0x8880 }
00555   },
00556 /* lw $rn3l,$udisp7a4($tpr) */
00557   {
00558     { 0, 0, 0, 0 },
00559     { { MNEM, ' ', OP (RN3L), ',', OP (UDISP7A4), '(', OP (TPR), ')', 0 } },
00560     & ifmt_sw_tp, { 0x4083 }
00561   },
00562 /* lbu $rn3uc,$udisp7($tpr) */
00563   {
00564     { 0, 0, 0, 0 },
00565     { { MNEM, ' ', OP (RN3UC), ',', OP (UDISP7), '(', OP (TPR), ')', 0 } },
00566     & ifmt_lbu_tp, { 0x4880 }
00567   },
00568 /* lhu $rn3us,$udisp7a2($tpr) */
00569   {
00570     { 0, 0, 0, 0 },
00571     { { MNEM, ' ', OP (RN3US), ',', OP (UDISP7A2), '(', OP (TPR), ')', 0 } },
00572     & ifmt_lhu_tp, { 0x8881 }
00573   },
00574 /* sb $rnc,$sdisp16($rma) */
00575   {
00576     { 0, 0, 0, 0 },
00577     { { MNEM, ' ', OP (RNC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00578     & ifmt_sb16, { 0xc0080000 }
00579   },
00580 /* sh $rns,$sdisp16($rma) */
00581   {
00582     { 0, 0, 0, 0 },
00583     { { MNEM, ' ', OP (RNS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00584     & ifmt_sh16, { 0xc0090000 }
00585   },
00586 /* sw $rnl,$sdisp16($rma) */
00587   {
00588     { 0, 0, 0, 0 },
00589     { { MNEM, ' ', OP (RNL), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00590     & ifmt_sw16, { 0xc00a0000 }
00591   },
00592 /* lb $rnc,$sdisp16($rma) */
00593   {
00594     { 0, 0, 0, 0 },
00595     { { MNEM, ' ', OP (RNC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00596     & ifmt_sb16, { 0xc00c0000 }
00597   },
00598 /* lh $rns,$sdisp16($rma) */
00599   {
00600     { 0, 0, 0, 0 },
00601     { { MNEM, ' ', OP (RNS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00602     & ifmt_sh16, { 0xc00d0000 }
00603   },
00604 /* lw $rnl,$sdisp16($rma) */
00605   {
00606     { 0, 0, 0, 0 },
00607     { { MNEM, ' ', OP (RNL), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00608     & ifmt_sw16, { 0xc00e0000 }
00609   },
00610 /* lbu $rnuc,$sdisp16($rma) */
00611   {
00612     { 0, 0, 0, 0 },
00613     { { MNEM, ' ', OP (RNUC), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00614     & ifmt_lbu16, { 0xc00b0000 }
00615   },
00616 /* lhu $rnus,$sdisp16($rma) */
00617   {
00618     { 0, 0, 0, 0 },
00619     { { MNEM, ' ', OP (RNUS), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
00620     & ifmt_lhu16, { 0xc00f0000 }
00621   },
00622 /* sw $rnl,($addr24a4) */
00623   {
00624     { 0, 0, 0, 0 },
00625     { { MNEM, ' ', OP (RNL), ',', '(', OP (ADDR24A4), ')', 0 } },
00626     & ifmt_sw24, { 0xe0020000 }
00627   },
00628 /* lw $rnl,($addr24a4) */
00629   {
00630     { 0, 0, 0, 0 },
00631     { { MNEM, ' ', OP (RNL), ',', '(', OP (ADDR24A4), ')', 0 } },
00632     & ifmt_sw24, { 0xe0030000 }
00633   },
00634 /* extb $rn */
00635   {
00636     { 0, 0, 0, 0 },
00637     { { MNEM, ' ', OP (RN), 0 } },
00638     & ifmt_extb, { 0x100d }
00639   },
00640 /* exth $rn */
00641   {
00642     { 0, 0, 0, 0 },
00643     { { MNEM, ' ', OP (RN), 0 } },
00644     & ifmt_extb, { 0x102d }
00645   },
00646 /* extub $rn */
00647   {
00648     { 0, 0, 0, 0 },
00649     { { MNEM, ' ', OP (RN), 0 } },
00650     & ifmt_extb, { 0x108d }
00651   },
00652 /* extuh $rn */
00653   {
00654     { 0, 0, 0, 0 },
00655     { { MNEM, ' ', OP (RN), 0 } },
00656     & ifmt_extb, { 0x10ad }
00657   },
00658 /* ssarb $udisp2($rm) */
00659   {
00660     { 0, 0, 0, 0 },
00661     { { MNEM, ' ', OP (UDISP2), '(', OP (RM), ')', 0 } },
00662     & ifmt_ssarb, { 0x100c }
00663   },
00664 /* mov $rn,$rm */
00665   {
00666     { 0, 0, 0, 0 },
00667     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00668     & ifmt_mov, { 0x0 }
00669   },
00670 /* mov $rn,$simm8 */
00671   {
00672     { 0, 0, 0, 0 },
00673     { { MNEM, ' ', OP (RN), ',', OP (SIMM8), 0 } },
00674     & ifmt_movi8, { 0x5000 }
00675   },
00676 /* mov $rn,$simm16 */
00677   {
00678     { 0, 0, 0, 0 },
00679     { { MNEM, ' ', OP (RN), ',', OP (SIMM16), 0 } },
00680     & ifmt_movi16, { 0xc0010000 }
00681   },
00682 /* movu $rn3,$uimm24 */
00683   {
00684     { 0, 0, 0, 0 },
00685     { { MNEM, ' ', OP (RN3), ',', OP (UIMM24), 0 } },
00686     & ifmt_movu24, { 0xd0000000 }
00687   },
00688 /* movu $rn,$uimm16 */
00689   {
00690     { 0, 0, 0, 0 },
00691     { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
00692     & ifmt_movu16, { 0xc0110000 }
00693   },
00694 /* movh $rn,$uimm16 */
00695   {
00696     { 0, 0, 0, 0 },
00697     { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
00698     & ifmt_movu16, { 0xc0210000 }
00699   },
00700 /* add3 $rl,$rn,$rm */
00701   {
00702     { 0, 0, 0, 0 },
00703     { { MNEM, ' ', OP (RL), ',', OP (RN), ',', OP (RM), 0 } },
00704     & ifmt_add3, { 0x9000 }
00705   },
00706 /* add $rn,$simm6 */
00707   {
00708     { 0, 0, 0, 0 },
00709     { { MNEM, ' ', OP (RN), ',', OP (SIMM6), 0 } },
00710     & ifmt_add, { 0x6000 }
00711   },
00712 /* add3 $rn,$spr,$uimm7a4 */
00713   {
00714     { 0, 0, 0, 0 },
00715     { { MNEM, ' ', OP (RN), ',', OP (SPR), ',', OP (UIMM7A4), 0 } },
00716     & ifmt_add3i, { 0x4000 }
00717   },
00718 /* advck3 \$0,$rn,$rm */
00719   {
00720     { 0, 0, 0, 0 },
00721     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
00722     & ifmt_mov, { 0x7 }
00723   },
00724 /* sub $rn,$rm */
00725   {
00726     { 0, 0, 0, 0 },
00727     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00728     & ifmt_mov, { 0x4 }
00729   },
00730 /* sbvck3 \$0,$rn,$rm */
00731   {
00732     { 0, 0, 0, 0 },
00733     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
00734     & ifmt_mov, { 0x5 }
00735   },
00736 /* neg $rn,$rm */
00737   {
00738     { 0, 0, 0, 0 },
00739     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00740     & ifmt_mov, { 0x1 }
00741   },
00742 /* slt3 \$0,$rn,$rm */
00743   {
00744     { 0, 0, 0, 0 },
00745     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
00746     & ifmt_mov, { 0x2 }
00747   },
00748 /* sltu3 \$0,$rn,$rm */
00749   {
00750     { 0, 0, 0, 0 },
00751     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
00752     & ifmt_mov, { 0x3 }
00753   },
00754 /* slt3 \$0,$rn,$uimm5 */
00755   {
00756     { 0, 0, 0, 0 },
00757     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
00758     & ifmt_slt3i, { 0x6001 }
00759   },
00760 /* sltu3 \$0,$rn,$uimm5 */
00761   {
00762     { 0, 0, 0, 0 },
00763     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
00764     & ifmt_slt3i, { 0x6005 }
00765   },
00766 /* sl1ad3 \$0,$rn,$rm */
00767   {
00768     { 0, 0, 0, 0 },
00769     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
00770     & ifmt_mov, { 0x2006 }
00771   },
00772 /* sl2ad3 \$0,$rn,$rm */
00773   {
00774     { 0, 0, 0, 0 },
00775     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (RM), 0 } },
00776     & ifmt_mov, { 0x2007 }
00777   },
00778 /* add3 $rn,$rm,$simm16 */
00779   {
00780     { 0, 0, 0, 0 },
00781     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (SIMM16), 0 } },
00782     & ifmt_add3x, { 0xc0000000 }
00783   },
00784 /* slt3 $rn,$rm,$simm16 */
00785   {
00786     { 0, 0, 0, 0 },
00787     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (SIMM16), 0 } },
00788     & ifmt_add3x, { 0xc0020000 }
00789   },
00790 /* sltu3 $rn,$rm,$uimm16 */
00791   {
00792     { 0, 0, 0, 0 },
00793     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
00794     & ifmt_sltu3x, { 0xc0030000 }
00795   },
00796 /* or $rn,$rm */
00797   {
00798     { 0, 0, 0, 0 },
00799     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00800     & ifmt_mov, { 0x1000 }
00801   },
00802 /* and $rn,$rm */
00803   {
00804     { 0, 0, 0, 0 },
00805     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00806     & ifmt_mov, { 0x1001 }
00807   },
00808 /* xor $rn,$rm */
00809   {
00810     { 0, 0, 0, 0 },
00811     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00812     & ifmt_mov, { 0x1002 }
00813   },
00814 /* nor $rn,$rm */
00815   {
00816     { 0, 0, 0, 0 },
00817     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00818     & ifmt_mov, { 0x1003 }
00819   },
00820 /* or3 $rn,$rm,$uimm16 */
00821   {
00822     { 0, 0, 0, 0 },
00823     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
00824     & ifmt_sltu3x, { 0xc0040000 }
00825   },
00826 /* and3 $rn,$rm,$uimm16 */
00827   {
00828     { 0, 0, 0, 0 },
00829     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
00830     & ifmt_sltu3x, { 0xc0050000 }
00831   },
00832 /* xor3 $rn,$rm,$uimm16 */
00833   {
00834     { 0, 0, 0, 0 },
00835     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } },
00836     & ifmt_sltu3x, { 0xc0060000 }
00837   },
00838 /* sra $rn,$rm */
00839   {
00840     { 0, 0, 0, 0 },
00841     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00842     & ifmt_mov, { 0x200d }
00843   },
00844 /* srl $rn,$rm */
00845   {
00846     { 0, 0, 0, 0 },
00847     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00848     & ifmt_mov, { 0x200c }
00849   },
00850 /* sll $rn,$rm */
00851   {
00852     { 0, 0, 0, 0 },
00853     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00854     & ifmt_mov, { 0x200e }
00855   },
00856 /* sra $rn,$uimm5 */
00857   {
00858     { 0, 0, 0, 0 },
00859     { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
00860     & ifmt_slt3i, { 0x6003 }
00861   },
00862 /* srl $rn,$uimm5 */
00863   {
00864     { 0, 0, 0, 0 },
00865     { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
00866     & ifmt_slt3i, { 0x6002 }
00867   },
00868 /* sll $rn,$uimm5 */
00869   {
00870     { 0, 0, 0, 0 },
00871     { { MNEM, ' ', OP (RN), ',', OP (UIMM5), 0 } },
00872     & ifmt_slt3i, { 0x6006 }
00873   },
00874 /* sll3 \$0,$rn,$uimm5 */
00875   {
00876     { 0, 0, 0, 0 },
00877     { { MNEM, ' ', '$', '0', ',', OP (RN), ',', OP (UIMM5), 0 } },
00878     & ifmt_slt3i, { 0x6007 }
00879   },
00880 /* fsft $rn,$rm */
00881   {
00882     { 0, 0, 0, 0 },
00883     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
00884     & ifmt_mov, { 0x200f }
00885   },
00886 /* bra $pcrel12a2 */
00887   {
00888     { 0, 0, 0, 0 },
00889     { { MNEM, ' ', OP (PCREL12A2), 0 } },
00890     & ifmt_bra, { 0xb000 }
00891   },
00892 /* beqz $rn,$pcrel8a2 */
00893   {
00894     { 0, 0, 0, 0 },
00895     { { MNEM, ' ', OP (RN), ',', OP (PCREL8A2), 0 } },
00896     & ifmt_beqz, { 0xa000 }
00897   },
00898 /* bnez $rn,$pcrel8a2 */
00899   {
00900     { 0, 0, 0, 0 },
00901     { { MNEM, ' ', OP (RN), ',', OP (PCREL8A2), 0 } },
00902     & ifmt_beqz, { 0xa001 }
00903   },
00904 /* beqi $rn,$uimm4,$pcrel17a2 */
00905   {
00906     { 0, 0, 0, 0 },
00907     { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
00908     & ifmt_beqi, { 0xe0000000 }
00909   },
00910 /* bnei $rn,$uimm4,$pcrel17a2 */
00911   {
00912     { 0, 0, 0, 0 },
00913     { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
00914     & ifmt_beqi, { 0xe0040000 }
00915   },
00916 /* blti $rn,$uimm4,$pcrel17a2 */
00917   {
00918     { 0, 0, 0, 0 },
00919     { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
00920     & ifmt_beqi, { 0xe00c0000 }
00921   },
00922 /* bgei $rn,$uimm4,$pcrel17a2 */
00923   {
00924     { 0, 0, 0, 0 },
00925     { { MNEM, ' ', OP (RN), ',', OP (UIMM4), ',', OP (PCREL17A2), 0 } },
00926     & ifmt_beqi, { 0xe0080000 }
00927   },
00928 /* beq $rn,$rm,$pcrel17a2 */
00929   {
00930     { 0, 0, 0, 0 },
00931     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (PCREL17A2), 0 } },
00932     & ifmt_beq, { 0xe0010000 }
00933   },
00934 /* bne $rn,$rm,$pcrel17a2 */
00935   {
00936     { 0, 0, 0, 0 },
00937     { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (PCREL17A2), 0 } },
00938     & ifmt_beq, { 0xe0050000 }
00939   },
00940 /* bsr $pcrel12a2 */
00941   {
00942     { 0, 0, 0, 0 },
00943     { { MNEM, ' ', OP (PCREL12A2), 0 } },
00944     & ifmt_bra, { 0xb001 }
00945   },
00946 /* bsr $pcrel24a2 */
00947   {
00948     { 0, 0, 0, 0 },
00949     { { MNEM, ' ', OP (PCREL24A2), 0 } },
00950     & ifmt_bsr24, { 0xd8090000 }
00951   },
00952 /* jmp $rm */
00953   {
00954     { 0, 0, 0, 0 },
00955     { { MNEM, ' ', OP (RM), 0 } },
00956     & ifmt_jmp, { 0x100e }
00957   },
00958 /* jmp $pcabs24a2 */
00959   {
00960     { 0, 0, 0, 0 },
00961     { { MNEM, ' ', OP (PCABS24A2), 0 } },
00962     & ifmt_jmp24, { 0xd8080000 }
00963   },
00964 /* jsr $rm */
00965   {
00966     { 0, 0, 0, 0 },
00967     { { MNEM, ' ', OP (RM), 0 } },
00968     & ifmt_jmp, { 0x100f }
00969   },
00970 /* ret */
00971   {
00972     { 0, 0, 0, 0 },
00973     { { MNEM, 0 } },
00974     & ifmt_ret, { 0x7002 }
00975   },
00976 /* repeat $rn,$pcrel17a2 */
00977   {
00978     { 0, 0, 0, 0 },
00979     { { MNEM, ' ', OP (RN), ',', OP (PCREL17A2), 0 } },
00980     & ifmt_repeat, { 0xe0090000 }
00981   },
00982 /* erepeat $pcrel17a2 */
00983   {
00984     { 0, 0, 0, 0 },
00985     { { MNEM, ' ', OP (PCREL17A2), 0 } },
00986     & ifmt_erepeat, { 0xe0190000 }
00987   },
00988 /* stc $rn,\$lp */
00989   {
00990     { 0, 0, 0, 0 },
00991     { { MNEM, ' ', OP (RN), ',', '$', 'l', 'p', 0 } },
00992     & ifmt_stc_lp, { 0x7018 }
00993   },
00994 /* stc $rn,\$hi */
00995   {
00996     { 0, 0, 0, 0 },
00997     { { MNEM, ' ', OP (RN), ',', '$', 'h', 'i', 0 } },
00998     & ifmt_stc_lp, { 0x7078 }
00999   },
01000 /* stc $rn,\$lo */
01001   {
01002     { 0, 0, 0, 0 },
01003     { { MNEM, ' ', OP (RN), ',', '$', 'l', 'o', 0 } },
01004     & ifmt_stc_lp, { 0x7088 }
01005   },
01006 /* stc $rn,$csrn */
01007   {
01008     { 0, 0, 0, 0 },
01009     { { MNEM, ' ', OP (RN), ',', OP (CSRN), 0 } },
01010     & ifmt_stc, { 0x7008 }
01011   },
01012 /* ldc $rn,\$lp */
01013   {
01014     { 0, 0, 0, 0 },
01015     { { MNEM, ' ', OP (RN), ',', '$', 'l', 'p', 0 } },
01016     & ifmt_stc_lp, { 0x701a }
01017   },
01018 /* ldc $rn,\$hi */
01019   {
01020     { 0, 0, 0, 0 },
01021     { { MNEM, ' ', OP (RN), ',', '$', 'h', 'i', 0 } },
01022     & ifmt_stc_lp, { 0x707a }
01023   },
01024 /* ldc $rn,\$lo */
01025   {
01026     { 0, 0, 0, 0 },
01027     { { MNEM, ' ', OP (RN), ',', '$', 'l', 'o', 0 } },
01028     & ifmt_stc_lp, { 0x708a }
01029   },
01030 /* ldc $rn,$csrn */
01031   {
01032     { 0, 0, 0, 0 },
01033     { { MNEM, ' ', OP (RN), ',', OP (CSRN), 0 } },
01034     & ifmt_stc, { 0x700a }
01035   },
01036 /* di */
01037   {
01038     { 0, 0, 0, 0 },
01039     { { MNEM, 0 } },
01040     & ifmt_ret, { 0x7000 }
01041   },
01042 /* ei */
01043   {
01044     { 0, 0, 0, 0 },
01045     { { MNEM, 0 } },
01046     & ifmt_ret, { 0x7010 }
01047   },
01048 /* reti */
01049   {
01050     { 0, 0, 0, 0 },
01051     { { MNEM, 0 } },
01052     & ifmt_ret, { 0x7012 }
01053   },
01054 /* halt */
01055   {
01056     { 0, 0, 0, 0 },
01057     { { MNEM, 0 } },
01058     & ifmt_ret, { 0x7022 }
01059   },
01060 /* sleep */
01061   {
01062     { 0, 0, 0, 0 },
01063     { { MNEM, 0 } },
01064     & ifmt_ret, { 0x7062 }
01065   },
01066 /* swi $uimm2 */
01067   {
01068     { 0, 0, 0, 0 },
01069     { { MNEM, ' ', OP (UIMM2), 0 } },
01070     & ifmt_swi, { 0x7006 }
01071   },
01072 /* break */
01073   {
01074     { 0, 0, 0, 0 },
01075     { { MNEM, 0 } },
01076     & ifmt_ret, { 0x7032 }
01077   },
01078 /* syncm */
01079   {
01080     { 0, 0, 0, 0 },
01081     { { MNEM, 0 } },
01082     & ifmt_ret, { 0x7011 }
01083   },
01084 /* stcb $rn,$uimm16 */
01085   {
01086     { 0, 0, 0, 0 },
01087     { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
01088     & ifmt_movu16, { 0xf0040000 }
01089   },
01090 /* ldcb $rn,$uimm16 */
01091   {
01092     { 0, 0, 0, 0 },
01093     { { MNEM, ' ', OP (RN), ',', OP (UIMM16), 0 } },
01094     & ifmt_movu16, { 0xf0140000 }
01095   },
01096 /* bsetm ($rma),$uimm3 */
01097   {
01098     { 0, 0, 0, 0 },
01099     { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
01100     & ifmt_bsetm, { 0x2000 }
01101   },
01102 /* bclrm ($rma),$uimm3 */
01103   {
01104     { 0, 0, 0, 0 },
01105     { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
01106     & ifmt_bsetm, { 0x2001 }
01107   },
01108 /* bnotm ($rma),$uimm3 */
01109   {
01110     { 0, 0, 0, 0 },
01111     { { MNEM, ' ', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
01112     & ifmt_bsetm, { 0x2002 }
01113   },
01114 /* btstm \$0,($rma),$uimm3 */
01115   {
01116     { 0, 0, 0, 0 },
01117     { { MNEM, ' ', '$', '0', ',', '(', OP (RMA), ')', ',', OP (UIMM3), 0 } },
01118     & ifmt_bsetm, { 0x2003 }
01119   },
01120 /* tas $rn,($rma) */
01121   {
01122     { 0, 0, 0, 0 },
01123     { { MNEM, ' ', OP (RN), ',', '(', OP (RMA), ')', 0 } },
01124     & ifmt_tas, { 0x2004 }
01125   },
01126 /* cache $cimm4,($rma) */
01127   {
01128     { 0, 0, 0, 0 },
01129     { { MNEM, ' ', OP (CIMM4), ',', '(', OP (RMA), ')', 0 } },
01130     & ifmt_cache, { 0x7004 }
01131   },
01132 /* mul $rn,$rm */
01133   {
01134     { 0, 0, 0, 0 },
01135     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01136     & ifmt_mov, { 0x1004 }
01137   },
01138 /* mulu $rn,$rm */
01139   {
01140     { 0, 0, 0, 0 },
01141     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01142     & ifmt_mov, { 0x1005 }
01143   },
01144 /* mulr $rn,$rm */
01145   {
01146     { 0, 0, 0, 0 },
01147     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01148     & ifmt_mov, { 0x1006 }
01149   },
01150 /* mulru $rn,$rm */
01151   {
01152     { 0, 0, 0, 0 },
01153     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01154     & ifmt_mov, { 0x1007 }
01155   },
01156 /* madd $rn,$rm */
01157   {
01158     { 0, 0, 0, 0 },
01159     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01160     & ifmt_madd, { 0xf0013004 }
01161   },
01162 /* maddu $rn,$rm */
01163   {
01164     { 0, 0, 0, 0 },
01165     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01166     & ifmt_madd, { 0xf0013005 }
01167   },
01168 /* maddr $rn,$rm */
01169   {
01170     { 0, 0, 0, 0 },
01171     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01172     & ifmt_madd, { 0xf0013006 }
01173   },
01174 /* maddru $rn,$rm */
01175   {
01176     { 0, 0, 0, 0 },
01177     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01178     & ifmt_madd, { 0xf0013007 }
01179   },
01180 /* div $rn,$rm */
01181   {
01182     { 0, 0, 0, 0 },
01183     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01184     & ifmt_mov, { 0x1008 }
01185   },
01186 /* divu $rn,$rm */
01187   {
01188     { 0, 0, 0, 0 },
01189     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01190     & ifmt_mov, { 0x1009 }
01191   },
01192 /* dret */
01193   {
01194     { 0, 0, 0, 0 },
01195     { { MNEM, 0 } },
01196     & ifmt_ret, { 0x7013 }
01197   },
01198 /* dbreak */
01199   {
01200     { 0, 0, 0, 0 },
01201     { { MNEM, 0 } },
01202     & ifmt_ret, { 0x7033 }
01203   },
01204 /* ldz $rn,$rm */
01205   {
01206     { 0, 0, 0, 0 },
01207     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01208     & ifmt_madd, { 0xf0010000 }
01209   },
01210 /* abs $rn,$rm */
01211   {
01212     { 0, 0, 0, 0 },
01213     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01214     & ifmt_madd, { 0xf0010003 }
01215   },
01216 /* ave $rn,$rm */
01217   {
01218     { 0, 0, 0, 0 },
01219     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01220     & ifmt_madd, { 0xf0010002 }
01221   },
01222 /* min $rn,$rm */
01223   {
01224     { 0, 0, 0, 0 },
01225     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01226     & ifmt_madd, { 0xf0010004 }
01227   },
01228 /* max $rn,$rm */
01229   {
01230     { 0, 0, 0, 0 },
01231     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01232     & ifmt_madd, { 0xf0010005 }
01233   },
01234 /* minu $rn,$rm */
01235   {
01236     { 0, 0, 0, 0 },
01237     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01238     & ifmt_madd, { 0xf0010006 }
01239   },
01240 /* maxu $rn,$rm */
01241   {
01242     { 0, 0, 0, 0 },
01243     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01244     & ifmt_madd, { 0xf0010007 }
01245   },
01246 /* clip $rn,$cimm5 */
01247   {
01248     { 0, 0, 0, 0 },
01249     { { MNEM, ' ', OP (RN), ',', OP (CIMM5), 0 } },
01250     & ifmt_clip, { 0xf0011000 }
01251   },
01252 /* clipu $rn,$cimm5 */
01253   {
01254     { 0, 0, 0, 0 },
01255     { { MNEM, ' ', OP (RN), ',', OP (CIMM5), 0 } },
01256     & ifmt_clip, { 0xf0011001 }
01257   },
01258 /* sadd $rn,$rm */
01259   {
01260     { 0, 0, 0, 0 },
01261     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01262     & ifmt_madd, { 0xf0010008 }
01263   },
01264 /* ssub $rn,$rm */
01265   {
01266     { 0, 0, 0, 0 },
01267     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01268     & ifmt_madd, { 0xf001000a }
01269   },
01270 /* saddu $rn,$rm */
01271   {
01272     { 0, 0, 0, 0 },
01273     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01274     & ifmt_madd, { 0xf0010009 }
01275   },
01276 /* ssubu $rn,$rm */
01277   {
01278     { 0, 0, 0, 0 },
01279     { { MNEM, ' ', OP (RN), ',', OP (RM), 0 } },
01280     & ifmt_madd, { 0xf001000b }
01281   },
01282 /* swcp $crn,($rma) */
01283   {
01284     { 0, 0, 0, 0 },
01285     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), ')', 0 } },
01286     & ifmt_swcp, { 0x3008 }
01287   },
01288 /* lwcp $crn,($rma) */
01289   {
01290     { 0, 0, 0, 0 },
01291     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), ')', 0 } },
01292     & ifmt_swcp, { 0x3009 }
01293   },
01294 /* smcp $crn64,($rma) */
01295   {
01296     { 0, 0, 0, 0 },
01297     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), ')', 0 } },
01298     & ifmt_smcp, { 0x300a }
01299   },
01300 /* lmcp $crn64,($rma) */
01301   {
01302     { 0, 0, 0, 0 },
01303     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), ')', 0 } },
01304     & ifmt_smcp, { 0x300b }
01305   },
01306 /* swcpi $crn,($rma+) */
01307   {
01308     { 0, 0, 0, 0 },
01309     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', 0 } },
01310     & ifmt_swcp, { 0x3000 }
01311   },
01312 /* lwcpi $crn,($rma+) */
01313   {
01314     { 0, 0, 0, 0 },
01315     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', 0 } },
01316     & ifmt_swcp, { 0x3001 }
01317   },
01318 /* smcpi $crn64,($rma+) */
01319   {
01320     { 0, 0, 0, 0 },
01321     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', 0 } },
01322     & ifmt_smcp, { 0x3002 }
01323   },
01324 /* lmcpi $crn64,($rma+) */
01325   {
01326     { 0, 0, 0, 0 },
01327     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', 0 } },
01328     & ifmt_smcp, { 0x3003 }
01329   },
01330 /* swcp $crn,$sdisp16($rma) */
01331   {
01332     { 0, 0, 0, 0 },
01333     { { MNEM, ' ', OP (CRN), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
01334     & ifmt_swcp16, { 0xf00c0000 }
01335   },
01336 /* lwcp $crn,$sdisp16($rma) */
01337   {
01338     { 0, 0, 0, 0 },
01339     { { MNEM, ' ', OP (CRN), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
01340     & ifmt_swcp16, { 0xf00d0000 }
01341   },
01342 /* smcp $crn64,$sdisp16($rma) */
01343   {
01344     { 0, 0, 0, 0 },
01345     { { MNEM, ' ', OP (CRN64), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
01346     & ifmt_smcp16, { 0xf00e0000 }
01347   },
01348 /* lmcp $crn64,$sdisp16($rma) */
01349   {
01350     { 0, 0, 0, 0 },
01351     { { MNEM, ' ', OP (CRN64), ',', OP (SDISP16), '(', OP (RMA), ')', 0 } },
01352     & ifmt_smcp16, { 0xf00f0000 }
01353   },
01354 /* sbcpa $crn,($rma+),$cdisp8 */
01355   {
01356     { 0, 0, 0, 0 },
01357     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
01358     & ifmt_sbcpa, { 0xf0050000 }
01359   },
01360 /* lbcpa $crn,($rma+),$cdisp8 */
01361   {
01362     { 0, 0, 0, 0 },
01363     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
01364     & ifmt_sbcpa, { 0xf0054000 }
01365   },
01366 /* shcpa $crn,($rma+),$cdisp8a2 */
01367   {
01368     { 0, 0, 0, 0 },
01369     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
01370     & ifmt_shcpa, { 0xf0051000 }
01371   },
01372 /* lhcpa $crn,($rma+),$cdisp8a2 */
01373   {
01374     { 0, 0, 0, 0 },
01375     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
01376     & ifmt_shcpa, { 0xf0055000 }
01377   },
01378 /* swcpa $crn,($rma+),$cdisp8a4 */
01379   {
01380     { 0, 0, 0, 0 },
01381     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
01382     & ifmt_swcpa, { 0xf0052000 }
01383   },
01384 /* lwcpa $crn,($rma+),$cdisp8a4 */
01385   {
01386     { 0, 0, 0, 0 },
01387     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
01388     & ifmt_swcpa, { 0xf0056000 }
01389   },
01390 /* smcpa $crn64,($rma+),$cdisp8a8 */
01391   {
01392     { 0, 0, 0, 0 },
01393     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
01394     & ifmt_smcpa, { 0xf0053000 }
01395   },
01396 /* lmcpa $crn64,($rma+),$cdisp8a8 */
01397   {
01398     { 0, 0, 0, 0 },
01399     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
01400     & ifmt_smcpa, { 0xf0057000 }
01401   },
01402 /* sbcpm0 $crn,($rma+),$cdisp8 */
01403   {
01404     { 0, 0, 0, 0 },
01405     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
01406     & ifmt_sbcpa, { 0xf0050800 }
01407   },
01408 /* lbcpm0 $crn,($rma+),$cdisp8 */
01409   {
01410     { 0, 0, 0, 0 },
01411     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
01412     & ifmt_sbcpa, { 0xf0054800 }
01413   },
01414 /* shcpm0 $crn,($rma+),$cdisp8a2 */
01415   {
01416     { 0, 0, 0, 0 },
01417     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
01418     & ifmt_shcpa, { 0xf0051800 }
01419   },
01420 /* lhcpm0 $crn,($rma+),$cdisp8a2 */
01421   {
01422     { 0, 0, 0, 0 },
01423     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
01424     & ifmt_shcpa, { 0xf0055800 }
01425   },
01426 /* swcpm0 $crn,($rma+),$cdisp8a4 */
01427   {
01428     { 0, 0, 0, 0 },
01429     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
01430     & ifmt_swcpa, { 0xf0052800 }
01431   },
01432 /* lwcpm0 $crn,($rma+),$cdisp8a4 */
01433   {
01434     { 0, 0, 0, 0 },
01435     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
01436     & ifmt_swcpa, { 0xf0056800 }
01437   },
01438 /* smcpm0 $crn64,($rma+),$cdisp8a8 */
01439   {
01440     { 0, 0, 0, 0 },
01441     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
01442     & ifmt_smcpa, { 0xf0053800 }
01443   },
01444 /* lmcpm0 $crn64,($rma+),$cdisp8a8 */
01445   {
01446     { 0, 0, 0, 0 },
01447     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
01448     & ifmt_smcpa, { 0xf0057800 }
01449   },
01450 /* sbcpm1 $crn,($rma+),$cdisp8 */
01451   {
01452     { 0, 0, 0, 0 },
01453     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
01454     & ifmt_sbcpa, { 0xf0050c00 }
01455   },
01456 /* lbcpm1 $crn,($rma+),$cdisp8 */
01457   {
01458     { 0, 0, 0, 0 },
01459     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8), 0 } },
01460     & ifmt_sbcpa, { 0xf0054c00 }
01461   },
01462 /* shcpm1 $crn,($rma+),$cdisp8a2 */
01463   {
01464     { 0, 0, 0, 0 },
01465     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
01466     & ifmt_shcpa, { 0xf0051c00 }
01467   },
01468 /* lhcpm1 $crn,($rma+),$cdisp8a2 */
01469   {
01470     { 0, 0, 0, 0 },
01471     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A2), 0 } },
01472     & ifmt_shcpa, { 0xf0055c00 }
01473   },
01474 /* swcpm1 $crn,($rma+),$cdisp8a4 */
01475   {
01476     { 0, 0, 0, 0 },
01477     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
01478     & ifmt_swcpa, { 0xf0052c00 }
01479   },
01480 /* lwcpm1 $crn,($rma+),$cdisp8a4 */
01481   {
01482     { 0, 0, 0, 0 },
01483     { { MNEM, ' ', OP (CRN), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A4), 0 } },
01484     & ifmt_swcpa, { 0xf0056c00 }
01485   },
01486 /* smcpm1 $crn64,($rma+),$cdisp8a8 */
01487   {
01488     { 0, 0, 0, 0 },
01489     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
01490     & ifmt_smcpa, { 0xf0053c00 }
01491   },
01492 /* lmcpm1 $crn64,($rma+),$cdisp8a8 */
01493   {
01494     { 0, 0, 0, 0 },
01495     { { MNEM, ' ', OP (CRN64), ',', '(', OP (RMA), '+', ')', ',', OP (CDISP8A8), 0 } },
01496     & ifmt_smcpa, { 0xf0057c00 }
01497   },
01498 /* bcpeq $cccc,$pcrel17a2 */
01499   {
01500     { 0, 0, 0, 0 },
01501     { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
01502     & ifmt_bcpeq, { 0xd8040000 }
01503   },
01504 /* bcpne $cccc,$pcrel17a2 */
01505   {
01506     { 0, 0, 0, 0 },
01507     { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
01508     & ifmt_bcpeq, { 0xd8050000 }
01509   },
01510 /* bcpat $cccc,$pcrel17a2 */
01511   {
01512     { 0, 0, 0, 0 },
01513     { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
01514     & ifmt_bcpeq, { 0xd8060000 }
01515   },
01516 /* bcpaf $cccc,$pcrel17a2 */
01517   {
01518     { 0, 0, 0, 0 },
01519     { { MNEM, ' ', OP (CCCC), ',', OP (PCREL17A2), 0 } },
01520     & ifmt_bcpeq, { 0xd8070000 }
01521   },
01522 /* synccp */
01523   {
01524     { 0, 0, 0, 0 },
01525     { { MNEM, 0 } },
01526     & ifmt_ret, { 0x7021 }
01527   },
01528 /* jsrv $rm */
01529   {
01530     { 0, 0, 0, 0 },
01531     { { MNEM, ' ', OP (RM), 0 } },
01532     & ifmt_jmp, { 0x180f }
01533   },
01534 /* bsrv $pcrel24a2 */
01535   {
01536     { 0, 0, 0, 0 },
01537     { { MNEM, ' ', OP (PCREL24A2), 0 } },
01538     & ifmt_bsr24, { 0xd80b0000 }
01539   },
01540 /* --unused-- */
01541   {
01542     { 0, 0, 0, 0 },
01543     { { MNEM, 0 } },
01544     & ifmt_sim_syscall, { 0x7800 }
01545   },
01546 /* --reserved-- */
01547   {
01548     { 0, 0, 0, 0 },
01549     { { MNEM, 0 } },
01550     & ifmt_mov, { 0x6 }
01551   },
01552 /* --reserved-- */
01553   {
01554     { 0, 0, 0, 0 },
01555     { { MNEM, 0 } },
01556     & ifmt_mov, { 0x100a }
01557   },
01558 /* --reserved-- */
01559   {
01560     { 0, 0, 0, 0 },
01561     { { MNEM, 0 } },
01562     & ifmt_mov, { 0x100b }
01563   },
01564 /* --reserved-- */
01565   {
01566     { 0, 0, 0, 0 },
01567     { { MNEM, 0 } },
01568     & ifmt_mov, { 0x2005 }
01569   },
01570 /* --reserved-- */
01571   {
01572     { 0, 0, 0, 0 },
01573     { { MNEM, 0 } },
01574     & ifmt_mov, { 0x2008 }
01575   },
01576 /* --reserved-- */
01577   {
01578     { 0, 0, 0, 0 },
01579     { { MNEM, 0 } },
01580     & ifmt_mov, { 0x2009 }
01581   },
01582 /* --reserved-- */
01583   {
01584     { 0, 0, 0, 0 },
01585     { { MNEM, 0 } },
01586     & ifmt_mov, { 0x200a }
01587   },
01588 /* --reserved-- */
01589   {
01590     { 0, 0, 0, 0 },
01591     { { MNEM, 0 } },
01592     & ifmt_mov, { 0x200b }
01593   },
01594 /* --reserved-- */
01595   {
01596     { 0, 0, 0, 0 },
01597     { { MNEM, 0 } },
01598     & ifmt_mov, { 0x3004 }
01599   },
01600 /* --reserved-- */
01601   {
01602     { 0, 0, 0, 0 },
01603     { { MNEM, 0 } },
01604     & ifmt_mov, { 0x3005 }
01605   },
01606 /* --reserved-- */
01607   {
01608     { 0, 0, 0, 0 },
01609     { { MNEM, 0 } },
01610     & ifmt_mov, { 0x3006 }
01611   },
01612 /* --reserved-- */
01613   {
01614     { 0, 0, 0, 0 },
01615     { { MNEM, 0 } },
01616     & ifmt_mov, { 0x3007 }
01617   },
01618 /* --reserved-- */
01619   {
01620     { 0, 0, 0, 0 },
01621     { { MNEM, 0 } },
01622     & ifmt_mov, { 0x300c }
01623   },
01624 /* --reserved-- */
01625   {
01626     { 0, 0, 0, 0 },
01627     { { MNEM, 0 } },
01628     & ifmt_mov, { 0x300d }
01629   },
01630 /* --reserved-- */
01631   {
01632     { 0, 0, 0, 0 },
01633     { { MNEM, 0 } },
01634     & ifmt_mov, { 0x300e }
01635   },
01636 /* --reserved-- */
01637   {
01638     { 0, 0, 0, 0 },
01639     { { MNEM, 0 } },
01640     & ifmt_mov, { 0x300f }
01641   },
01642 /* --reserved-- */
01643   {
01644     { 0, 0, 0, 0 },
01645     { { MNEM, 0 } },
01646     & ifmt_mov, { 0x7007 }
01647   },
01648 /* --reserved-- */
01649   {
01650     { 0, 0, 0, 0 },
01651     { { MNEM, 0 } },
01652     & ifmt_mov, { 0x700e }
01653   },
01654 /* --reserved-- */
01655   {
01656     { 0, 0, 0, 0 },
01657     { { MNEM, 0 } },
01658     & ifmt_mov, { 0x700f }
01659   },
01660 /* --reserved-- */
01661   {
01662     { 0, 0, 0, 0 },
01663     { { MNEM, 0 } },
01664     & ifmt_mov, { 0xc007 }
01665   },
01666 /* --reserved-- */
01667   {
01668     { 0, 0, 0, 0 },
01669     { { MNEM, 0 } },
01670     & ifmt_mov, { 0xe00d }
01671   },
01672 /* --reserved-- */
01673   {
01674     { 0, 0, 0, 0 },
01675     { { MNEM, 0 } },
01676     & ifmt_mov, { 0xf003 }
01677   },
01678 /* --reserved-- */
01679   {
01680     { 0, 0, 0, 0 },
01681     { { MNEM, 0 } },
01682     & ifmt_mov, { 0xf006 }
01683   },
01684 /* --reserved-- */
01685   {
01686     { 0, 0, 0, 0 },
01687     { { MNEM, 0 } },
01688     & ifmt_mov, { 0xf008 }
01689   },
01690 /* --reserved-- */
01691   {
01692     { 0, 0, 0, 0 },
01693     { { MNEM, 0 } },
01694     & ifmt_mov, { 0x7005 }
01695   },
01696 /* --reserved-- */
01697   {
01698     { 0, 0, 0, 0 },
01699     { { MNEM, 0 } },
01700     & ifmt_mov, { 0x700c }
01701   },
01702 /* --reserved-- */
01703   {
01704     { 0, 0, 0, 0 },
01705     { { MNEM, 0 } },
01706     & ifmt_mov, { 0x700d }
01707   },
01708 /* fadds ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
01709   {
01710     { 0, 0, 0, 0 },
01711     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01712     & ifmt_fadds, { 0xf0070000 }
01713   },
01714 /* fsubs ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
01715   {
01716     { 0, 0, 0, 0 },
01717     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01718     & ifmt_fadds, { 0xf0170000 }
01719   },
01720 /* fmuls ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
01721   {
01722     { 0, 0, 0, 0 },
01723     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01724     & ifmt_fadds, { 0xf0270000 }
01725   },
01726 /* fdivs ${fmax-FRd},${fmax-FRn},${fmax-FRm} */
01727   {
01728     { 0, 0, 0, 0 },
01729     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01730     & ifmt_fadds, { 0xf0370000 }
01731   },
01732 /* fsqrts ${fmax-FRd},${fmax-FRn} */
01733   {
01734     { 0, 0, 0, 0 },
01735     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
01736     & ifmt_fsqrts, { 0xf0470000 }
01737   },
01738 /* fabss ${fmax-FRd},${fmax-FRn} */
01739   {
01740     { 0, 0, 0, 0 },
01741     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
01742     & ifmt_fsqrts, { 0xf0570000 }
01743   },
01744 /* fnegs ${fmax-FRd},${fmax-FRn} */
01745   {
01746     { 0, 0, 0, 0 },
01747     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
01748     & ifmt_fsqrts, { 0xf0770000 }
01749   },
01750 /* fmovs ${fmax-FRd},${fmax-FRn} */
01751   {
01752     { 0, 0, 0, 0 },
01753     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN), 0 } },
01754     & ifmt_fsqrts, { 0xf0670000 }
01755   },
01756 /* froundws ${fmax-FRd-int},${fmax-FRn} */
01757   {
01758     { 0, 0, 0, 0 },
01759     { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
01760     & ifmt_froundws, { 0xf0c70000 }
01761   },
01762 /* ftruncws ${fmax-FRd-int},${fmax-FRn} */
01763   {
01764     { 0, 0, 0, 0 },
01765     { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
01766     & ifmt_froundws, { 0xf0d70000 }
01767   },
01768 /* fceilws ${fmax-FRd-int},${fmax-FRn} */
01769   {
01770     { 0, 0, 0, 0 },
01771     { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
01772     & ifmt_froundws, { 0xf0e70000 }
01773   },
01774 /* ffloorws ${fmax-FRd-int},${fmax-FRn} */
01775   {
01776     { 0, 0, 0, 0 },
01777     { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
01778     & ifmt_froundws, { 0xf0f70000 }
01779   },
01780 /* fcvtws ${fmax-FRd-int},${fmax-FRn} */
01781   {
01782     { 0, 0, 0, 0 },
01783     { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_FRN), 0 } },
01784     & ifmt_froundws, { 0xf0471000 }
01785   },
01786 /* fcvtsw ${fmax-FRd},${fmax-FRn-int} */
01787   {
01788     { 0, 0, 0, 0 },
01789     { { MNEM, ' ', OP (FMAX_FRD), ',', OP (FMAX_FRN_INT), 0 } },
01790     & ifmt_fcvtsw, { 0xf0079000 }
01791   },
01792 /* fcmpfs ${fmax-FRn},${fmax-FRm} */
01793   {
01794     { 0, 0, 0, 0 },
01795     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01796     & ifmt_fcmpfs, { 0xf0072000 }
01797   },
01798 /* fcmpus ${fmax-FRn},${fmax-FRm} */
01799   {
01800     { 0, 0, 0, 0 },
01801     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01802     & ifmt_fcmpfs, { 0xf0172000 }
01803   },
01804 /* fcmpes ${fmax-FRn},${fmax-FRm} */
01805   {
01806     { 0, 0, 0, 0 },
01807     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01808     & ifmt_fcmpfs, { 0xf0272000 }
01809   },
01810 /* fcmpues ${fmax-FRn},${fmax-FRm} */
01811   {
01812     { 0, 0, 0, 0 },
01813     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01814     & ifmt_fcmpfs, { 0xf0372000 }
01815   },
01816 /* fcmpls ${fmax-FRn},${fmax-FRm} */
01817   {
01818     { 0, 0, 0, 0 },
01819     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01820     & ifmt_fcmpfs, { 0xf0472000 }
01821   },
01822 /* fcmpuls ${fmax-FRn},${fmax-FRm} */
01823   {
01824     { 0, 0, 0, 0 },
01825     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01826     & ifmt_fcmpfs, { 0xf0572000 }
01827   },
01828 /* fcmples ${fmax-FRn},${fmax-FRm} */
01829   {
01830     { 0, 0, 0, 0 },
01831     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01832     & ifmt_fcmpfs, { 0xf0672000 }
01833   },
01834 /* fcmpules ${fmax-FRn},${fmax-FRm} */
01835   {
01836     { 0, 0, 0, 0 },
01837     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01838     & ifmt_fcmpfs, { 0xf0772000 }
01839   },
01840 /* fcmpfis ${fmax-FRn},${fmax-FRm} */
01841   {
01842     { 0, 0, 0, 0 },
01843     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01844     & ifmt_fcmpfs, { 0xf0872000 }
01845   },
01846 /* fcmpuis ${fmax-FRn},${fmax-FRm} */
01847   {
01848     { 0, 0, 0, 0 },
01849     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01850     & ifmt_fcmpfs, { 0xf0972000 }
01851   },
01852 /* fcmpeis ${fmax-FRn},${fmax-FRm} */
01853   {
01854     { 0, 0, 0, 0 },
01855     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01856     & ifmt_fcmpfs, { 0xf0a72000 }
01857   },
01858 /* fcmpueis ${fmax-FRn},${fmax-FRm} */
01859   {
01860     { 0, 0, 0, 0 },
01861     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01862     & ifmt_fcmpfs, { 0xf0b72000 }
01863   },
01864 /* fcmplis ${fmax-FRn},${fmax-FRm} */
01865   {
01866     { 0, 0, 0, 0 },
01867     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01868     & ifmt_fcmpfs, { 0xf0c72000 }
01869   },
01870 /* fcmpulis ${fmax-FRn},${fmax-FRm} */
01871   {
01872     { 0, 0, 0, 0 },
01873     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01874     & ifmt_fcmpfs, { 0xf0d72000 }
01875   },
01876 /* fcmpleis ${fmax-FRn},${fmax-FRm} */
01877   {
01878     { 0, 0, 0, 0 },
01879     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01880     & ifmt_fcmpfs, { 0xf0e72000 }
01881   },
01882 /* fcmpuleis ${fmax-FRn},${fmax-FRm} */
01883   {
01884     { 0, 0, 0, 0 },
01885     { { MNEM, ' ', OP (FMAX_FRN), ',', OP (FMAX_FRM), 0 } },
01886     & ifmt_fcmpfs, { 0xf0f72000 }
01887   },
01888 /* cmov ${fmax-FRd-int},${fmax-Rm} */
01889   {
01890     { 0, 0, 0, 0 },
01891     { { MNEM, ' ', OP (FMAX_FRD_INT), ',', OP (FMAX_RM), 0 } },
01892     & ifmt_cmov_frn_rm, { 0xf007f000 }
01893   },
01894 /* cmov ${fmax-Rm},${fmax-FRd-int} */
01895   {
01896     { 0, 0, 0, 0 },
01897     { { MNEM, ' ', OP (FMAX_RM), ',', OP (FMAX_FRD_INT), 0 } },
01898     & ifmt_cmov_frn_rm, { 0xf007f001 }
01899   },
01900 /* cmovc ${fmax-CCRn},${fmax-Rm} */
01901   {
01902     { 0, 0, 0, 0 },
01903     { { MNEM, ' ', OP (FMAX_CCRN), ',', OP (FMAX_RM), 0 } },
01904     & ifmt_cmovc_ccrn_rm, { 0xf007f002 }
01905   },
01906 /* cmovc ${fmax-Rm},${fmax-CCRn} */
01907   {
01908     { 0, 0, 0, 0 },
01909     { { MNEM, ' ', OP (FMAX_RM), ',', OP (FMAX_CCRN), 0 } },
01910     & ifmt_cmovc_ccrn_rm, { 0xf007f003 }
01911   },
01912 };
01913 
01914 #undef A
01915 #undef OPERAND
01916 #undef MNEM
01917 #undef OP
01918 
01919 /* Formats for ALIAS macro-insns.  */
01920 
01921 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
01922 #define F(f) & mep_cgen_ifld_table[MEP_##f]
01923 #else
01924 #define F(f) & mep_cgen_ifld_table[MEP_f]
01925 #endif
01926 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
01927   16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01928 };
01929 
01930 static const CGEN_IFMT ifmt_sb16_0 ATTRIBUTE_UNUSED = {
01931   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01932 };
01933 
01934 static const CGEN_IFMT ifmt_sh16_0 ATTRIBUTE_UNUSED = {
01935   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01936 };
01937 
01938 static const CGEN_IFMT ifmt_sw16_0 ATTRIBUTE_UNUSED = {
01939   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01940 };
01941 
01942 static const CGEN_IFMT ifmt_lb16_0 ATTRIBUTE_UNUSED = {
01943   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01944 };
01945 
01946 static const CGEN_IFMT ifmt_lh16_0 ATTRIBUTE_UNUSED = {
01947   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01948 };
01949 
01950 static const CGEN_IFMT ifmt_lw16_0 ATTRIBUTE_UNUSED = {
01951   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01952 };
01953 
01954 static const CGEN_IFMT ifmt_lbu16_0 ATTRIBUTE_UNUSED = {
01955   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01956 };
01957 
01958 static const CGEN_IFMT ifmt_lhu16_0 ATTRIBUTE_UNUSED = {
01959   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01960 };
01961 
01962 static const CGEN_IFMT ifmt_swcp16_0 ATTRIBUTE_UNUSED = {
01963   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01964 };
01965 
01966 static const CGEN_IFMT ifmt_lwcp16_0 ATTRIBUTE_UNUSED = {
01967   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01968 };
01969 
01970 static const CGEN_IFMT ifmt_smcp16_0 ATTRIBUTE_UNUSED = {
01971   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01972 };
01973 
01974 static const CGEN_IFMT ifmt_lmcp16_0 ATTRIBUTE_UNUSED = {
01975   16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_CRN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
01976 };
01977 
01978 #undef F
01979 
01980 /* Each non-simple macro entry points to an array of expansion possibilities.  */
01981 
01982 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
01983 #define A(a) (1 << CGEN_INSN_##a)
01984 #else
01985 #define A(a) (1 << CGEN_INSN_a)
01986 #endif
01987 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
01988 #define OPERAND(op) MEP_OPERAND_##op
01989 #else
01990 #define OPERAND(op) MEP_OPERAND_op
01991 #endif
01992 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
01993 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
01994 
01995 /* The macro instruction table.  */
01996 
01997 static const CGEN_IBASE mep_cgen_macro_insn_table[] =
01998 {
01999 /* nop */
02000   {
02001     -1, "nop", "nop", 16,
02002     { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02003   },
02004 /* sb $rnc,$zero($rma) */
02005   {
02006     -1, "sb16-0", "sb", 16,
02007     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02008   },
02009 /* sh $rns,$zero($rma) */
02010   {
02011     -1, "sh16-0", "sh", 16,
02012     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02013   },
02014 /* sw $rnl,$zero($rma) */
02015   {
02016     -1, "sw16-0", "sw", 16,
02017     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02018   },
02019 /* lb $rnc,$zero($rma) */
02020   {
02021     -1, "lb16-0", "lb", 16,
02022     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02023   },
02024 /* lh $rns,$zero($rma) */
02025   {
02026     -1, "lh16-0", "lh", 16,
02027     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02028   },
02029 /* lw $rnl,$zero($rma) */
02030   {
02031     -1, "lw16-0", "lw", 16,
02032     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02033   },
02034 /* lbu $rnuc,$zero($rma) */
02035   {
02036     -1, "lbu16-0", "lbu", 16,
02037     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02038   },
02039 /* lhu $rnus,$zero($rma) */
02040   {
02041     -1, "lhu16-0", "lhu", 16,
02042     { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02043   },
02044 /* swcp $crn,$zero($rma) */
02045   {
02046     -1, "swcp16-0", "swcp", 16,
02047     { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02048   },
02049 /* lwcp $crn,$zero($rma) */
02050   {
02051     -1, "lwcp16-0", "lwcp", 16,
02052     { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02053   },
02054 /* smcp $crn64,$zero($rma) */
02055   {
02056     -1, "smcp16-0", "smcp", 16,
02057     { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02058   },
02059 /* lmcp $crn64,$zero($rma) */
02060   {
02061     -1, "lmcp16-0", "lmcp", 16,
02062     { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xe0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
02063   },
02064 };
02065 
02066 /* The macro instruction opcode table.  */
02067 
02068 static const CGEN_OPCODE mep_cgen_macro_insn_opcode_table[] =
02069 {
02070 /* nop */
02071   {
02072     { 0, 0, 0, 0 },
02073     { { MNEM, 0 } },
02074     & ifmt_nop, { 0x0 }
02075   },
02076 /* sb $rnc,$zero($rma) */
02077   {
02078     { 0, 0, 0, 0 },
02079     { { MNEM, ' ', OP (RNC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02080     & ifmt_sb16_0, { 0x8 }
02081   },
02082 /* sh $rns,$zero($rma) */
02083   {
02084     { 0, 0, 0, 0 },
02085     { { MNEM, ' ', OP (RNS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02086     & ifmt_sh16_0, { 0x9 }
02087   },
02088 /* sw $rnl,$zero($rma) */
02089   {
02090     { 0, 0, 0, 0 },
02091     { { MNEM, ' ', OP (RNL), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02092     & ifmt_sw16_0, { 0xa }
02093   },
02094 /* lb $rnc,$zero($rma) */
02095   {
02096     { 0, 0, 0, 0 },
02097     { { MNEM, ' ', OP (RNC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02098     & ifmt_lb16_0, { 0xc }
02099   },
02100 /* lh $rns,$zero($rma) */
02101   {
02102     { 0, 0, 0, 0 },
02103     { { MNEM, ' ', OP (RNS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02104     & ifmt_lh16_0, { 0xd }
02105   },
02106 /* lw $rnl,$zero($rma) */
02107   {
02108     { 0, 0, 0, 0 },
02109     { { MNEM, ' ', OP (RNL), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02110     & ifmt_lw16_0, { 0xe }
02111   },
02112 /* lbu $rnuc,$zero($rma) */
02113   {
02114     { 0, 0, 0, 0 },
02115     { { MNEM, ' ', OP (RNUC), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02116     & ifmt_lbu16_0, { 0xb }
02117   },
02118 /* lhu $rnus,$zero($rma) */
02119   {
02120     { 0, 0, 0, 0 },
02121     { { MNEM, ' ', OP (RNUS), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02122     & ifmt_lhu16_0, { 0xf }
02123   },
02124 /* swcp $crn,$zero($rma) */
02125   {
02126     { 0, 0, 0, 0 },
02127     { { MNEM, ' ', OP (CRN), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02128     & ifmt_swcp16_0, { 0x3008 }
02129   },
02130 /* lwcp $crn,$zero($rma) */
02131   {
02132     { 0, 0, 0, 0 },
02133     { { MNEM, ' ', OP (CRN), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02134     & ifmt_lwcp16_0, { 0x3009 }
02135   },
02136 /* smcp $crn64,$zero($rma) */
02137   {
02138     { 0, 0, 0, 0 },
02139     { { MNEM, ' ', OP (CRN64), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02140     & ifmt_smcp16_0, { 0x300a }
02141   },
02142 /* lmcp $crn64,$zero($rma) */
02143   {
02144     { 0, 0, 0, 0 },
02145     { { MNEM, ' ', OP (CRN64), ',', OP (ZERO), '(', OP (RMA), ')', 0 } },
02146     & ifmt_lmcp16_0, { 0x300b }
02147   },
02148 };
02149 
02150 #undef A
02151 #undef OPERAND
02152 #undef MNEM
02153 #undef OP
02154 
02155 #ifndef CGEN_ASM_HASH_P
02156 #define CGEN_ASM_HASH_P(insn) 1
02157 #endif
02158 
02159 #ifndef CGEN_DIS_HASH_P
02160 #define CGEN_DIS_HASH_P(insn) 1
02161 #endif
02162 
02163 /* Return non-zero if INSN is to be added to the hash table.
02164    Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */
02165 
02166 static int
02167 asm_hash_insn_p (insn)
02168      const CGEN_INSN *insn ATTRIBUTE_UNUSED;
02169 {
02170   return CGEN_ASM_HASH_P (insn);
02171 }
02172 
02173 static int
02174 dis_hash_insn_p (insn)
02175      const CGEN_INSN *insn;
02176 {
02177   /* If building the hash table and the NO-DIS attribute is present,
02178      ignore.  */
02179   if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
02180     return 0;
02181   return CGEN_DIS_HASH_P (insn);
02182 }
02183 
02184 #ifndef CGEN_ASM_HASH
02185 #define CGEN_ASM_HASH_SIZE 127
02186 #ifdef CGEN_MNEMONIC_OPERANDS
02187 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
02188 #else
02189 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
02190 #endif
02191 #endif
02192 
02193 /* It doesn't make much sense to provide a default here,
02194    but while this is under development we do.
02195    BUFFER is a pointer to the bytes of the insn, target order.
02196    VALUE is the first base_insn_bitsize bits as an int in host order.  */
02197 
02198 #ifndef CGEN_DIS_HASH
02199 #define CGEN_DIS_HASH_SIZE 256
02200 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
02201 #endif
02202 
02203 /* The result is the hash value of the insn.
02204    Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */
02205 
02206 static unsigned int
02207 asm_hash_insn (mnem)
02208      const char * mnem;
02209 {
02210   return CGEN_ASM_HASH (mnem);
02211 }
02212 
02213 /* BUF is a pointer to the bytes of the insn, target order.
02214    VALUE is the first base_insn_bitsize bits as an int in host order.  */
02215 
02216 static unsigned int
02217 dis_hash_insn (buf, value)
02218      const char * buf ATTRIBUTE_UNUSED;
02219      CGEN_INSN_INT value ATTRIBUTE_UNUSED;
02220 {
02221   return CGEN_DIS_HASH (buf, value);
02222 }
02223 
02224 /* Set the recorded length of the insn in the CGEN_FIELDS struct.  */
02225 
02226 static void
02227 set_fields_bitsize (CGEN_FIELDS *fields, int size)
02228 {
02229   CGEN_FIELDS_BITSIZE (fields) = size;
02230 }
02231 
02232 /* Function to call before using the operand instance table.
02233    This plugs the opcode entries and macro instructions into the cpu table.  */
02234 
02235 void
02236 mep_cgen_init_opcode_table (CGEN_CPU_DESC cd)
02237 {
02238   int i;
02239   int num_macros = (sizeof (mep_cgen_macro_insn_table) /
02240                   sizeof (mep_cgen_macro_insn_table[0]));
02241   const CGEN_IBASE *ib = & mep_cgen_macro_insn_table[0];
02242   const CGEN_OPCODE *oc = & mep_cgen_macro_insn_opcode_table[0];
02243   CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
02244 
02245   memset (insns, 0, num_macros * sizeof (CGEN_INSN));
02246   for (i = 0; i < num_macros; ++i)
02247     {
02248       insns[i].base = &ib[i];
02249       insns[i].opcode = &oc[i];
02250       mep_cgen_build_insn_regex (& insns[i]);
02251     }
02252   cd->macro_insn_table.init_entries = insns;
02253   cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
02254   cd->macro_insn_table.num_init_entries = num_macros;
02255 
02256   oc = & mep_cgen_insn_opcode_table[0];
02257   insns = (CGEN_INSN *) cd->insn_table.init_entries;
02258   for (i = 0; i < MAX_INSNS; ++i)
02259     {
02260       insns[i].opcode = &oc[i];
02261       mep_cgen_build_insn_regex (& insns[i]);
02262     }
02263 
02264   cd->sizeof_fields = sizeof (CGEN_FIELDS);
02265   cd->set_fields_bitsize = set_fields_bitsize;
02266 
02267   cd->asm_hash_p = asm_hash_insn_p;
02268   cd->asm_hash = asm_hash_insn;
02269   cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
02270 
02271   cd->dis_hash_p = dis_hash_insn_p;
02272   cd->dis_hash = dis_hash_insn;
02273   cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
02274 }