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cell-binutils  2.17cvs20070401
Classes | Defines | Enumerations | Functions | Variables
m68k-parse.h File Reference
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Classes

struct  m68k_indexreg
struct  m68k_exp
struct  m68k_op

Defines

#define DATA   DATA0
#define ADDR   ADDR0
#define SP   ADDR7
#define BAD   BAD0
#define BAC   BAC0
#define last_movec_reg   MBB

Enumerations

enum  m68k_register {
  DATA0 = 1, DATA1, DATA2, DATA3,
  DATA4, DATA5, DATA6, DATA7,
  ADDR0, ADDR1, ADDR2, ADDR3,
  ADDR4, ADDR5, ADDR6, ADDR7,
  FP0, FP1, FP2, FP3,
  FP4, FP5, FP6, FP7,
  COP0, COP1, COP2, COP3,
  COP4, COP5, COP6, COP7,
  PC, ZPC, SR, CCR,
  ACC, ACC1, ACC2, ACC3,
  ACCEXT01, ACCEXT23, MACSR, MASK,
  USP, ISP, SFC, DFC,
  CACR, VBR, CAAR, MSP,
  ITT0, ITT1, DTT0, DTT1,
  MMUSR, TC, SRP, URP,
  BUSCR, PCR, ROMBAR, RAMBAR0,
  RAMBAR1, MMUBAR, ROMBAR0, ROMBAR1,
  MPCR, EDRAMBAR, SECMBAR, PCR1U0,
  PCR1L0, PCR1U1, PCR1L1, PCR2U0,
  PCR2L0, PCR2U1, PCR2L1, PCR3U0,
  PCR3L0, PCR3U1, PCR3L1, MBAR0,
  MBAR1, ACR0, ACR1, ACR2,
  ACR3, FLASHBAR, RAMBAR, MBAR2,
  MBAR, ASID, CAC, MBB,
  FPI, FPS, FPC, DRP,
  CRP, CAL, VAL, SCC,
  AC, BAD0, BAD1, BAD2,
  BAD3, BAD4, BAD5, BAD6,
  BAD7, BAC0, BAC1, BAC2,
  BAC3, BAC4, BAC5, BAC6,
  BAC7, PSR, PCSR, IC,
  DC, NC, BC, TT0,
  TT1, ZDATA0, ZDATA1, ZDATA2,
  ZDATA3, ZDATA4, ZDATA5, ZDATA6,
  ZDATA7, ZADDR0, ZADDR1, ZADDR2,
  ZADDR3, ZADDR4, ZADDR5, ZADDR6,
  ZADDR7, DATA0L, DATA1L, DATA2L,
  DATA3L, DATA4L, DATA5L, DATA6L,
  DATA7L, ADDR0L, ADDR1L, ADDR2L,
  ADDR3L, ADDR4L, ADDR5L, ADDR6L,
  ADDR7L, DATA0U, DATA1U, DATA2U,
  DATA3U, DATA4U, DATA5U, DATA6U,
  DATA7U, ADDR0U, ADDR1U, ADDR2U,
  ADDR3U, ADDR4U, ADDR5U, ADDR6U,
  ADDR7U
}
enum  m68k_size { SIZE_UNSPEC, SIZE_BYTE, SIZE_WORD, SIZE_LONG }
enum  m68k_operand_type {
  IMMED = 1, ABSL, DREG, AREG,
  FPREG, CONTROL, AINDR, AINC,
  ADEC, DISP, BASE, POST,
  PRE, LSH, RSH, REGLST
}

Functions

int m68k_ip_op (char *, struct m68k_op *)

Variables

int flag_reg_prefix_optional

Class Documentation

struct m68k_indexreg

Definition at line 250 of file m68k-parse.h.

struct m68k_exp

Definition at line 277 of file m68k-parse.h.

struct m68k_op

Definition at line 315 of file m68k-parse.h.


Define Documentation

#define ADDR   ADDR0

Definition at line 40 of file m68k-parse.h.

#define BAC   BAC0

Definition at line 43 of file m68k-parse.h.

#define BAD   BAD0

Definition at line 42 of file m68k-parse.h.

#define DATA   DATA0

Definition at line 39 of file m68k-parse.h.

#define last_movec_reg   MBB

Definition at line 133 of file m68k-parse.h.

IC IMR SC SP   ADDR7

Definition at line 41 of file m68k-parse.h.


Enumeration Type Documentation

Enumerator:
IMMED 
ABSL 
DREG 
AREG 
FPREG 
CONTROL 
AINDR 
AINC 
ADEC 
DISP 
BASE 
POST 
PRE 
LSH 
RSH 
REGLST 

Definition at line 293 of file m68k-parse.h.

{
  IMMED = 1,
  ABSL,
  DREG,
  AREG,
  FPREG,
  CONTROL,
  AINDR,
  AINC,
  ADEC,
  DISP,
  BASE,
  POST,
  PRE,
  LSH,  /* MAC/EMAC scalefactor '<<'.  */
  RSH,  /* MAC/EMAC scalefactor '>>'.  */
  REGLST
};
Enumerator:
DATA0 
DATA1 
DATA2 
DATA3 
DATA4 
DATA5 
DATA6 
DATA7 
ADDR0 
ADDR1 
ADDR2 
ADDR3 
ADDR4 
ADDR5 
ADDR6 
ADDR7 
FP0 
FP1 
FP2 
FP3 
FP4 
FP5 
FP6 
FP7 
COP0 
COP1 
COP2 
COP3 
COP4 
COP5 
COP6 
COP7 
PC 
ZPC 
SR 
CCR 
ACC 
ACC1 
ACC2 
ACC3 
ACCEXT01 
ACCEXT23 
MACSR 
MASK 
USP 
ISP 
SFC 
DFC 
CACR 
VBR 
CAAR 
MSP 
ITT0 
ITT1 
DTT0 
DTT1 
MMUSR 
TC 
SRP 
URP 
BUSCR 
PCR 
ROMBAR 
RAMBAR0 
RAMBAR1 
MMUBAR 
ROMBAR0 
ROMBAR1 
MPCR 
EDRAMBAR 
SECMBAR 
PCR1U0 
PCR1L0 
PCR1U1 
PCR1L1 
PCR2U0 
PCR2L0 
PCR2U1 
PCR2L1 
PCR3U0 
PCR3L0 
PCR3U1 
PCR3L1 
MBAR0 
MBAR1 
ACR0 
ACR1 
ACR2 
ACR3 
FLASHBAR 
RAMBAR 
MBAR2 
MBAR 
ASID 
CAC 
MBB 
FPI 
FPS 
FPC 
DRP 
CRP 
CAL 
VAL 
SCC 
AC 
BAD0 
BAD1 
BAD2 
BAD3 
BAD4 
BAD5 
BAD6 
BAD7 
BAC0 
BAC1 
BAC2 
BAC3 
BAC4 
BAC5 
BAC6 
BAC7 
PSR 
PCSR 
IC 
DC 
NC 
BC 
TT0 
TT1 
ZDATA0 
ZDATA1 
ZDATA2 
ZDATA3 
ZDATA4 
ZDATA5 
ZDATA6 
ZDATA7 
ZADDR0 
ZADDR1 
ZADDR2 
ZADDR3 
ZADDR4 
ZADDR5 
ZADDR6 
ZADDR7 
DATA0L 
DATA1L 
DATA2L 
DATA3L 
DATA4L 
DATA5L 
DATA6L 
DATA7L 
ADDR0L 
ADDR1L 
ADDR2L 
ADDR3L 
ADDR4L 
ADDR5L 
ADDR6L 
ADDR7L 
DATA0U 
DATA1U 
DATA2U 
DATA3U 
DATA4U 
DATA5U 
DATA6U 
DATA7U 
ADDR0U 
ADDR1U 
ADDR2U 
ADDR3U 
ADDR4U 
ADDR5U 
ADDR6U 
ADDR7U 

Definition at line 45 of file m68k-parse.h.

{
  DATA0 = 1,                /*   1- 8 == data registers 0-7 */
  DATA1,
  DATA2,
  DATA3,
  DATA4,
  DATA5,
  DATA6,
  DATA7,

  ADDR0,
  ADDR1,
  ADDR2,
  ADDR3,
  ADDR4,
  ADDR5,
  ADDR6,
  ADDR7,

  FP0,                      /* Eight FP registers */
  FP1,
  FP2,
  FP3,
  FP4,
  FP5,
  FP6,
  FP7,

  COP0,                            /* Co-processor #0-#7 */
  COP1,
  COP2,
  COP3,
  COP4,
  COP5,
  COP6,
  COP7,

  PC,                       /* Program counter */
  ZPC,                      /* Hack for Program space, but 0 addressing */
  SR,                       /* Status Reg */
  CCR,                      /* Condition code Reg */
  ACC,                      /* Accumulator Reg0 (EMAC or ACC on MAC).  */
  ACC1,                            /* Accumulator Reg 1 (EMAC).  */
  ACC2,                            /* Accumulator Reg 2 (EMAC).  */
  ACC3,                            /* Accumulator Reg 3 (EMAC).  */
  ACCEXT01,                 /* Accumulator extension 0&1 (EMAC).  */
  ACCEXT23,                 /* Accumulator extension 2&3 (EMAC).  */
  MACSR,                    /* MAC Status Reg */
  MASK,                            /* Modulus Reg */

  /* These have to be grouped together for the movec instruction to work.  */
  USP,                      /*  User Stack Pointer */
  ISP,                      /*  Interrupt stack pointer */
  SFC,
  DFC,
  CACR,
  VBR,
  CAAR,
  MSP,
  ITT0,
  ITT1,
  DTT0,
  DTT1,
  MMUSR,
  TC,
  SRP,
  URP,
  BUSCR,                    /* 68060 added these.  */
  PCR,
  ROMBAR,                   /* mcf5200 added these.  */
  RAMBAR0,
  RAMBAR1,
  MMUBAR,                   /* mcfv4e added these.  */
  ROMBAR0,                  /* mcfv4e added these.  */
  ROMBAR1,                  /* mcfv4e added these.  */
  MPCR, EDRAMBAR, SECMBAR,  /* mcfv4e added these.  */
  PCR1U0, PCR1L0, PCR1U1, PCR1L1,/* mcfv4e added these.  */
  PCR2U0, PCR2L0, PCR2U1, PCR2L1,/* mcfv4e added these.  */
  PCR3U0, PCR3L0, PCR3U1, PCR3L1,/* mcfv4e added these.  */
  MBAR0, MBAR1,                    /* mcfv4e added these.  */
  ACR0, ACR1, ACR2, ACR3,       /* mcf5200 added these.  */
  FLASHBAR, RAMBAR,                /* mcf528x added these.  */
  MBAR2,                     /* mcf5249 added this.  */
  MBAR,
  ASID,                            /* m5475.  */
  CAC,                       /* fido added this.  */
  MBB,
#define last_movec_reg MBB
  /* End of movec ordering constraints.  */

  FPI,
  FPS,
  FPC,

  DRP,                      /* 68851 or 68030 MMU regs */
  CRP,
  CAL,
  VAL,
  SCC,
  AC,
  BAD0,
  BAD1,
  BAD2,
  BAD3,
  BAD4,
  BAD5,
  BAD6,
  BAD7,
  BAC0,
  BAC1,
  BAC2,
  BAC3,
  BAC4,
  BAC5,
  BAC6,
  BAC7,
  PSR,                      /* aka MMUSR on 68030 (but not MMUSR on 68040)
                               and ACUSR on 68ec030 */
  PCSR,

  IC,                       /* instruction cache token */
  DC,                       /* data cache token */
  NC,                       /* no cache token */
  BC,                       /* both caches token */

  TT0,                      /* 68030 access control unit regs */
  TT1,

  ZDATA0,                   /* suppressed data registers.  */
  ZDATA1,
  ZDATA2,
  ZDATA3,
  ZDATA4,
  ZDATA5,
  ZDATA6,
  ZDATA7,

  ZADDR0,                   /* suppressed address registers.  */
  ZADDR1,
  ZADDR2,
  ZADDR3,
  ZADDR4,
  ZADDR5,
  ZADDR6,
  ZADDR7,

  /* Upper and lower half of data and address registers.  Order *must*
     be DATAxL, ADDRxL, DATAxU, ADDRxU.  */
  DATA0L,                   /* lower half of data registers */
  DATA1L,
  DATA2L,
  DATA3L,
  DATA4L,
  DATA5L,
  DATA6L,
  DATA7L,

  ADDR0L,                   /* lower half of address registers */
  ADDR1L,
  ADDR2L,
  ADDR3L,
  ADDR4L,
  ADDR5L,
  ADDR6L,
  ADDR7L,

  DATA0U,                   /* upper half of data registers */
  DATA1U,
  DATA2U,
  DATA3U,
  DATA4U,
  DATA5U,
  DATA6U,
  DATA7U,

  ADDR0U,                   /* upper half of address registers */
  ADDR1U,
  ADDR2U,
  ADDR3U,
  ADDR4U,
  ADDR5U,
  ADDR6U,
  ADDR7U,
};
enum m68k_size
Enumerator:
SIZE_UNSPEC 
SIZE_BYTE 
SIZE_WORD 
SIZE_LONG 

Definition at line 233 of file m68k-parse.h.

{
  /* Unspecified.  */
  SIZE_UNSPEC,

  /* Byte.  */
  SIZE_BYTE,

  /* Word (2 bytes).  */
  SIZE_WORD,

  /* Longword (4 bytes).  */
  SIZE_LONG
};

Function Documentation

int m68k_ip_op ( char *  ,
struct m68k_op  
)

Variable Documentation

Definition at line 86 of file tc-m68k.c.