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cell-binutils  2.17cvs20070401
m68k-dis.c
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00001 /* Print Motorola 68k instructions.
00002    Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
00003    1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
00004    Free Software Foundation, Inc.
00005 
00006    This file is free software; you can redistribute it and/or modify
00007    it under the terms of the GNU General Public License as published by
00008    the Free Software Foundation; either version 2 of the License, or
00009    (at your option) any later version.
00010 
00011    This program is distributed in the hope that it will be useful,
00012    but WITHOUT ANY WARRANTY; without even the implied warranty of
00013    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014    GNU General Public License for more details.
00015 
00016    You should have received a copy of the GNU General Public License
00017    along with this program; if not, write to the Free Software
00018    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
00019    MA 02110-1301, USA.  */
00020 
00021 #include "sysdep.h"
00022 #include "dis-asm.h"
00023 #include "floatformat.h"
00024 #include "libiberty.h"
00025 #include "opintl.h"
00026 
00027 #include "opcode/m68k.h"
00028 
00029 /* Local function prototypes.  */
00030 
00031 const char * const fpcr_names[] =
00032 {
00033   "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
00034   "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
00035 };
00036 
00037 static char *const reg_names[] =
00038 {
00039   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
00040   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
00041   "%ps", "%pc"
00042 };
00043 
00044 /* Name of register halves for MAC/EMAC.
00045    Seperate from reg_names since 'spu', 'fpl' look weird.  */
00046 static char *const reg_half_names[] =
00047 {
00048   "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
00049   "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
00050   "%ps", "%pc"
00051 };
00052 
00053 /* Sign-extend an (unsigned char).  */
00054 #if __STDC__ == 1
00055 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
00056 #else
00057 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
00058 #endif
00059 
00060 /* Get a 1 byte signed integer.  */
00061 #define NEXTBYTE(p)  (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
00062 
00063 /* Get a 2 byte signed integer.  */
00064 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
00065 #define NEXTWORD(p)  \
00066   (p += 2, FETCH_DATA (info, p), \
00067    COERCE16 ((p[-2] << 8) + p[-1]))
00068 
00069 /* Get a 4 byte signed integer.  */
00070 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
00071 #define NEXTLONG(p)  \
00072   (p += 4, FETCH_DATA (info, p), \
00073    (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
00074 
00075 /* Get a 4 byte unsigned integer.  */
00076 #define NEXTULONG(p)  \
00077   (p += 4, FETCH_DATA (info, p), \
00078    (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
00079 
00080 /* Get a single precision float.  */
00081 #define NEXTSINGLE(val, p) \
00082   (p += 4, FETCH_DATA (info, p), \
00083    floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
00084 
00085 /* Get a double precision float.  */
00086 #define NEXTDOUBLE(val, p) \
00087   (p += 8, FETCH_DATA (info, p), \
00088    floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
00089 
00090 /* Get an extended precision float.  */
00091 #define NEXTEXTEND(val, p) \
00092   (p += 12, FETCH_DATA (info, p), \
00093    floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
00094 
00095 /* Need a function to convert from packed to double
00096    precision.   Actually, it's easier to print a
00097    packed number than a double anyway, so maybe
00098    there should be a special case to handle this... */
00099 #define NEXTPACKED(p) \
00100   (p += 12, FETCH_DATA (info, p), 0.0)
00101 
00102 /* Maximum length of an instruction.  */
00103 #define MAXLEN 22
00104 
00105 #include <setjmp.h>
00106 
00107 struct private
00108 {
00109   /* Points to first byte not fetched.  */
00110   bfd_byte *max_fetched;
00111   bfd_byte the_buffer[MAXLEN];
00112   bfd_vma insn_start;
00113   jmp_buf bailout;
00114 };
00115 
00116 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
00117    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
00118    on error.  */
00119 #define FETCH_DATA(info, addr) \
00120   ((addr) <= ((struct private *) (info->private_data))->max_fetched \
00121    ? 1 : fetch_data ((info), (addr)))
00122 
00123 static int
00124 fetch_data (struct disassemble_info *info, bfd_byte *addr)
00125 {
00126   int status;
00127   struct private *priv = (struct private *)info->private_data;
00128   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
00129 
00130   status = (*info->read_memory_func) (start,
00131                                   priv->max_fetched,
00132                                   addr - priv->max_fetched,
00133                                   info);
00134   if (status != 0)
00135     {
00136       (*info->memory_error_func) (status, start, info);
00137       longjmp (priv->bailout, 1);
00138     }
00139   else
00140     priv->max_fetched = addr;
00141   return 1;
00142 }
00143 
00144 /* This function is used to print to the bit-bucket.  */
00145 static int
00146 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
00147               const char *format ATTRIBUTE_UNUSED,
00148               ...)
00149 {
00150   return 0;
00151 }
00152 
00153 static void
00154 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
00155                    struct disassemble_info *info ATTRIBUTE_UNUSED)
00156 {
00157 }
00158 
00159 /* Fetch BITS bits from a position in the instruction specified by CODE.
00160    CODE is a "place to put an argument", or 'x' for a destination
00161    that is a general address (mode and register).
00162    BUFFER contains the instruction.  */
00163 
00164 static int
00165 fetch_arg (unsigned char *buffer,
00166           int code,
00167           int bits,
00168           disassemble_info *info)
00169 {
00170   int val = 0;
00171 
00172   switch (code)
00173     {
00174     case '/': /* MAC/EMAC mask bit.  */
00175       val = buffer[3] >> 5;
00176       break;
00177 
00178     case 'G': /* EMAC ACC load.  */
00179       val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
00180       break;
00181 
00182     case 'H': /* EMAC ACC !load.  */
00183       val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
00184       break;
00185 
00186     case ']': /* EMAC ACCEXT bit.  */
00187       val = buffer[0] >> 2;
00188       break;
00189 
00190     case 'I': /* MAC/EMAC scale factor.  */
00191       val = buffer[2] >> 1;
00192       break;
00193 
00194     case 'F': /* EMAC ACCx.  */
00195       val = buffer[0] >> 1;
00196       break;
00197 
00198     case 'f':
00199       val = buffer[1];
00200       break;
00201 
00202     case 's':
00203       val = buffer[1];
00204       break;
00205 
00206     case 'd':               /* Destination, for register or quick.  */
00207       val = (buffer[0] << 8) + buffer[1];
00208       val >>= 9;
00209       break;
00210 
00211     case 'x':               /* Destination, for general arg.  */
00212       val = (buffer[0] << 8) + buffer[1];
00213       val >>= 6;
00214       break;
00215 
00216     case 'k':
00217       FETCH_DATA (info, buffer + 3);
00218       val = (buffer[3] >> 4);
00219       break;
00220 
00221     case 'C':
00222       FETCH_DATA (info, buffer + 3);
00223       val = buffer[3];
00224       break;
00225 
00226     case '1':
00227       FETCH_DATA (info, buffer + 3);
00228       val = (buffer[2] << 8) + buffer[3];
00229       val >>= 12;
00230       break;
00231 
00232     case '2':
00233       FETCH_DATA (info, buffer + 3);
00234       val = (buffer[2] << 8) + buffer[3];
00235       val >>= 6;
00236       break;
00237 
00238     case '3':
00239     case 'j':
00240       FETCH_DATA (info, buffer + 3);
00241       val = (buffer[2] << 8) + buffer[3];
00242       break;
00243 
00244     case '4':
00245       FETCH_DATA (info, buffer + 5);
00246       val = (buffer[4] << 8) + buffer[5];
00247       val >>= 12;
00248       break;
00249 
00250     case '5':
00251       FETCH_DATA (info, buffer + 5);
00252       val = (buffer[4] << 8) + buffer[5];
00253       val >>= 6;
00254       break;
00255 
00256     case '6':
00257       FETCH_DATA (info, buffer + 5);
00258       val = (buffer[4] << 8) + buffer[5];
00259       break;
00260 
00261     case '7':
00262       FETCH_DATA (info, buffer + 3);
00263       val = (buffer[2] << 8) + buffer[3];
00264       val >>= 7;
00265       break;
00266 
00267     case '8':
00268       FETCH_DATA (info, buffer + 3);
00269       val = (buffer[2] << 8) + buffer[3];
00270       val >>= 10;
00271       break;
00272 
00273     case '9':
00274       FETCH_DATA (info, buffer + 3);
00275       val = (buffer[2] << 8) + buffer[3];
00276       val >>= 5;
00277       break;
00278 
00279     case 'e':
00280       val = (buffer[1] >> 6);
00281       break;
00282 
00283     case 'm':
00284       val = (buffer[1] & 0x40 ? 0x8 : 0)
00285        | ((buffer[0] >> 1) & 0x7)
00286        | (buffer[3] & 0x80 ? 0x10 : 0);
00287       break;
00288 
00289     case 'n':
00290       val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
00291       break;
00292 
00293     case 'o':
00294       val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
00295       break;
00296 
00297     case 'M':
00298       val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
00299       break;
00300 
00301     case 'N':
00302       val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
00303       break;
00304 
00305     case 'h':
00306       val = buffer[2] >> 2;
00307       break;
00308 
00309     default:
00310       abort ();
00311     }
00312 
00313   switch (bits)
00314     {
00315     case 1:
00316       return val & 1;
00317     case 2:
00318       return val & 3;
00319     case 3:
00320       return val & 7;
00321     case 4:
00322       return val & 017;
00323     case 5:
00324       return val & 037;
00325     case 6:
00326       return val & 077;
00327     case 7:
00328       return val & 0177;
00329     case 8:
00330       return val & 0377;
00331     case 12:
00332       return val & 07777;
00333     default:
00334       abort ();
00335     }
00336 }
00337 
00338 /* Check if an EA is valid for a particular code.  This is required
00339    for the EMAC instructions since the type of source address determines
00340    if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
00341    is a non-load EMAC instruction and the bits mean register Ry.
00342    A similar case exists for the movem instructions where the register
00343    mask is interpreted differently for different EAs.  */
00344 
00345 static bfd_boolean
00346 m68k_valid_ea (char code, int val)
00347 {
00348   int mode, mask;
00349 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
00350   (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
00351    | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
00352 
00353   switch (code)
00354     {
00355     case '*':
00356       mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
00357       break;
00358     case '~':
00359       mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
00360       break;
00361     case '%':
00362       mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
00363       break;
00364     case ';':
00365       mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
00366       break;
00367     case '@':
00368       mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
00369       break;
00370     case '!':
00371       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
00372       break;
00373     case '&':
00374       mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
00375       break;
00376     case '$':
00377       mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
00378       break;
00379     case '?':
00380       mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
00381       break;
00382     case '/':
00383       mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
00384       break;
00385     case '|':
00386       mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
00387       break;
00388     case '>':
00389       mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
00390       break;
00391     case '<':
00392       mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
00393       break;
00394     case 'm':
00395       mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
00396       break;
00397     case 'n':
00398       mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
00399       break;
00400     case 'o':
00401       mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
00402       break;
00403     case 'p':
00404       mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
00405       break;
00406     case 'q':
00407       mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
00408       break;
00409     case 'v':
00410       mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
00411       break;
00412     case 'b':
00413       mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
00414       break;
00415     case 'w':
00416       mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
00417       break;
00418     case 'y':
00419       mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
00420       break;
00421     case 'z':
00422       mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
00423       break;
00424     case '4':
00425       mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
00426       break;
00427     default:
00428       abort ();
00429     }
00430 #undef M
00431 
00432   mode = (val >> 3) & 7;
00433   if (mode == 7)
00434     mode += val & 7;
00435   return (mask & (1 << mode)) != 0;
00436 }
00437 
00438 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
00439    REGNO = -1 for pc, -2 for none (suppressed).  */
00440 
00441 static void
00442 print_base (int regno, bfd_vma disp, disassemble_info *info)
00443 {
00444   if (regno == -1)
00445     {
00446       (*info->fprintf_func) (info->stream, "%%pc@(");
00447       (*info->print_address_func) (disp, info);
00448     }
00449   else
00450     {
00451       char buf[50];
00452 
00453       if (regno == -2)
00454        (*info->fprintf_func) (info->stream, "@(");
00455       else if (regno == -3)
00456        (*info->fprintf_func) (info->stream, "%%zpc@(");
00457       else
00458        (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
00459 
00460       sprintf_vma (buf, disp);
00461       (*info->fprintf_func) (info->stream, "%s", buf);
00462     }
00463 }
00464 
00465 /* Print an indexed argument.  The base register is BASEREG (-1 for pc).
00466    P points to extension word, in buffer.
00467    ADDR is the nominal core address of that extension word.  */
00468 
00469 static unsigned char *
00470 print_indexed (int basereg,
00471               unsigned char *p,
00472               bfd_vma addr,
00473               disassemble_info *info)
00474 {
00475   int word;
00476   static char *const scales[] = { "", ":2", ":4", ":8" };
00477   bfd_vma base_disp;
00478   bfd_vma outer_disp;
00479   char buf[40];
00480   char vmabuf[50];
00481 
00482   word = NEXTWORD (p);
00483 
00484   /* Generate the text for the index register.
00485      Where this will be output is not yet determined.  */
00486   sprintf (buf, "%s:%c%s",
00487           reg_names[(word >> 12) & 0xf],
00488           (word & 0x800) ? 'l' : 'w',
00489           scales[(word >> 9) & 3]);
00490 
00491   /* Handle the 68000 style of indexing.  */
00492 
00493   if ((word & 0x100) == 0)
00494     {
00495       base_disp = word & 0xff;
00496       if ((base_disp & 0x80) != 0)
00497        base_disp -= 0x100;
00498       if (basereg == -1)
00499        base_disp += addr;
00500       print_base (basereg, base_disp, info);
00501       (*info->fprintf_func) (info->stream, ",%s)", buf);
00502       return p;
00503     }
00504 
00505   /* Handle the generalized kind.  */
00506   /* First, compute the displacement to add to the base register.  */
00507   if (word & 0200)
00508     {
00509       if (basereg == -1)
00510        basereg = -3;
00511       else
00512        basereg = -2;
00513     }
00514   if (word & 0100)
00515     buf[0] = '\0';
00516   base_disp = 0;
00517   switch ((word >> 4) & 3)
00518     {
00519     case 2:
00520       base_disp = NEXTWORD (p);
00521       break;
00522     case 3:
00523       base_disp = NEXTLONG (p);
00524     }
00525   if (basereg == -1)
00526     base_disp += addr;
00527 
00528   /* Handle single-level case (not indirect).  */
00529   if ((word & 7) == 0)
00530     {
00531       print_base (basereg, base_disp, info);
00532       if (buf[0] != '\0')
00533        (*info->fprintf_func) (info->stream, ",%s", buf);
00534       (*info->fprintf_func) (info->stream, ")");
00535       return p;
00536     }
00537 
00538   /* Two level.  Compute displacement to add after indirection.  */
00539   outer_disp = 0;
00540   switch (word & 3)
00541     {
00542     case 2:
00543       outer_disp = NEXTWORD (p);
00544       break;
00545     case 3:
00546       outer_disp = NEXTLONG (p);
00547     }
00548 
00549   print_base (basereg, base_disp, info);
00550   if ((word & 4) == 0 && buf[0] != '\0')
00551     {
00552       (*info->fprintf_func) (info->stream, ",%s", buf);
00553       buf[0] = '\0';
00554     }
00555   sprintf_vma (vmabuf, outer_disp);
00556   (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
00557   if (buf[0] != '\0')
00558     (*info->fprintf_func) (info->stream, ",%s", buf);
00559   (*info->fprintf_func) (info->stream, ")");
00560 
00561   return p;
00562 }
00563 
00564 /* Returns number of bytes "eaten" by the operand, or
00565    return -1 if an invalid operand was found, or -2 if
00566    an opcode tabe error was found.
00567    ADDR is the pc for this arg to be relative to.  */
00568 
00569 static int
00570 print_insn_arg (const char *d,
00571               unsigned char *buffer,
00572               unsigned char *p0,
00573               bfd_vma addr,
00574               disassemble_info *info)
00575 {
00576   int val = 0;
00577   int place = d[1];
00578   unsigned char *p = p0;
00579   int regno;
00580   const char *regname;
00581   unsigned char *p1;
00582   double flval;
00583   int flt_p;
00584   bfd_signed_vma disp;
00585   unsigned int uval;
00586 
00587   switch (*d)
00588     {
00589     case 'c':        /* Cache identifier.  */
00590       {
00591         static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
00592         val = fetch_arg (buffer, place, 2, info);
00593         (*info->fprintf_func) (info->stream, cacheFieldName[val]);
00594         break;
00595       }
00596 
00597     case 'a':        /* Address register indirect only. Cf. case '+'.  */
00598       {
00599         (*info->fprintf_func)
00600          (info->stream,
00601           "%s@",
00602           reg_names[fetch_arg (buffer, place, 3, info) + 8]);
00603         break;
00604       }
00605 
00606     case '_':        /* 32-bit absolute address for move16.  */
00607       {
00608         uval = NEXTULONG (p);
00609        (*info->print_address_func) (uval, info);
00610         break;
00611       }
00612 
00613     case 'C':
00614       (*info->fprintf_func) (info->stream, "%%ccr");
00615       break;
00616 
00617     case 'S':
00618       (*info->fprintf_func) (info->stream, "%%sr");
00619       break;
00620 
00621     case 'U':
00622       (*info->fprintf_func) (info->stream, "%%usp");
00623       break;
00624 
00625     case 'E':
00626       (*info->fprintf_func) (info->stream, "%%acc");
00627       break;
00628 
00629     case 'G':
00630       (*info->fprintf_func) (info->stream, "%%macsr");
00631       break;
00632 
00633     case 'H':
00634       (*info->fprintf_func) (info->stream, "%%mask");
00635       break;
00636 
00637     case 'J':
00638       {
00639        /* FIXME: There's a problem here, different m68k processors call the
00640           same address different names. This table can't get it right
00641           because it doesn't know which processor it's disassembling for.  */
00642        static const struct { char *name; int value; } names[]
00643          = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
00644             {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
00645              {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
00646             {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
00647             {"%msp", 0x803}, {"%isp", 0x804},
00648             {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these.  */
00649 
00650             /* Should we be calling this psr like we do in case 'Y'?  */
00651             {"%mmusr",0x805},
00652 
00653              {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
00654 
00655             /* Fido added these.  */
00656              {"%cac", 0xffe}, {"%mbb", 0xfff}};
00657 
00658        val = fetch_arg (buffer, place, 12, info);
00659        for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
00660          if (names[regno].value == val)
00661            {
00662              (*info->fprintf_func) (info->stream, "%s", names[regno].name);
00663              break;
00664            }
00665        if (regno < 0)
00666          (*info->fprintf_func) (info->stream, "%d", val);
00667       }
00668       break;
00669 
00670     case 'Q':
00671       val = fetch_arg (buffer, place, 3, info);
00672       /* 0 means 8, except for the bkpt instruction... */
00673       if (val == 0 && d[1] != 's')
00674        val = 8;
00675       (*info->fprintf_func) (info->stream, "#%d", val);
00676       break;
00677 
00678     case 'x':
00679       val = fetch_arg (buffer, place, 3, info);
00680       /* 0 means -1.  */
00681       if (val == 0)
00682        val = -1;
00683       (*info->fprintf_func) (info->stream, "#%d", val);
00684       break;
00685 
00686     case 'M':
00687       if (place == 'h')
00688        {
00689          static char *const scalefactor_name[] = { "<<", ">>" };
00690          val = fetch_arg (buffer, place, 1, info);
00691          (*info->fprintf_func) (info->stream, scalefactor_name[val]);
00692        }
00693       else
00694        {
00695          val = fetch_arg (buffer, place, 8, info);
00696          if (val & 0x80)
00697            val = val - 0x100;
00698          (*info->fprintf_func) (info->stream, "#%d", val);
00699        }
00700       break;
00701 
00702     case 'T':
00703       val = fetch_arg (buffer, place, 4, info);
00704       (*info->fprintf_func) (info->stream, "#%d", val);
00705       break;
00706 
00707     case 'D':
00708       (*info->fprintf_func) (info->stream, "%s",
00709                           reg_names[fetch_arg (buffer, place, 3, info)]);
00710       break;
00711 
00712     case 'A':
00713       (*info->fprintf_func)
00714        (info->stream, "%s",
00715         reg_names[fetch_arg (buffer, place, 3, info) + 010]);
00716       break;
00717 
00718     case 'R':
00719       (*info->fprintf_func)
00720        (info->stream, "%s",
00721         reg_names[fetch_arg (buffer, place, 4, info)]);
00722       break;
00723 
00724     case 'r':
00725       regno = fetch_arg (buffer, place, 4, info);
00726       if (regno > 7)
00727        (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
00728       else
00729        (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
00730       break;
00731 
00732     case 'F':
00733       (*info->fprintf_func)
00734        (info->stream, "%%fp%d",
00735         fetch_arg (buffer, place, 3, info));
00736       break;
00737 
00738     case 'O':
00739       val = fetch_arg (buffer, place, 6, info);
00740       if (val & 0x20)
00741        (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
00742       else
00743        (*info->fprintf_func) (info->stream, "%d", val);
00744       break;
00745 
00746     case '+':
00747       (*info->fprintf_func)
00748        (info->stream, "%s@+",
00749         reg_names[fetch_arg (buffer, place, 3, info) + 8]);
00750       break;
00751 
00752     case '-':
00753       (*info->fprintf_func)
00754        (info->stream, "%s@-",
00755         reg_names[fetch_arg (buffer, place, 3, info) + 8]);
00756       break;
00757 
00758     case 'k':
00759       if (place == 'k')
00760        (*info->fprintf_func)
00761          (info->stream, "{%s}",
00762           reg_names[fetch_arg (buffer, place, 3, info)]);
00763       else if (place == 'C')
00764        {
00765          val = fetch_arg (buffer, place, 7, info);
00766          if (val > 63)             /* This is a signed constant.  */
00767            val -= 128;
00768          (*info->fprintf_func) (info->stream, "{#%d}", val);
00769        }
00770       else
00771        return -2;
00772       break;
00773 
00774     case '#':
00775     case '^':
00776       p1 = buffer + (*d == '#' ? 2 : 4);
00777       if (place == 's')
00778        val = fetch_arg (buffer, place, 4, info);
00779       else if (place == 'C')
00780        val = fetch_arg (buffer, place, 7, info);
00781       else if (place == '8')
00782        val = fetch_arg (buffer, place, 3, info);
00783       else if (place == '3')
00784        val = fetch_arg (buffer, place, 8, info);
00785       else if (place == 'b')
00786        val = NEXTBYTE (p1);
00787       else if (place == 'w' || place == 'W')
00788        val = NEXTWORD (p1);
00789       else if (place == 'l')
00790        val = NEXTLONG (p1);
00791       else
00792        return -2;
00793       (*info->fprintf_func) (info->stream, "#%d", val);
00794       break;
00795 
00796     case 'B':
00797       if (place == 'b')
00798        disp = NEXTBYTE (p);
00799       else if (place == 'B')
00800        disp = COERCE_SIGNED_CHAR (buffer[1]);
00801       else if (place == 'w' || place == 'W')
00802        disp = NEXTWORD (p);
00803       else if (place == 'l' || place == 'L' || place == 'C')
00804        disp = NEXTLONG (p);
00805       else if (place == 'g')
00806        {
00807          disp = NEXTBYTE (buffer);
00808          if (disp == 0)
00809            disp = NEXTWORD (p);
00810          else if (disp == -1)
00811            disp = NEXTLONG (p);
00812        }
00813       else if (place == 'c')
00814        {
00815          if (buffer[1] & 0x40)            /* If bit six is one, long offset.  */
00816            disp = NEXTLONG (p);
00817          else
00818            disp = NEXTWORD (p);
00819        }
00820       else
00821        return -2;
00822 
00823       (*info->print_address_func) (addr + disp, info);
00824       break;
00825 
00826     case 'd':
00827       val = NEXTWORD (p);
00828       (*info->fprintf_func)
00829        (info->stream, "%s@(%d)",
00830         reg_names[fetch_arg (buffer, place, 3, info) + 8], val);
00831       break;
00832 
00833     case 's':
00834       (*info->fprintf_func) (info->stream, "%s",
00835                           fpcr_names[fetch_arg (buffer, place, 3, info)]);
00836       break;
00837 
00838     case 'e':
00839       val = fetch_arg(buffer, place, 2, info);
00840       (*info->fprintf_func) (info->stream, "%%acc%d", val);
00841       break;
00842 
00843     case 'g':
00844       val = fetch_arg(buffer, place, 1, info);
00845       (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23");
00846       break;
00847 
00848     case 'i':
00849       val = fetch_arg(buffer, place, 2, info);
00850       if (val == 1)
00851        (*info->fprintf_func) (info->stream, "<<");
00852       else if (val == 3)
00853        (*info->fprintf_func) (info->stream, ">>");
00854       else
00855        return -1;
00856       break;
00857 
00858     case 'I':
00859       /* Get coprocessor ID... */
00860       val = fetch_arg (buffer, 'd', 3, info);
00861 
00862       if (val != 1)                       /* Unusual coprocessor ID?  */
00863        (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
00864       break;
00865 
00866     case '4':
00867     case '*':
00868     case '~':
00869     case '%':
00870     case ';':
00871     case '@':
00872     case '!':
00873     case '$':
00874     case '?':
00875     case '/':
00876     case '&':
00877     case '|':
00878     case '<':
00879     case '>':
00880     case 'm':
00881     case 'n':
00882     case 'o':
00883     case 'p':
00884     case 'q':
00885     case 'v':
00886     case 'b':
00887     case 'w':
00888     case 'y':
00889     case 'z':
00890       if (place == 'd')
00891        {
00892          val = fetch_arg (buffer, 'x', 6, info);
00893          val = ((val & 7) << 3) + ((val >> 3) & 7);
00894        }
00895       else
00896        val = fetch_arg (buffer, 's', 6, info);
00897 
00898       /* If the <ea> is invalid for *d, then reject this match.  */
00899       if (!m68k_valid_ea (*d, val))
00900        return -1;
00901 
00902       /* Get register number assuming address register.  */
00903       regno = (val & 7) + 8;
00904       regname = reg_names[regno];
00905       switch (val >> 3)
00906        {
00907        case 0:
00908          (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
00909          break;
00910 
00911        case 1:
00912          (*info->fprintf_func) (info->stream, "%s", regname);
00913          break;
00914 
00915        case 2:
00916          (*info->fprintf_func) (info->stream, "%s@", regname);
00917          break;
00918 
00919        case 3:
00920          (*info->fprintf_func) (info->stream, "%s@+", regname);
00921          break;
00922 
00923        case 4:
00924          (*info->fprintf_func) (info->stream, "%s@-", regname);
00925          break;
00926 
00927        case 5:
00928          val = NEXTWORD (p);
00929          (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
00930          break;
00931 
00932        case 6:
00933          p = print_indexed (regno, p, addr, info);
00934          break;
00935 
00936        case 7:
00937          switch (val & 7)
00938            {
00939            case 0:
00940              val = NEXTWORD (p);
00941              (*info->print_address_func) (val, info);
00942              break;
00943 
00944            case 1:
00945              uval = NEXTULONG (p);
00946              (*info->print_address_func) (uval, info);
00947              break;
00948 
00949            case 2:
00950              val = NEXTWORD (p);
00951              (*info->fprintf_func) (info->stream, "%%pc@(");
00952              (*info->print_address_func) (addr + val, info);
00953              (*info->fprintf_func) (info->stream, ")");
00954              break;
00955 
00956            case 3:
00957              p = print_indexed (-1, p, addr, info);
00958              break;
00959 
00960            case 4:
00961              flt_p = 1;     /* Assume it's a float... */
00962              switch (place)
00963              {
00964               case 'b':
00965                 val = NEXTBYTE (p);
00966                 flt_p = 0;
00967                 break;
00968 
00969               case 'w':
00970                 val = NEXTWORD (p);
00971                 flt_p = 0;
00972                 break;
00973 
00974               case 'l':
00975                 val = NEXTLONG (p);
00976                 flt_p = 0;
00977                 break;
00978 
00979               case 'f':
00980                 NEXTSINGLE (flval, p);
00981                 break;
00982 
00983               case 'F':
00984                 NEXTDOUBLE (flval, p);
00985                 break;
00986 
00987               case 'x':
00988                 NEXTEXTEND (flval, p);
00989                 break;
00990 
00991               case 'p':
00992                 flval = NEXTPACKED (p);
00993                 break;
00994 
00995               default:
00996                 return -1;
00997              }
00998              if (flt_p)     /* Print a float? */
00999               (*info->fprintf_func) (info->stream, "#%g", flval);
01000              else
01001               (*info->fprintf_func) (info->stream, "#%d", val);
01002              break;
01003 
01004            default:
01005              return -1;
01006            }
01007        }
01008 
01009       /* If place is '/', then this is the case of the mask bit for
01010         mac/emac loads. Now that the arg has been printed, grab the
01011         mask bit and if set, add a '&' to the arg.  */
01012       if (place == '/')
01013        {
01014          val = fetch_arg (buffer, place, 1, info);
01015          if (val)
01016            info->fprintf_func (info->stream, "&");
01017        }
01018       break;
01019 
01020     case 'L':
01021     case 'l':
01022        if (place == 'w')
01023          {
01024            char doneany;
01025            p1 = buffer + 2;
01026            val = NEXTWORD (p1);
01027            /* Move the pointer ahead if this point is farther ahead
01028               than the last.  */
01029            p = p1 > p ? p1 : p;
01030            if (val == 0)
01031              {
01032               (*info->fprintf_func) (info->stream, "#0");
01033               break;
01034              }
01035            if (*d == 'l')
01036              {
01037               int newval = 0;
01038 
01039               for (regno = 0; regno < 16; ++regno)
01040                 if (val & (0x8000 >> regno))
01041                   newval |= 1 << regno;
01042               val = newval;
01043              }
01044            val &= 0xffff;
01045            doneany = 0;
01046            for (regno = 0; regno < 16; ++regno)
01047              if (val & (1 << regno))
01048               {
01049                 int first_regno;
01050 
01051                 if (doneany)
01052                   (*info->fprintf_func) (info->stream, "/");
01053                 doneany = 1;
01054                 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
01055                 first_regno = regno;
01056                 while (val & (1 << (regno + 1)))
01057                   ++regno;
01058                 if (regno > first_regno)
01059                   (*info->fprintf_func) (info->stream, "-%s",
01060                                       reg_names[regno]);
01061               }
01062          }
01063        else if (place == '3')
01064          {
01065            /* `fmovem' insn.  */
01066            char doneany;
01067            val = fetch_arg (buffer, place, 8, info);
01068            if (val == 0)
01069              {
01070               (*info->fprintf_func) (info->stream, "#0");
01071               break;
01072              }
01073            if (*d == 'l')
01074              {
01075               int newval = 0;
01076 
01077               for (regno = 0; regno < 8; ++regno)
01078                 if (val & (0x80 >> regno))
01079                   newval |= 1 << regno;
01080               val = newval;
01081              }
01082            val &= 0xff;
01083            doneany = 0;
01084            for (regno = 0; regno < 8; ++regno)
01085              if (val & (1 << regno))
01086               {
01087                 int first_regno;
01088                 if (doneany)
01089                   (*info->fprintf_func) (info->stream, "/");
01090                 doneany = 1;
01091                 (*info->fprintf_func) (info->stream, "%%fp%d", regno);
01092                 first_regno = regno;
01093                 while (val & (1 << (regno + 1)))
01094                   ++regno;
01095                 if (regno > first_regno)
01096                   (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
01097               }
01098          }
01099        else if (place == '8')
01100          {
01101            /* fmoveml for FP status registers.  */
01102            (*info->fprintf_func) (info->stream, "%s",
01103                                fpcr_names[fetch_arg (buffer, place, 3,
01104                                                   info)]);
01105          }
01106        else
01107          return -2;
01108       break;
01109 
01110     case 'X':
01111       place = '8';
01112     case 'Y':
01113     case 'Z':
01114     case 'W':
01115     case '0':
01116     case '1':
01117     case '2':
01118     case '3':
01119       {
01120        int val = fetch_arg (buffer, place, 5, info);
01121        char *name = 0;
01122 
01123        switch (val)
01124          {
01125          case 2: name = "%tt0"; break;
01126          case 3: name = "%tt1"; break;
01127          case 0x10: name = "%tc"; break;
01128          case 0x11: name = "%drp"; break;
01129          case 0x12: name = "%srp"; break;
01130          case 0x13: name = "%crp"; break;
01131          case 0x14: name = "%cal"; break;
01132          case 0x15: name = "%val"; break;
01133          case 0x16: name = "%scc"; break;
01134          case 0x17: name = "%ac"; break;
01135          case 0x18: name = "%psr"; break;
01136          case 0x19: name = "%pcsr"; break;
01137          case 0x1c:
01138          case 0x1d:
01139            {
01140              int break_reg = ((buffer[3] >> 2) & 7);
01141 
01142              (*info->fprintf_func)
01143               (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
01144                break_reg);
01145            }
01146            break;
01147          default:
01148            (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
01149          }
01150        if (name)
01151          (*info->fprintf_func) (info->stream, "%s", name);
01152       }
01153       break;
01154 
01155     case 'f':
01156       {
01157        int fc = fetch_arg (buffer, place, 5, info);
01158 
01159        if (fc == 1)
01160          (*info->fprintf_func) (info->stream, "%%dfc");
01161        else if (fc == 0)
01162          (*info->fprintf_func) (info->stream, "%%sfc");
01163        else
01164          /* xgettext:c-format */
01165          (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
01166       }
01167       break;
01168 
01169     case 'V':
01170       (*info->fprintf_func) (info->stream, "%%val");
01171       break;
01172 
01173     case 't':
01174       {
01175        int level = fetch_arg (buffer, place, 3, info);
01176 
01177        (*info->fprintf_func) (info->stream, "%d", level);
01178       }
01179       break;
01180 
01181     case 'u':
01182       {
01183        short is_upper = 0;
01184        int reg = fetch_arg (buffer, place, 5, info);
01185 
01186        if (reg & 0x10)
01187          {
01188            is_upper = 1;
01189            reg &= 0xf;
01190          }
01191        (*info->fprintf_func) (info->stream, "%s%s",
01192                             reg_half_names[reg],
01193                             is_upper ? "u" : "l");
01194       }
01195       break;
01196 
01197     default:
01198       return -2;
01199     }
01200 
01201   return p - p0;
01202 }
01203 
01204 /* Try to match the current instruction to best and if so, return the
01205    number of bytes consumed from the instruction stream, else zero.  */
01206 
01207 static int
01208 match_insn_m68k (bfd_vma memaddr,
01209                disassemble_info * info,
01210                const struct m68k_opcode * best)
01211 {
01212   unsigned char *save_p;
01213   unsigned char *p;
01214   const char *d;
01215 
01216   struct private *priv = (struct private *) info->private_data;
01217   bfd_byte *buffer = priv->the_buffer;
01218   fprintf_ftype save_printer = info->fprintf_func;
01219   void (* save_print_address) (bfd_vma, struct disassemble_info *)
01220     = info->print_address_func;
01221 
01222   /* Point at first word of argument data,
01223      and at descriptor for first argument.  */
01224   p = buffer + 2;
01225 
01226   /* Figure out how long the fixed-size portion of the instruction is.
01227      The only place this is stored in the opcode table is
01228      in the arguments--look for arguments which specify fields in the 2nd
01229      or 3rd words of the instruction.  */
01230   for (d = best->args; *d; d += 2)
01231     {
01232       /* I don't think it is necessary to be checking d[0] here;
01233         I suspect all this could be moved to the case statement below.  */
01234       if (d[0] == '#')
01235        {
01236          if (d[1] == 'l' && p - buffer < 6)
01237            p = buffer + 6;
01238          else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
01239            p = buffer + 4;
01240        }
01241 
01242       if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
01243        p = buffer + 4;
01244 
01245       switch (d[1])
01246        {
01247        case '1':
01248        case '2':
01249        case '3':
01250        case '7':
01251        case '8':
01252        case '9':
01253        case 'i':
01254          if (p - buffer < 4)
01255            p = buffer + 4;
01256          break;
01257        case '4':
01258        case '5':
01259        case '6':
01260          if (p - buffer < 6)
01261            p = buffer + 6;
01262          break;
01263        default:
01264          break;
01265        }
01266     }
01267 
01268   /* pflusha is an exceptions.  It takes no arguments but is two words
01269      long.  Recognize it by looking at the lower 16 bits of the mask.  */
01270   if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
01271     p = buffer + 4;
01272 
01273   /* lpstop is another exception.  It takes a one word argument but is
01274      three words long.  */
01275   if (p - buffer < 6
01276       && (best->match & 0xffff) == 0xffff
01277       && best->args[0] == '#'
01278       && best->args[1] == 'w')
01279     {
01280       /* Copy the one word argument into the usual location for a one
01281         word argument, to simplify printing it.  We can get away with
01282         this because we know exactly what the second word is, and we
01283         aren't going to print anything based on it.  */
01284       p = buffer + 6;
01285       FETCH_DATA (info, p);
01286       buffer[2] = buffer[4];
01287       buffer[3] = buffer[5];
01288     }
01289 
01290   FETCH_DATA (info, p);
01291 
01292   d = best->args;
01293 
01294   save_p = p;
01295   info->print_address_func = dummy_print_address;
01296   info->fprintf_func = (fprintf_ftype) dummy_printer;
01297 
01298   /* We scan the operands twice.  The first time we don't print anything,
01299      but look for errors.  */
01300   for (; *d; d += 2)
01301     {
01302       int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
01303 
01304       if (eaten >= 0)
01305        p += eaten;
01306       else if (eaten == -1)
01307        {
01308          info->fprintf_func = save_printer;
01309          info->print_address_func = save_print_address;
01310          return 0;
01311        }
01312       else
01313        {
01314          /* We must restore the print functions before trying to print the
01315             error message.  */
01316          info->fprintf_func = save_printer;
01317          info->print_address_func = save_print_address;
01318          info->fprintf_func (info->stream,
01319                            /* xgettext:c-format */
01320                            _("<internal error in opcode table: %s %s>\n"),
01321                            best->name,  best->args);
01322          return 2;
01323        }
01324     }
01325 
01326   p = save_p;
01327   info->fprintf_func = save_printer;
01328   info->print_address_func = save_print_address;
01329 
01330   d = best->args;
01331 
01332   info->fprintf_func (info->stream, "%s", best->name);
01333 
01334   if (*d)
01335     info->fprintf_func (info->stream, " ");
01336 
01337   while (*d)
01338     {
01339       p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
01340       d += 2;
01341 
01342       if (*d && *(d - 2) != 'I' && *d != 'k')
01343        info->fprintf_func (info->stream, ",");
01344     }
01345 
01346   return p - buffer;
01347 }
01348 
01349 /* Try to interpret the instruction at address MEMADDR as one that
01350    can execute on a processor with the features given by ARCH_MASK.
01351    If successful, print the instruction to INFO->STREAM and return
01352    its length in bytes.  Return 0 otherwise.  */
01353 
01354 static int
01355 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
01356               unsigned int arch_mask)
01357 {
01358   int i;
01359   const char *d;
01360   static const struct m68k_opcode **opcodes[16];
01361   static int numopcodes[16];
01362   int val;
01363   int major_opcode;
01364 
01365   struct private *priv = (struct private *) info->private_data;
01366   bfd_byte *buffer = priv->the_buffer;
01367 
01368   if (!opcodes[0])
01369     {
01370       /* Speed up the matching by sorting the opcode
01371         table on the upper four bits of the opcode.  */
01372       const struct m68k_opcode **opc_pointer[16];
01373 
01374       /* First count how many opcodes are in each of the sixteen buckets.  */
01375       for (i = 0; i < m68k_numopcodes; i++)
01376        numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
01377 
01378       /* Then create a sorted table of pointers
01379         that point into the unsorted table.  */
01380       opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
01381                             * m68k_numopcodes);
01382       opcodes[0] = opc_pointer[0];
01383 
01384       for (i = 1; i < 16; i++)
01385        {
01386          opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
01387          opcodes[i] = opc_pointer[i];
01388        }
01389 
01390       for (i = 0; i < m68k_numopcodes; i++)
01391        *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
01392     }
01393 
01394   FETCH_DATA (info, buffer + 2);
01395   major_opcode = (buffer[0] >> 4) & 15;
01396 
01397   for (i = 0; i < numopcodes[major_opcode]; i++)
01398     {
01399       const struct m68k_opcode *opc = opcodes[major_opcode][i];
01400       unsigned long opcode = opc->opcode;
01401       unsigned long match = opc->match;
01402 
01403       if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
01404          && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
01405          /* Only fetch the next two bytes if we need to.  */
01406          && (((0xffff & match) == 0)
01407              ||
01408              (FETCH_DATA (info, buffer + 4)
01409               && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
01410               && ((0xff & buffer[3] & match) == (0xff & opcode)))
01411              )
01412          && (opc->arch & arch_mask) != 0)
01413        {
01414          /* Don't use for printout the variants of divul and divsl
01415             that have the same register number in two places.
01416             The more general variants will match instead.  */
01417          for (d = opc->args; *d; d += 2)
01418            if (d[1] == 'D')
01419              break;
01420 
01421          /* Don't use for printout the variants of most floating
01422             point coprocessor instructions which use the same
01423             register number in two places, as above.  */
01424          if (*d == '\0')
01425            for (d = opc->args; *d; d += 2)
01426              if (d[1] == 't')
01427               break;
01428 
01429          /* Don't match fmovel with more than one register;
01430             wait for fmoveml.  */
01431          if (*d == '\0')
01432            {
01433              for (d = opc->args; *d; d += 2)
01434               {
01435                 if (d[0] == 's' && d[1] == '8')
01436                   {
01437                     val = fetch_arg (buffer, d[1], 3, info);
01438                     if ((val & (val - 1)) != 0)
01439                      break;
01440                   }
01441               }
01442            }
01443 
01444          /* Don't match FPU insns with non-default coprocessor ID.  */
01445          if (*d == '\0')
01446            {
01447              for (d = opc->args; *d; d += 2)
01448               {
01449                 if (d[0] == 'I')
01450                   {
01451                     val = fetch_arg (buffer, 'd', 3, info);
01452                     if (val != 1)
01453                      break;
01454                   }
01455               }
01456            }
01457 
01458          if (*d == '\0')
01459            if ((val = match_insn_m68k (memaddr, info, opc)))
01460              return val;
01461        }
01462     }
01463   return 0;
01464 }             
01465 
01466 /* Print the m68k instruction at address MEMADDR in debugged memory,
01467    on INFO->STREAM.  Returns length of the instruction, in bytes.  */
01468 
01469 int
01470 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
01471 {
01472   unsigned int arch_mask;
01473   struct private priv;
01474   int val;
01475 
01476   bfd_byte *buffer = priv.the_buffer;
01477 
01478   info->private_data = (PTR) &priv;
01479   /* Tell objdump to use two bytes per chunk
01480      and six bytes per line for displaying raw data.  */
01481   info->bytes_per_chunk = 2;
01482   info->bytes_per_line = 6;
01483   info->display_endian = BFD_ENDIAN_BIG;
01484   priv.max_fetched = priv.the_buffer;
01485   priv.insn_start = memaddr;
01486 
01487   if (setjmp (priv.bailout) != 0)
01488     /* Error return.  */
01489     return -1;
01490 
01491   arch_mask = bfd_m68k_mach_to_features (info->mach);
01492   if (!arch_mask)
01493     {
01494       /* First try printing an m680x0 instruction.  Try printing a Coldfire
01495         one if that fails.  */
01496       val = m68k_scan_mask (memaddr, info, m68k_mask);
01497       if (val)
01498        return val;
01499 
01500       val = m68k_scan_mask (memaddr, info, mcf_mask);
01501       if (val)
01502        return val;
01503     }
01504   else
01505     {
01506       val = m68k_scan_mask (memaddr, info, arch_mask);
01507       if (val)
01508        return val;
01509     }
01510 
01511   /* Handle undefined instructions.  */
01512   info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
01513   return 2;
01514 }