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cell-binutils  2.17cvs20070401
m32r.h
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00001 /* M32R ELF support for BFD.
00002    Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004 Free Software Foundation, Inc.
00003 
00004    This file is part of BFD, the Binary File Descriptor library.
00005 
00006    This program is free software; you can redistribute it and/or modify
00007    it under the terms of the GNU General Public License as published by
00008    the Free Software Foundation; either version 2 of the License, or
00009    (at your option) any later version.
00010 
00011    This program is distributed in the hope that it will be useful,
00012    but WITHOUT ANY WARRANTY; without even the implied warranty of
00013    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014    GNU General Public License for more details.
00015 
00016    You should have received a copy of the GNU General Public License
00017    along with this program; if not, write to the Free Software Foundation, Inc.,
00018    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00019 
00020 #ifndef _ELF_M32R_H
00021 #define _ELF_M32R_H
00022 
00023 #include "elf/reloc-macros.h"
00024 
00025 /* Relocations.  */
00026 START_RELOC_NUMBERS (elf_m32r_reloc_type)
00027   RELOC_NUMBER (R_M32R_NONE, 0)
00028   /* REL relocations */
00029   RELOC_NUMBER (R_M32R_16, 1)              /* For backwards compatibility. */
00030   RELOC_NUMBER (R_M32R_32, 2)              /* For backwards compatibility. */
00031   RELOC_NUMBER (R_M32R_24, 3)              /* For backwards compatibility. */
00032   RELOC_NUMBER (R_M32R_10_PCREL, 4)        /* For backwards compatibility. */
00033   RELOC_NUMBER (R_M32R_18_PCREL, 5)        /* For backwards compatibility. */
00034   RELOC_NUMBER (R_M32R_26_PCREL, 6)        /* For backwards compatibility. */
00035   RELOC_NUMBER (R_M32R_HI16_ULO, 7)        /* For backwards compatibility. */
00036   RELOC_NUMBER (R_M32R_HI16_SLO, 8)        /* For backwards compatibility. */
00037   RELOC_NUMBER (R_M32R_LO16, 9)            /* For backwards compatibility. */
00038   RELOC_NUMBER (R_M32R_SDA16, 10)   /* For backwards compatibility. */
00039   RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)/* For backwards compatibility. */
00040   RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12)    /* For backwards compatibility. */
00041 
00042   /* RELA relocations */
00043   RELOC_NUMBER (R_M32R_16_RELA, 33)
00044   RELOC_NUMBER (R_M32R_32_RELA, 34)
00045   RELOC_NUMBER (R_M32R_24_RELA, 35)
00046   RELOC_NUMBER (R_M32R_10_PCREL_RELA, 36)
00047   RELOC_NUMBER (R_M32R_18_PCREL_RELA, 37)
00048   RELOC_NUMBER (R_M32R_26_PCREL_RELA, 38)
00049   RELOC_NUMBER (R_M32R_HI16_ULO_RELA, 39)
00050   RELOC_NUMBER (R_M32R_HI16_SLO_RELA, 40)
00051   RELOC_NUMBER (R_M32R_LO16_RELA, 41)
00052   RELOC_NUMBER (R_M32R_SDA16_RELA, 42)
00053   RELOC_NUMBER (R_M32R_RELA_GNU_VTINHERIT, 43)
00054   RELOC_NUMBER (R_M32R_RELA_GNU_VTENTRY, 44)
00055 
00056   RELOC_NUMBER (R_M32R_REL32, 45)
00057                                                                                 
00058   RELOC_NUMBER (R_M32R_GOT24, 48)
00059   RELOC_NUMBER (R_M32R_26_PLTREL, 49)
00060   RELOC_NUMBER (R_M32R_COPY, 50)
00061   RELOC_NUMBER (R_M32R_GLOB_DAT, 51)
00062   RELOC_NUMBER (R_M32R_JMP_SLOT, 52)
00063   RELOC_NUMBER (R_M32R_RELATIVE, 53)
00064   RELOC_NUMBER (R_M32R_GOTOFF, 54)
00065   RELOC_NUMBER (R_M32R_GOTPC24, 55)
00066   RELOC_NUMBER (R_M32R_GOT16_HI_ULO, 56)
00067   RELOC_NUMBER (R_M32R_GOT16_HI_SLO, 57)
00068   RELOC_NUMBER (R_M32R_GOT16_LO, 58)
00069   RELOC_NUMBER (R_M32R_GOTPC_HI_ULO, 59)
00070   RELOC_NUMBER (R_M32R_GOTPC_HI_SLO, 60)
00071   RELOC_NUMBER (R_M32R_GOTPC_LO, 61)
00072   RELOC_NUMBER (R_M32R_GOTOFF_HI_ULO, 62)
00073   RELOC_NUMBER (R_M32R_GOTOFF_HI_SLO, 63)
00074   RELOC_NUMBER (R_M32R_GOTOFF_LO, 64)
00075 
00076 END_RELOC_NUMBERS (R_M32R_max)
00077 
00078 /* Processor specific section indices.  These sections do not actually
00079    exist.  Symbols with a st_shndx field corresponding to one of these
00080    values have a special meaning.  */
00081 
00082 /* Small common symbol.  */
00083 #define SHN_M32R_SCOMMON    0xff00
00084 
00085 /* Processor specific section flags.  */
00086 
00087 /* This section contains sufficient relocs to be relaxed.
00088    When relaxing, even relocs of branch instructions the assembler could
00089    complete must be present because relaxing may cause the branch target to
00090    move.  */
00091 #define SHF_M32R_CAN_RELAX  0x10000000
00092 
00093 /* Processor specific flags for the ELF header e_flags field.  */
00094 
00095 /* Two bit m32r architecture field.  */
00096 #define EF_M32R_ARCH        0x30000000
00097 
00098 /* m32r code.  */
00099 #define E_M32R_ARCH         0x00000000
00100 /* m32rx code.  */
00101 #define E_M32RX_ARCH            0x10000000
00102 /* m32r2 code.  */
00103 #define E_M32R2_ARCH            0x20000000
00104 
00105 /* 12 bit m32r new instructions field.  */
00106 #define EF_M32R_INST            0x0FFF0000
00107 /* Parallel instructions.  */
00108 #define E_M32R_HAS_PARALLEL     0x00010000
00109 /* Hidden instructions for m32rx:
00110    jc, jnc, macwhi-a, macwlo-a, mulwhi-a, mulwlo-a, sth+, shb+, sat, pcmpbz,
00111    sc, snc.  */
00112 #define E_M32R_HAS_HIDDEN_INST  0x00020000
00113 /* New bit instructions:
00114    clrpsw, setpsw, bset, bclr, btst.  */
00115 #define E_M32R_HAS_BIT_INST     0x00040000
00116 /* Floating point instructions.  */
00117 #define E_M32R_HAS_FLOAT_INST   0x00080000
00118 
00119 /* 4 bit m32r ignore to check field.  */
00120 #define EF_M32R_IGNORE          0x0000000F
00121 
00122 #endif